2 * include/asm-ppc/gemini.h
5 * Onboard registers and descriptions for Synergy Microsystems'
10 #define __PPC_GEMINI_H
14 #define GEMINI_SERIAL_B (0xffeffb00)
15 #define GEMINI_SERIAL_A (0xffeffb08)
16 #define GEMINI_USWITCH (0xffeffd00)
17 #define GEMINI_BREV (0xffeffe00)
18 #define GEMINI_BECO (0xffeffe08)
19 #define GEMINI_FEAT (0xffeffe10)
20 #define GEMINI_BSTAT (0xffeffe18)
21 #define GEMINI_CPUSTAT (0xffeffe20)
22 #define GEMINI_L2CFG (0xffeffe30)
23 #define GEMINI_MEMCFG (0xffeffe38)
24 #define GEMINI_FLROM (0xffeffe40)
25 #define GEMINI_P0PCI (0xffeffe48)
26 #define GEMINI_FLWIN (0xffeffe50)
27 #define GEMINI_P0INTMASK (0xffeffe60)
28 #define GEMINI_P0INTAP (0xffeffe68)
29 #define GEMINI_PCIERR (0xffeffe70)
30 #define GEMINI_LEDBASE (0xffeffe80)
31 #define GEMINI_RTC (0xffe9fff8)
33 #define GEMINI_SWITCHES 8
36 /* Flash ROM bit definitions */
37 #define GEMINI_FLS_WEN (1<<0)
38 #define GEMINI_FLS_JMP (1<<6)
39 #define GEMINI_FLS_BOOT (1<<7)
41 /* Memory bit definitions */
42 #define GEMINI_MEM_TYPE_MASK 0xc0
43 #define GEMINI_MEM_SIZE_MASK 0x38
44 #define GEMINI_MEM_BANK_MASK 0x07
46 /* L2 cache bit definitions */
47 #define GEMINI_L2_SIZE_MASK 0xc0
48 #define GEMINI_L2_RATIO_MASK 0x03
50 /* Timebase register bit definitons */
51 #define GEMINI_TIMEB0_EN (1<<0)
52 #define GEMINI_TIMEB1_EN (1<<1)
53 #define GEMINI_TIMEB2_EN (1<<2)
54 #define GEMINI_TIMEB3_EN (1<<3)
56 /* CPU status bit definitions */
57 #define GEMINI_CPU_ID_MASK 0x03
58 #define GEMINI_CPU_COUNT_MASK 0x0c
59 #define GEMINI_CPU0_HALTED (1<<4)
60 #define GEMINI_CPU1_HALTED (1<<5)
61 #define GEMINI_CPU2_HALTED (1<<6)
62 #define GEMINI_CPU3_HALTED (1<<7)
64 /* Board status bit definitions */
65 #define GEMINI_BRD_FAIL (1<<0) /* FAIL led is lit */
66 #define GEMINI_BRD_BUS_MASK 0x0c /* PowerPC bus speed */
68 /* Board family/feature bit descriptions */
69 #define GEMINI_FEAT_HAS_FLASH (1<<0)
70 #define GEMINI_FEAT_HAS_ETH (1<<1)
71 #define GEMINI_FEAT_HAS_SCSI (1<<2)
72 #define GEMINI_FEAT_HAS_P0 (1<<3)
73 #define GEMINI_FEAT_FAM_MASK 0xf0
75 /* Mod/ECO bit definitions */
76 #define GEMINI_ECO_LEVEL_MASK 0x0f
77 #define GEMINI_MOD_MASK 0xf0
79 /* Type/revision bit definitions */
80 #define GEMINI_REV_MASK 0x0f
81 #define GEMINI_TYPE_MASK 0xf0
83 /* User switch definitions */
84 #define GEMINI_SWITCH_VERBOSE 1 /* adds "debug" to boot cmd line */
85 #define GEMINI_SWITCH_SINGLE_USER 7 /* boots into "single-user" mode */
87 #define SGS_RTC_CONTROL 0
88 #define SGS_RTC_SECONDS 1
89 #define SGS_RTC_MINUTES 2
90 #define SGS_RTC_HOURS 3
92 #define SGS_RTC_DAY_OF_MONTH 5
93 #define SGS_RTC_MONTH 6
94 #define SGS_RTC_YEAR 7
96 #define SGS_RTC_SET 0x80
97 #define SGS_RTC_IS_STOPPED 0x80
99 #define GRACKLE_CONFIG_ADDR_ADDR (0xfec00000)
100 #define GRACKLE_CONFIG_DATA_ADDR (0xfee00000)
102 #define GEMINI_BOOT_INIT (0xfff00100)
106 static inline void grackle_write( unsigned long addr
, unsigned long data
)
108 __asm__
__volatile__(
109 " stwbrx %1, 0, %0\n \
114 : "r" (GRACKLE_CONFIG_ADDR_ADDR
), "r" (addr
),
115 "r" (GRACKLE_CONFIG_DATA_ADDR
), "r" (data
));
118 static inline unsigned long grackle_read( unsigned long addr
)
122 __asm__
__volatile__(
123 " stwbrx %1, 0, %2\n \
128 : "r" (addr
), "r" (GRACKLE_CONFIG_ADDR_ADDR
),
129 "r" (GRACKLE_CONFIG_DATA_ADDR
));
134 static inline void gemini_led_on( int led
)
136 if (led
>= 0 && led
< GEMINI_LEDS
)
137 *(unsigned char *)(GEMINI_LEDBASE
+ (led
<<3)) = 1;
140 static inline void gemini_led_off(int led
)
142 if (led
>= 0 && led
< GEMINI_LEDS
)
143 *(unsigned char *)(GEMINI_LEDBASE
+ (led
<<3)) = 0;
146 static inline int gemini_led_val(int led
)
149 if (led
>= 0 && led
< GEMINI_LEDS
)
150 val
= *(unsigned char *)(GEMINI_LEDBASE
+ (led
<<3));
154 /* returns processor id from the board */
155 static inline int gemini_processor(void)
157 unsigned char cpu
= *(unsigned char *)(GEMINI_CPUSTAT
);
158 return (int) ((cpu
== 0) ? 4 : (cpu
& GEMINI_CPU_ID_MASK
));
162 extern void _gemini_reboot(void);
163 extern void gemini_prom_init(void);
164 extern void gemini_init_l2(void);
165 #endif /* __ASSEMBLY__ */