2 * arch/arm/kernel/dma-isa.c: ISA DMA primitives
4 * Copyright (C) Russell King
6 * Taken from various sources, including:
7 * linux/include/asm/dma.h: Defines for using and allocating dma channels.
8 * Written by Hennus Bergman, 1992.
9 * High DMA channel support & info by Hannu Savolainen and John Boyd, Nov. 1992.
10 * arch/arm/kernel/dma-ebsa285.c
11 * Copyright (C) 1998 Phil Blundell
13 #include <linux/sched.h>
14 #include <linux/ioport.h>
15 #include <linux/init.h>
23 #define ISA_DMA_MODE_READ 0x44
24 #define ISA_DMA_MODE_WRITE 0x48
25 #define ISA_DMA_MODE_CASCADE 0xc0
26 #define ISA_DMA_AUTOINIT 0x10
28 #define ISA_DMA_MASK 0
29 #define ISA_DMA_MODE 1
30 #define ISA_DMA_CLRFF 2
31 #define ISA_DMA_PGHI 3
32 #define ISA_DMA_PGLO 4
33 #define ISA_DMA_ADDR 5
34 #define ISA_DMA_COUNT 6
36 static unsigned int isa_dma_port
[8][7] = {
37 /* MASK MODE CLRFF PAGE_HI PAGE_LO ADDR COUNT */
38 { 0x0a, 0x0b, 0x0c, 0x487, 0x087, 0x00, 0x01 },
39 { 0x0a, 0x0b, 0x0c, 0x483, 0x083, 0x02, 0x03 },
40 { 0x0a, 0x0b, 0x0c, 0x481, 0x081, 0x04, 0x05 },
41 { 0x0a, 0x0b, 0x0c, 0x482, 0x082, 0x06, 0x07 },
42 { 0xd4, 0xd6, 0xd8, 0x000, 0x000, 0xc0, 0xc2 },
43 { 0xd4, 0xd6, 0xd8, 0x48b, 0x08b, 0xc4, 0xc6 },
44 { 0xd4, 0xd6, 0xd8, 0x489, 0x089, 0xc8, 0xca },
45 { 0xd4, 0xd6, 0xd8, 0x48a, 0x08a, 0xcc, 0xce }
48 int isa_request_dma(int channel
, dma_t
*dma
, const char *dev_name
)
53 void isa_free_dma(int channel
, dma_t
*dma
)
58 int isa_get_dma_residue(int channel
, dma_t
*dma
)
60 unsigned int io_port
= isa_dma_port
[channel
][ISA_DMA_COUNT
];
63 count
= 1 + inb(io_port
);
64 count
|= inb(io_port
) << 8;
66 return channel
< 4 ? count
: (count
<< 1);
69 void isa_enable_dma(int channel
, dma_t
*dma
)
72 unsigned long address
, length
;
75 address
= dma
->buf
.address
;
76 length
= dma
->buf
.length
- 1;
78 outb(address
>> 16, isa_dma_port
[channel
][ISA_DMA_PGLO
]);
79 outb(address
>> 24, isa_dma_port
[channel
][ISA_DMA_PGHI
]);
86 outb(0, isa_dma_port
[channel
][ISA_DMA_CLRFF
]);
88 outb(address
, isa_dma_port
[channel
][ISA_DMA_ADDR
]);
89 outb(address
>> 8, isa_dma_port
[channel
][ISA_DMA_ADDR
]);
91 outb(length
, isa_dma_port
[channel
][ISA_DMA_COUNT
]);
92 outb(length
>> 8, isa_dma_port
[channel
][ISA_DMA_COUNT
]);
96 switch (dma
->dma_mode
& DMA_MODE_MASK
) {
98 mode
|= ISA_DMA_MODE_READ
;
99 dma_cache_inv(__bus_to_virt(dma
->buf
.address
), dma
->buf
.length
);
103 mode
|= ISA_DMA_MODE_WRITE
;
104 dma_cache_wback(__bus_to_virt(dma
->buf
.address
), dma
->buf
.length
);
107 case DMA_MODE_CASCADE
:
108 mode
|= ISA_DMA_MODE_CASCADE
;
115 if (dma
->dma_mode
& DMA_AUTOINIT
)
116 mode
|= ISA_DMA_AUTOINIT
;
118 outb(mode
, isa_dma_port
[channel
][ISA_DMA_MODE
]);
121 outb(channel
& 3, isa_dma_port
[channel
][ISA_DMA_MASK
]);
124 void isa_disable_dma(int channel
, dma_t
*dma
)
126 outb(channel
| 4, isa_dma_port
[channel
][ISA_DMA_MASK
]);
129 int __init
isa_init_dma(void)
139 dmac_found
= inb(0x00) == 0x55 && inb(0x00) == 0xaa;
144 for (channel
= 0; channel
< 8; channel
++)
145 isa_disable_dma(channel
, NULL
);
163 * Is this correct? According to
164 * my documentation, it doesn't
165 * appear to be. It should be
166 * outb(0x3f, 0x40b); outb(0x3f, 0x4d6);
176 request_dma(DMA_ISA_CASCADE
, "cascade");
178 for (i
= 0; i
< sizeof(dma_resources
) / sizeof(dma_resources
[0]); i
++)
179 request_resource(&ioport_resource
, dma_resources
+ i
);