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* added 0.99 linux version
[mascara-docs.git] / i386 / linux / linux-2.3.21 / drivers / sound / es1371.c
blobbf5048fe297b07fcf23be39cd43ff8a6808e17d5
1 /*****************************************************************************/
2
3 /*
4 * es1371.c -- Creative Ensoniq ES1371.
5 *
6 * Copyright (C) 1998-1999 Thomas Sailer (sailer@ife.ee.ethz.ch)
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 *
22 * Special thanks to Ensoniq
23 *
24 *
25 * Module command line parameters:
26 * joystick must be set to the base I/O-Port to be used for
27 * the gameport. Legal values are 0x200, 0x208, 0x210 and 0x218.
28 * The gameport is mirrored eight times.
29 *
30 * Supported devices:
31 * /dev/dsp standard /dev/dsp device, (mostly) OSS compatible
32 * /dev/mixer standard /dev/mixer device, (mostly) OSS compatible
33 * /dev/dsp1 additional DAC, like /dev/dsp, but outputs to mixer "SYNTH" setting
34 * /dev/midi simple MIDI UART interface, no ioctl
35 *
36 * NOTE: the card does not have any FM/Wavetable synthesizer, it is supposed
37 * to be done in software. That is what /dev/dac is for. By now (Q2 1998)
38 * there are several MIDI to PCM (WAV) packages, one of them is timidity.
39 *
40 * Revision history
41 * 04.06.98 0.1 Initial release
42 * Mixer stuff should be overhauled; especially optional AC97 mixer bits
43 * should be detected. This results in strange behaviour of some mixer
44 * settings, like master volume and mic.
45 * 08.06.98 0.2 First release using Alan Cox' soundcore instead of miscdevice
46 * 03.08.98 0.3 Do not include modversions.h
47 * Now mixer behaviour can basically be selected between
48 * "OSS documented" and "OSS actual" behaviour
49 * 31.08.98 0.4 Fix realplayer problems - dac.count issues
50 * 27.10.98 0.5 Fix joystick support
51 * -- Oliver Neukum (c188@org.chemie.uni-muenchen.de)
52 * 10.12.98 0.6 Fix drain_dac trying to wait on not yet initialized DMA
53 * 23.12.98 0.7 Fix a few f_file & FMODE_ bugs
54 * Don't wake up app until there are fragsize bytes to read/write
55 * 06.01.99 0.8 remove the silly SA_INTERRUPT flag.
56 * hopefully killed the egcs section type conflict
57 * 12.03.99 0.9 cinfo.blocks should be reset after GETxPTR ioctl.
58 * reported by Johan Maes <joma@telindus.be>
59 * 22.03.99 0.10 return EAGAIN instead of EBUSY when O_NONBLOCK
60 * read/write cannot be executed
61 * 07.04.99 0.11 implemented the following ioctl's: SOUND_PCM_READ_RATE,
62 * SOUND_PCM_READ_CHANNELS, SOUND_PCM_READ_BITS;
63 * Alpha fixes reported by Peter Jones <pjones@redhat.com>
64 * Another Alpha fix (wait_src_ready in init routine)
65 * reported by "Ivan N. Kokshaysky" <ink@jurassic.park.msu.ru>
66 * Note: joystick address handling might still be wrong on archs
67 * other than i386
68 * 15.06.99 0.12 Fix bad allocation bug.
69 * Thanks to Deti Fliegl <fliegl@in.tum.de>
70 * 28.06.99 0.13 Add pci_set_master
71 * 03.08.99 0.14 adapt to Linus' new __setup/__initcall
72 * added kernel command line option "es1371=joystickaddr"
73 * removed CONFIG_SOUND_ES1371_JOYPORT_BOOT kludge
74 * 10.08.99 0.15 (Re)added S/PDIF module option for cards revision >= 4.
75 * Initial version by Dave Platt <dplatt@snulbug.mtview.ca.us>.
76 * module_init/__setup fixes
77 * 08.16.99 0.16 Joe Cotellese <joec@ensoniq.com>
78 * Added detection for ES1371 revision ID so that we can
79 * detect the ES1373 and later parts.
80 * added AC97 #defines for readability
81 * added a /proc file system for dumping hardware state
82 * updated SRC and CODEC w/r functions to accomodate bugs
83 * in some versions of the ES137x chips.
84 * 31.08.99 0.17 add spin_lock_init
85 * __initlocaldata to fix gcc 2.7.x problems
86 * replaced current->state = x with set_current_state(x)
87 * 03.09.99 0.18 change read semantics for MIDI to match
88 * OSS more closely; remove possible wakeup race
89 *
90 */
91
92 /*****************************************************************************/
93
94 #include <linux/version.h>
95 #include <linux/module.h>
96 #include <linux/string.h>
97 #include <linux/ioport.h>
98 #include <linux/sched.h>
99 #include <linux/delay.h>
100 #include <linux/sound.h>
101 #include <linux/malloc.h>
102 #include <linux/soundcard.h>
103 #include <linux/pci.h>
104 #include <linux/init.h>
105 #include <linux/poll.h>
106 #include <linux/bitops.h>
107 #include <linux/proc_fs.h>
108 #include <linux/spinlock.h>
109 #include <asm/io.h>
110 #include <asm/dma.h>
111 #include <asm/uaccess.h>
112 #include <asm/hardirq.h>
113 #include "ac97.h"
114
115 /* --------------------------------------------------------------------- */
116
117 #undef OSS_DOCUMENTED_MIXER_SEMANTICS
118 #define ES1371_DEBUG
119
120 /* --------------------------------------------------------------------- */
121
122 #ifndef PCI_VENDOR_ID_ENSONIQ
123 #define PCI_VENDOR_ID_ENSONIQ 0x1274
124 #endif
125 #ifndef PCI_DEVICE_ID_ENSONIQ_ES1371
126 #define PCI_DEVICE_ID_ENSONIQ_ES1371 0x1371
127 #endif
128
129 /* ES1371 chip ID */
130 /* This is a little confusing because all ES1371 compatible chips have the
131 same DEVICE_ID, the only thing differentiating them is the REV_ID field.
132 This is only significant if you want to enable features on the later parts.
133 Yes, I know it's stupid and why didn't we use the sub IDs?
134 */
135 #define ES1371REV_ES1373_A 0x04
136 #define ES1371REV_ES1373_B 0x06
137 #define ES1371REV_CT5880_A 0x07
138 #define ES1371REV_ES1371_B 0x09
139
140
141 #define ES1371_MAGIC ((PCI_VENDOR_ID_ENSONIQ<<16)|PCI_DEVICE_ID_ENSONIQ_ES1371)
142
143 #define ES1371_EXTENT 0x40
144 #define JOY_EXTENT 8
145
146 #define ES1371_REG_CONTROL 0x00
147 #define ES1371_REG_STATUS 0x04
148 #define ES1371_REG_UART_DATA 0x08
149 #define ES1371_REG_UART_STATUS 0x09
150 #define ES1371_REG_UART_CONTROL 0x09
151 #define ES1371_REG_UART_TEST 0x0a
152 #define ES1371_REG_MEMPAGE 0x0c
153 #define ES1371_REG_SRCONV 0x10
154 #define ES1371_REG_CODEC 0x14
155 #define ES1371_REG_LEGACY 0x18
156 #define ES1371_REG_SERIAL_CONTROL 0x20
157 #define ES1371_REG_DAC1_SCOUNT 0x24
158 #define ES1371_REG_DAC2_SCOUNT 0x28
159 #define ES1371_REG_ADC_SCOUNT 0x2c
160
161 #define ES1371_REG_DAC1_FRAMEADR 0xc30
162 #define ES1371_REG_DAC1_FRAMECNT 0xc34
163 #define ES1371_REG_DAC2_FRAMEADR 0xc38
164 #define ES1371_REG_DAC2_FRAMECNT 0xc3c
165 #define ES1371_REG_ADC_FRAMEADR 0xd30
166 #define ES1371_REG_ADC_FRAMECNT 0xd34
167
168 #define ES1371_FMT_U8_MONO 0
169 #define ES1371_FMT_U8_STEREO 1
170 #define ES1371_FMT_S16_MONO 2
171 #define ES1371_FMT_S16_STEREO 3
172 #define ES1371_FMT_STEREO 1
173 #define ES1371_FMT_S16 2
174 #define ES1371_FMT_MASK 3
175
176 static const unsigned sample_size[] = { 1, 2, 2, 4 };
177 static const unsigned sample_shift[] = { 0, 1, 1, 2 };
178
179 #define CTRL_SPDIFEN_B 0x04000000
180 #define CTRL_JOY_SHIFT 24
181 #define CTRL_JOY_MASK 3
182 #define CTRL_JOY_200 0x00000000 /* joystick base address */
183 #define CTRL_JOY_208 0x01000000
184 #define CTRL_JOY_210 0x02000000
185 #define CTRL_JOY_218 0x03000000
186 #define CTRL_GPIO_IN0 0x00100000 /* general purpose inputs/outputs */
187 #define CTRL_GPIO_IN1 0x00200000
188 #define CTRL_GPIO_IN2 0x00400000
189 #define CTRL_GPIO_IN3 0x00800000
190 #define CTRL_GPIO_OUT0 0x00010000
191 #define CTRL_GPIO_OUT1 0x00020000
192 #define CTRL_GPIO_OUT2 0x00040000
193 #define CTRL_GPIO_OUT3 0x00080000
194 #define CTRL_MSFMTSEL 0x00008000 /* MPEG serial data fmt: 0 = Sony, 1 = I2S */
195 #define CTRL_SYNCRES 0x00004000 /* AC97 warm reset */
196 #define CTRL_ADCSTOP 0x00002000 /* stop ADC transfers */
197 #define CTRL_PWR_INTRM 0x00001000 /* 1 = power level ints enabled */
198 #define CTRL_M_CB 0x00000800 /* recording source: 0 = ADC, 1 = MPEG */
199 #define CTRL_CCB_INTRM 0x00000400 /* 1 = CCB "voice" ints enabled */
200 #define CTRL_PDLEV0 0x00000000 /* power down level */
201 #define CTRL_PDLEV1 0x00000100
202 #define CTRL_PDLEV2 0x00000200
203 #define CTRL_PDLEV3 0x00000300
204 #define CTRL_BREQ 0x00000080 /* 1 = test mode (internal mem test) */
205 #define CTRL_DAC1_EN 0x00000040 /* enable DAC1 */
206 #define CTRL_DAC2_EN 0x00000020 /* enable DAC2 */
207 #define CTRL_ADC_EN 0x00000010 /* enable ADC */
208 #define CTRL_UART_EN 0x00000008 /* enable MIDI uart */
209 #define CTRL_JYSTK_EN 0x00000004 /* enable Joystick port */
210 #define CTRL_XTALCLKDIS 0x00000002 /* 1 = disable crystal clock input */
211 #define CTRL_PCICLKDIS 0x00000001 /* 1 = disable PCI clock distribution */
212
213
214 #define STAT_INTR 0x80000000 /* wired or of all interrupt bits */
215 #define STAT_EN_SPDIF 0x00040000 /* enable S/PDIF circuitry */
216 #define STAT_TS_SPDIF 0x00020000 /* test S/PDIF circuitry */
217 #define STAT_TESTMODE 0x00010000 /* test ASIC */
218 #define STAT_SYNC_ERR 0x00000100 /* 1 = codec sync error */
219 #define STAT_VC 0x000000c0 /* CCB int source, 0=DAC1, 1=DAC2, 2=ADC, 3=undef */
220 #define STAT_SH_VC 6
221 #define STAT_MPWR 0x00000020 /* power level interrupt */
222 #define STAT_MCCB 0x00000010 /* CCB int pending */
223 #define STAT_UART 0x00000008 /* UART int pending */
224 #define STAT_DAC1 0x00000004 /* DAC1 int pending */
225 #define STAT_DAC2 0x00000002 /* DAC2 int pending */
226 #define STAT_ADC 0x00000001 /* ADC int pending */
227
228 #define USTAT_RXINT 0x80 /* UART rx int pending */
229 #define USTAT_TXINT 0x04 /* UART tx int pending */
230 #define USTAT_TXRDY 0x02 /* UART tx ready */
231 #define USTAT_RXRDY 0x01 /* UART rx ready */
232
233 #define UCTRL_RXINTEN 0x80 /* 1 = enable RX ints */
234 #define UCTRL_TXINTEN 0x60 /* TX int enable field mask */
235 #define UCTRL_ENA_TXINT 0x20 /* enable TX int */
236 #define UCTRL_CNTRL 0x03 /* control field */
237 #define UCTRL_CNTRL_SWR 0x03 /* software reset command */
238
239 /* sample rate converter */
240 #define SRC_OKSTATE 1
241
242 #define SRC_RAMADDR_MASK 0xfe000000
243 #define SRC_RAMADDR_SHIFT 25
244 #define SRC_DAC1FREEZE (1UL << 21)
245 #define SRC_DAC2FREEZE (1UL << 20)
246 #define SRC_ADCFREEZE (1UL << 19)
247
248
249 #define SRC_WE 0x01000000 /* read/write control for SRC RAM */
250 #define SRC_BUSY 0x00800000 /* SRC busy */
251 #define SRC_DIS 0x00400000 /* 1 = disable SRC */
252 #define SRC_DDAC1 0x00200000 /* 1 = disable accum update for DAC1 */
253 #define SRC_DDAC2 0x00100000 /* 1 = disable accum update for DAC2 */
254 #define SRC_DADC 0x00080000 /* 1 = disable accum update for ADC2 */
255 #define SRC_CTLMASK 0x00780000
256 #define SRC_RAMDATA_MASK 0x0000ffff
257 #define SRC_RAMDATA_SHIFT 0
258
259 #define SRCREG_ADC 0x78
260 #define SRCREG_DAC1 0x70
261 #define SRCREG_DAC2 0x74
262 #define SRCREG_VOL_ADC 0x6c
263 #define SRCREG_VOL_DAC1 0x7c
264 #define SRCREG_VOL_DAC2 0x7e
265
266 #define SRCREG_TRUNC_N 0x00
267 #define SRCREG_INT_REGS 0x01
268 #define SRCREG_ACCUM_FRAC 0x02
269 #define SRCREG_VFREQ_FRAC 0x03
270
271 #define CODEC_PIRD 0x00800000 /* 0 = write AC97 register */
272 #define CODEC_PIADD_MASK 0x007f0000
273 #define CODEC_PIADD_SHIFT 16
274 #define CODEC_PIDAT_MASK 0x0000ffff
275 #define CODEC_PIDAT_SHIFT 0
276
277 #define CODEC_RDY 0x80000000 /* AC97 read data valid */
278 #define CODEC_WIP 0x40000000 /* AC97 write in progress */
279 #define CODEC_PORD 0x00800000 /* 0 = write AC97 register */
280 #define CODEC_POADD_MASK 0x007f0000
281 #define CODEC_POADD_SHIFT 16
282 #define CODEC_PODAT_MASK 0x0000ffff
283 #define CODEC_PODAT_SHIFT 0
284
285
286 #define LEGACY_JFAST 0x80000000 /* fast joystick timing */
287 #define LEGACY_FIRQ 0x01000000 /* force IRQ */
288
289 #define SCTRL_DACTEST 0x00400000 /* 1 = DAC test, test vector generation purposes */
290 #define SCTRL_P2ENDINC 0x00380000 /* */
291 #define SCTRL_SH_P2ENDINC 19
292 #define SCTRL_P2STINC 0x00070000 /* */
293 #define SCTRL_SH_P2STINC 16
294 #define SCTRL_R1LOOPSEL 0x00008000 /* 0 = loop mode */
295 #define SCTRL_P2LOOPSEL 0x00004000 /* 0 = loop mode */
296 #define SCTRL_P1LOOPSEL 0x00002000 /* 0 = loop mode */
297 #define SCTRL_P2PAUSE 0x00001000 /* 1 = pause mode */
298 #define SCTRL_P1PAUSE 0x00000800 /* 1 = pause mode */
299 #define SCTRL_R1INTEN 0x00000400 /* enable interrupt */
300 #define SCTRL_P2INTEN 0x00000200 /* enable interrupt */
301 #define SCTRL_P1INTEN 0x00000100 /* enable interrupt */
302 #define SCTRL_P1SCTRLD 0x00000080 /* reload sample count register for DAC1 */
303 #define SCTRL_P2DACSEN 0x00000040 /* 1 = DAC2 play back last sample when disabled */
304 #define SCTRL_R1SEB 0x00000020 /* 1 = 16bit */
305 #define SCTRL_R1SMB 0x00000010 /* 1 = stereo */
306 #define SCTRL_R1FMT 0x00000030 /* format mask */
307 #define SCTRL_SH_R1FMT 4
308 #define SCTRL_P2SEB 0x00000008 /* 1 = 16bit */
309 #define SCTRL_P2SMB 0x00000004 /* 1 = stereo */
310 #define SCTRL_P2FMT 0x0000000c /* format mask */
311 #define SCTRL_SH_P2FMT 2
312 #define SCTRL_P1SEB 0x00000002 /* 1 = 16bit */
313 #define SCTRL_P1SMB 0x00000001 /* 1 = stereo */
314 #define SCTRL_P1FMT 0x00000003 /* format mask */
315 #define SCTRL_SH_P1FMT 0
316
317 /* codec constants */
318
319 #define CODEC_ID_DEDICATEDMIC 0x001
320 #define CODEC_ID_MODEMCODEC 0x002
321 #define CODEC_ID_BASSTREBLE 0x004
322 #define CODEC_ID_SIMULATEDSTEREO 0x008
323 #define CODEC_ID_HEADPHONEOUT 0x010
324 #define CODEC_ID_LOUDNESS 0x020
325 #define CODEC_ID_18BITDAC 0x040
326 #define CODEC_ID_20BITDAC 0x080
327 #define CODEC_ID_18BITADC 0x100
328 #define CODEC_ID_20BITADC 0x200
329
330 #define CODEC_ID_SESHIFT 10
331 #define CODEC_ID_SEMASK 0x1f
332
333
334 /* misc stuff */
335 #define POLL_COUNT 0x1000
336 #define FMODE_DAC 4 /* slight misuse of mode_t */
337
338 /* MIDI buffer sizes */
339
340 #define MIDIINBUF 256
341 #define MIDIOUTBUF 256
342
343 #define FMODE_MIDI_SHIFT 3
344 #define FMODE_MIDI_READ (FMODE_READ << FMODE_MIDI_SHIFT)
345 #define FMODE_MIDI_WRITE (FMODE_WRITE << FMODE_MIDI_SHIFT)
346
347 #define SND_DEV_DSP16 5
348
349 /* --------------------------------------------------------------------- */
350
351 static const char *stereo_enhancement[] __initdata =
352 {
353 "no 3D stereo enhancement",
354 "Analog Devices Phat Stereo",
355 "Creative Stereo Enhancement",
356 "National Semiconductor 3D Stereo Enhancement",
357 "YAMAHA Ymersion",
358 "BBE 3D Stereo Enhancement",
359 "Crystal Semiconductor 3D Stereo Enhancement",
360 "Qsound QXpander",
361 "Spatializer 3D Stereo Enhancement",
362 "SRS 3D Stereo Enhancement",
363 "Platform Technologies 3D Stereo Enhancement",
364 "AKM 3D Audio",
365 "Aureal Stereo Enhancement",
366 "AZTECH 3D Enhancement",
367 "Binaura 3D Audio Enhancement",
368 "ESS Technology Stereo Enhancement",
369 "Harman International VMAx",
370 "NVidea 3D Stereo Enhancement",
371 "Philips Incredible Sound",
372 "Texas Instruments 3D Stereo Enhancement",
373 "VLSI Technology 3D Stereo Enhancement"
374 };
375
376 /* --------------------------------------------------------------------- */
377
378 struct es1371_state {
379 /* magic */
380 unsigned int magic;
381
382 /* we keep sb cards in a linked list */
383 struct es1371_state *next;
384
385 /* soundcore stuff */
386 int dev_audio;
387 int dev_mixer;
388 int dev_dac;
389 int dev_midi;
390
391 /* hardware resources */
392 unsigned long io; /* long for SPARC */
393 unsigned int irq;
394 u8 rev; /* the chip revision */
395
396 #ifdef ES1371_DEBUG
397 /* debug /proc entry */
398 struct proc_dir_entry *ps;
399 #endif /* ES1371_DEBUG */
400 /* mixer registers; there is no HW readback */
401 struct {
402 unsigned short codec_id;
403 unsigned int modcnt;
404 #ifndef OSS_DOCUMENTED_MIXER_SEMANTICS
405 unsigned short vol[13];
406 #endif /* OSS_DOCUMENTED_MIXER_SEMANTICS */
407 } mix;
408
409 /* wave stuff */
410 unsigned ctrl;
411 unsigned sctrl;
412 unsigned dac1rate, dac2rate, adcrate;
413
414 spinlock_t lock;
415 struct semaphore open_sem;
416 mode_t open_mode;
417 wait_queue_head_t open_wait;
418
419 struct dmabuf {
420 void *rawbuf;
421 unsigned buforder;
422 unsigned numfrag;
423 unsigned fragshift;
424 unsigned hwptr, swptr;
425 unsigned total_bytes;
426 int count;
427 unsigned error; /* over/underrun */
428 wait_queue_head_t wait;
429 /* redundant, but makes calculations easier */
430 unsigned fragsize;
431 unsigned dmasize;
432 unsigned fragsamples;
433 /* OSS stuff */
434 unsigned mapped:1;
435 unsigned ready:1;
436 unsigned endcleared:1;
437 unsigned ossfragshift;
438 int ossmaxfrags;
439 unsigned subdivision;
440 } dma_dac1, dma_dac2, dma_adc;
441
442 /* midi stuff */
443 struct {
444 unsigned ird, iwr, icnt;
445 unsigned ord, owr, ocnt;
446 wait_queue_head_t iwait;
447 wait_queue_head_t owait;
448 unsigned char ibuf[MIDIINBUF];
449 unsigned char obuf[MIDIOUTBUF];
450 } midi;
451 };
452
453 /* --------------------------------------------------------------------- */
454
455 static struct es1371_state *devs = NULL;
456
457 /* --------------------------------------------------------------------- */
458
459 extern inline unsigned ld2(unsigned int x)
460 {
461 unsigned r = 0;
462
463 if (x >= 0x10000) {
464 x >>= 16;
465 r += 16;
466 }
467 if (x >= 0x100) {
468 x >>= 8;
469 r += 8;
470 }
471 if (x >= 0x10) {
472 x >>= 4;
473 r += 4;
474 }
475 if (x >= 4) {
476 x >>= 2;
477 r += 2;
478 }
479 if (x >= 2)
480 r++;
481 return r;
482 }
483
484 /* --------------------------------------------------------------------- */
485
486 static unsigned wait_src_ready(struct es1371_state *s)
487 {
488 unsigned int t, r;
489
490 for (t = 0; t < POLL_COUNT; t++) {
491 if (!((r = inl(s->io + ES1371_REG_SRCONV)) & SRC_BUSY))
492 return r;
493 udelay(1);
494 }
495 printk(KERN_DEBUG "es1371: sample rate converter timeout r = 0x%08x\n", r);
496 return r;
497 }
498
499 static unsigned src_read(struct es1371_state *s, unsigned reg)
500 {
501 unsigned int temp,i,orig;
502
503 /* wait for ready */
504 temp = wait_src_ready (s);
505
506 /* we can only access the SRC at certain times, make sure
507 we're allowed to before we read */
508
509 orig = temp;
510 /* expose the SRC state bits */
511 outl ( (temp & SRC_CTLMASK) | (reg << SRC_RAMADDR_SHIFT) | 0x10000UL,
512 s->io + ES1371_REG_SRCONV);
513
514 /* now, wait for busy and the correct time to read */
515 temp = wait_src_ready (s);
516
517 if ( (temp & 0x00870000UL ) != ( SRC_OKSTATE << 16 )){
518 /* wait for the right state */
519 for (i=0; i<POLL_COUNT; i++){
520 temp = inl (s->io + ES1371_REG_SRCONV);
521 if ( (temp & 0x00870000UL ) == ( SRC_OKSTATE << 16 ))
522 break;
523 }
524 }
525
526 /* hide the state bits */
527 outl ((orig & SRC_CTLMASK) | (reg << SRC_RAMADDR_SHIFT), s->io + ES1371_REG_SRCONV);
528 return temp;
529
530
531 }
532
533 static void src_write(struct es1371_state *s, unsigned reg, unsigned data)
534 {
535
536 unsigned int r;
537
538 r = wait_src_ready(s) & (SRC_DIS | SRC_DDAC1 | SRC_DDAC2 | SRC_DADC);
539 r |= (reg << SRC_RAMADDR_SHIFT) & SRC_RAMADDR_MASK;
540 r |= (data << SRC_RAMDATA_SHIFT) & SRC_RAMDATA_MASK;
541 outl(r | SRC_WE, s->io + ES1371_REG_SRCONV);
542
543 }
544
545 /* --------------------------------------------------------------------- */
546
547 /* most of the following here is black magic */
548 static void set_adc_rate(struct es1371_state *s, unsigned rate)
549 {
550 unsigned long flags;
551 unsigned int n, truncm, freq;
552
553 if (rate > 48000)
554 rate = 48000;
555 if (rate < 4000)
556 rate = 4000;
557 n = rate / 3000;
558 if ((1 << n) & ((1 << 15) | (1 << 13) | (1 << 11) | (1 << 9)))
559 n--;
560 truncm = (21 * n - 1) | 1;
561 freq = ((48000UL << 15) / rate) * n;
562 s->adcrate = (48000UL << 15) / (freq / n);
563 spin_lock_irqsave(&s->lock, flags);
564 if (rate >= 24000) {
565 if (truncm > 239)
566 truncm = 239;
567 src_write(s, SRCREG_ADC+SRCREG_TRUNC_N,
568 (((239 - truncm) >> 1) << 9) | (n << 4));
569 } else {
570 if (truncm > 119)
571 truncm = 119;
572 src_write(s, SRCREG_ADC+SRCREG_TRUNC_N,
573 0x8000 | (((119 - truncm) >> 1) << 9) | (n << 4));
574 }
575 src_write(s, SRCREG_ADC+SRCREG_INT_REGS,
576 (src_read(s, SRCREG_ADC+SRCREG_INT_REGS) & 0x00ff) |
577 ((freq >> 5) & 0xfc00));
578 src_write(s, SRCREG_ADC+SRCREG_VFREQ_FRAC, freq & 0x7fff);
579 src_write(s, SRCREG_VOL_ADC, n << 8);
580 src_write(s, SRCREG_VOL_ADC+1, n << 8);
581 spin_unlock_irqrestore(&s->lock, flags);
582 }
583
584
585 static void set_dac1_rate(struct es1371_state *s, unsigned rate)
586 {
587 unsigned long flags;
588 unsigned int freq, r;
589
590 if (rate > 48000)
591 rate = 48000;
592 if (rate < 4000)
593 rate = 4000;
594 freq = (rate << 15) / 3000;
595 s->dac1rate = (freq * 3000) >> 15;
596 spin_lock_irqsave(&s->lock, flags);
597 r = (wait_src_ready(s) & (SRC_DIS | SRC_DDAC2 | SRC_DADC)) | SRC_DDAC1;
598 outl(r, s->io + ES1371_REG_SRCONV);
599 src_write(s, SRCREG_DAC1+SRCREG_INT_REGS,
600 (src_read(s, SRCREG_DAC1+SRCREG_INT_REGS) & 0x00ff) |
601 ((freq >> 5) & 0xfc00));
602 src_write(s, SRCREG_DAC1+SRCREG_VFREQ_FRAC, freq & 0x7fff);
603 r = (wait_src_ready(s) & (SRC_DIS | SRC_DDAC2 | SRC_DADC));
604 outl(r, s->io + ES1371_REG_SRCONV);
605 spin_unlock_irqrestore(&s->lock, flags);
606 }
607
608 static void set_dac2_rate(struct es1371_state *s, unsigned rate)
609 {
610 unsigned long flags;
611 unsigned int freq, r;
612
613 if (rate > 48000)
614 rate = 48000;
615 if (rate < 4000)
616 rate = 4000;
617 freq = (rate << 15) / 3000;
618 s->dac2rate = (freq * 3000) >> 15;
619 printk (KERN_DEBUG "dac2 freq: %d\n", freq);
620 spin_lock_irqsave(&s->lock, flags);
621 r = (wait_src_ready(s) & (SRC_DIS | SRC_DDAC1 | SRC_DADC)) | SRC_DDAC2;
622 outl(r, s->io + ES1371_REG_SRCONV);
623 src_write(s, SRCREG_DAC2+SRCREG_INT_REGS,
624 (src_read(s, SRCREG_DAC2+SRCREG_INT_REGS) & 0x00ff) |
625 ((freq >> 5) & 0xfc00));
626 src_write(s, SRCREG_DAC2+SRCREG_VFREQ_FRAC, freq & 0x7fff);
627 r = (wait_src_ready(s) & (SRC_DIS | SRC_DDAC1 | SRC_DADC));
628 outl(r, s->io + ES1371_REG_SRCONV);
629 spin_unlock_irqrestore(&s->lock, flags);
630 }
631
632 /* --------------------------------------------------------------------- */
633
634 static void __init src_init(struct es1371_state *s)
635 {
636 unsigned int i;
637
638 /* before we enable or disable the SRC we need
639 to wait for it to become ready */
640 wait_src_ready(s);
641
642 outl(SRC_DIS, s->io + ES1371_REG_SRCONV);
643
644 for (i = 0; i < 0x80; i++)
645 src_write(s, i, 0);
646
647 src_write(s, SRCREG_DAC1+SRCREG_TRUNC_N, 16 << 4);
648 src_write(s, SRCREG_DAC1+SRCREG_INT_REGS, 16 << 10);
649 src_write(s, SRCREG_DAC2+SRCREG_TRUNC_N, 16 << 4);
650 src_write(s, SRCREG_DAC2+SRCREG_INT_REGS, 16 << 10);
651 src_write(s, SRCREG_VOL_ADC, 1 << 12);
652 src_write(s, SRCREG_VOL_ADC+1, 1 << 12);
653 src_write(s, SRCREG_VOL_DAC1, 1 << 12);
654 src_write(s, SRCREG_VOL_DAC1+1, 1 << 12);
655 src_write(s, SRCREG_VOL_DAC2, 1 << 12);
656 src_write(s, SRCREG_VOL_DAC2+1, 1 << 12);
657 set_adc_rate(s, 22050);
658 set_dac1_rate(s, 22050);
659 set_dac2_rate(s, 22050);
660
661 /* WARNING:
662 * enabling the sample rate converter without properly programming
663 * its parameters causes the chip to lock up (the SRC busy bit will
664 * be stuck high, and I've found no way to rectify this other than
665 * power cycle)
666 */
667 wait_src_ready(s);
668 outl(0, s->io+ES1371_REG_SRCONV);
669 }
670
671 /* --------------------------------------------------------------------- */
672
673 static void wrcodec(struct es1371_state *s, unsigned addr, unsigned data)
674 {
675 unsigned long flags;
676 unsigned t, x;
677
678 for (t = 0; t < POLL_COUNT; t++)
679 if (!(inl(s->io+ES1371_REG_CODEC) & CODEC_WIP))
680 break;
681 spin_lock_irqsave(&s->lock, flags);
682
683 /* save the current state for later */
684 x = wait_src_ready(s);
685
686 /* enable SRC state data in SRC mux */
687 outl(( x & (SRC_DIS | SRC_DDAC1 | SRC_DDAC2 | SRC_DADC)) | 0x00010000,
688 s->io+ES1371_REG_SRCONV);
689
690 /* wait for not busy (state 0) first to avoid
691 transition states */
692 for (t=0; t<POLL_COUNT; t++){
693 if((inl(s->io+ES1371_REG_SRCONV) & 0x00870000) ==0 )
694 break;
695 udelay(1);
696 }
697
698 /* wait for a SAFE time to write addr/data and then do it, dammit */
699 for (t=0; t<POLL_COUNT; t++){
700 if((inl(s->io+ES1371_REG_SRCONV) & 0x00870000) ==0x00010000)
701 break;
702 udelay(1);
703 }
704
705 outl(((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) |
706 ((data << CODEC_PODAT_SHIFT) & CODEC_PODAT_MASK), s->io+ES1371_REG_CODEC);
707
708 /* restore SRC reg */
709 wait_src_ready(s);
710 outl(x, s->io+ES1371_REG_SRCONV);
711 spin_unlock_irqrestore(&s->lock, flags);
712 }
713
714 static unsigned rdcodec(struct es1371_state *s, unsigned addr)
715 {
716 unsigned long flags;
717 unsigned t, x;
718
719 /* wait for WIP to go away */
720 for (t = 0; t < 0x1000; t++)
721 if (!(inl(s->io+ES1371_REG_CODEC) & CODEC_WIP))
722 break;
723 spin_lock_irqsave(&s->lock, flags);
724
725 /* save the current state for later */
726 x = (wait_src_ready(s) & (SRC_DIS | SRC_DDAC1 | SRC_DDAC2 | SRC_DADC));
727
728 /* enable SRC state data in SRC mux */
729 outl( x | 0x00010000,
730 s->io+ES1371_REG_SRCONV);
731
732 /* wait for not busy (state 0) first to avoid
733 transition states */
734 for (t=0; t<POLL_COUNT; t++){
735 if((inl(s->io+ES1371_REG_SRCONV) & 0x00870000) ==0 )
736 break;
737 udelay(1);
738 }
739
740 /* wait for a SAFE time to write addr/data and then do it, dammit */
741 for (t=0; t<POLL_COUNT; t++){
742 if((inl(s->io+ES1371_REG_SRCONV) & 0x00870000) ==0x00010000)
743 break;
744 udelay(1);
745 }
746
747 outl(((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | CODEC_PORD, s->io+ES1371_REG_CODEC);
748 /* restore SRC reg */
749 wait_src_ready(s);
750 outl(x, s->io+ES1371_REG_SRCONV);
751 spin_unlock_irqrestore(&s->lock, flags);
752
753 /* wait for WIP again */
754 for (t = 0; t < 0x1000; t++)
755 if (!(inl(s->io+ES1371_REG_CODEC) & CODEC_WIP))
756 break;
757
758 /* now wait for the stinkin' data (RDY) */
759 for (t = 0; t < POLL_COUNT; t++)
760 if ((x = inl(s->io+ES1371_REG_CODEC)) & CODEC_RDY)
761 break;
762
763 return ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT);
764 }
765
766 /* --------------------------------------------------------------------- */
767
768 extern inline void stop_adc(struct es1371_state *s)
769 {
770 unsigned long flags;
771
772 spin_lock_irqsave(&s->lock, flags);
773 s->ctrl &= ~CTRL_ADC_EN;
774 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
775 spin_unlock_irqrestore(&s->lock, flags);
776 }
777
778 extern inline void stop_dac1(struct es1371_state *s)
779 {
780 unsigned long flags;
781
782 spin_lock_irqsave(&s->lock, flags);
783 s->ctrl &= ~CTRL_DAC1_EN;
784 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
785 spin_unlock_irqrestore(&s->lock, flags);
786 }
787
788 extern inline void stop_dac2(struct es1371_state *s)
789 {
790 unsigned long flags;
791
792 spin_lock_irqsave(&s->lock, flags);
793 s->ctrl &= ~CTRL_DAC2_EN;
794 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
795 spin_unlock_irqrestore(&s->lock, flags);
796 }
797
798 static void start_dac1(struct es1371_state *s)
799 {
800 unsigned long flags;
801 unsigned fragremain, fshift;
802
803 spin_lock_irqsave(&s->lock, flags);
804 if (!(s->ctrl & CTRL_DAC1_EN) && (s->dma_dac1.mapped || s->dma_dac1.count > 0)
805 && s->dma_dac1.ready) {
806 s->ctrl |= CTRL_DAC1_EN;
807 s->sctrl = (s->sctrl & ~(SCTRL_P1LOOPSEL | SCTRL_P1PAUSE | SCTRL_P1SCTRLD)) | SCTRL_P1INTEN;
808 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
809 fragremain = ((- s->dma_dac1.hwptr) & (s->dma_dac1.fragsize-1));
810 fshift = sample_shift[(s->sctrl & SCTRL_P1FMT) >> SCTRL_SH_P1FMT];
811 if (fragremain < 2*fshift)
812 fragremain = s->dma_dac1.fragsize;
813 outl((fragremain >> fshift) - 1, s->io+ES1371_REG_DAC1_SCOUNT);
814 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
815 outl((s->dma_dac1.fragsize >> fshift) - 1, s->io+ES1371_REG_DAC1_SCOUNT);
816 }
817 spin_unlock_irqrestore(&s->lock, flags);
818 }
819
820 static void start_dac2(struct es1371_state *s)
821 {
822 unsigned long flags;
823 unsigned fragremain, fshift;
824
825 spin_lock_irqsave(&s->lock, flags);
826 if (!(s->ctrl & CTRL_DAC2_EN) && (s->dma_dac2.mapped || s->dma_dac2.count > 0)
827 && s->dma_dac2.ready) {
828 s->ctrl |= CTRL_DAC2_EN;
829 s->sctrl = (s->sctrl & ~(SCTRL_P2LOOPSEL | SCTRL_P2PAUSE | SCTRL_P2DACSEN |
830 SCTRL_P2ENDINC | SCTRL_P2STINC)) | SCTRL_P2INTEN |
831 (((s->sctrl & SCTRL_P2FMT) ? 2 : 1) << SCTRL_SH_P2ENDINC) |
832 (0 << SCTRL_SH_P2STINC);
833 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
834 fragremain = ((- s->dma_dac2.hwptr) & (s->dma_dac2.fragsize-1));
835 fshift = sample_shift[(s->sctrl & SCTRL_P2FMT) >> SCTRL_SH_P2FMT];
836 if (fragremain < 2*fshift)
837 fragremain = s->dma_dac2.fragsize;
838 outl((fragremain >> fshift) - 1, s->io+ES1371_REG_DAC2_SCOUNT);
839 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
840 outl((s->dma_dac2.fragsize >> fshift) - 1, s->io+ES1371_REG_DAC2_SCOUNT);
841 }
842 spin_unlock_irqrestore(&s->lock, flags);
843 }
844
845 static void start_adc(struct es1371_state *s)
846 {
847 unsigned long flags;
848 unsigned fragremain, fshift;
849
850 spin_lock_irqsave(&s->lock, flags);
851 if (!(s->ctrl & CTRL_ADC_EN) && (s->dma_adc.mapped || s->dma_adc.count < (signed)(s->dma_adc.dmasize - 2*s->dma_adc.fragsize))
852 && s->dma_adc.ready) {
853 s->ctrl |= CTRL_ADC_EN;
854 s->sctrl = (s->sctrl & ~SCTRL_R1LOOPSEL) | SCTRL_R1INTEN;
855 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
856 fragremain = ((- s->dma_adc.hwptr) & (s->dma_adc.fragsize-1));
857 fshift = sample_shift[(s->sctrl & SCTRL_R1FMT) >> SCTRL_SH_R1FMT];
858 if (fragremain < 2*fshift)
859 fragremain = s->dma_adc.fragsize;
860 outl((fragremain >> fshift) - 1, s->io+ES1371_REG_ADC_SCOUNT);
861 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
862 outl((s->dma_adc.fragsize >> fshift) - 1, s->io+ES1371_REG_ADC_SCOUNT);
863 }
864 spin_unlock_irqrestore(&s->lock, flags);
865 }
866
867 /* --------------------------------------------------------------------- */
868
869 #define DMABUF_DEFAULTORDER (17-PAGE_SHIFT)
870 #define DMABUF_MINORDER 1
871
872
873 extern inline void dealloc_dmabuf(struct dmabuf *db)
874 {
875 unsigned long map, mapend;
876
877 if (db->rawbuf) {
878 /* undo marking the pages as reserved */
879 mapend = MAP_NR(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
880 for (map = MAP_NR(db->rawbuf); map <= mapend; map++)
881 clear_bit(PG_reserved, &mem_map[map].flags);
882 free_pages((unsigned long)db->rawbuf, db->buforder);
883 }
884 db->rawbuf = NULL;
885 db->mapped = db->ready = 0;
886 }
887
888 static int prog_dmabuf(struct es1371_state *s, struct dmabuf *db, unsigned rate, unsigned fmt, unsigned reg)
889 {
890 int order;
891 unsigned bytepersec;
892 unsigned bufs;
893 unsigned long map, mapend;
894
895 db->hwptr = db->swptr = db->total_bytes = db->count = db->error = db->endcleared = 0;
896 if (!db->rawbuf) {
897 db->ready = db->mapped = 0;
898 for (order = DMABUF_DEFAULTORDER; order >= DMABUF_MINORDER; order--)
899 if ((db->rawbuf = (void *)__get_free_pages(GFP_KERNEL, order)))
900 break;
901 if (!db->rawbuf)
902 return -ENOMEM;
903 db->buforder = order;
904 /* now mark the pages as reserved; otherwise remap_page_range doesn't do what we want */
905 mapend = MAP_NR(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
906 for (map = MAP_NR(db->rawbuf); map <= mapend; map++)
907 set_bit(PG_reserved, &mem_map[map].flags);
908 }
909 fmt &= ES1371_FMT_MASK;
910 bytepersec = rate << sample_shift[fmt];
911 bufs = PAGE_SIZE << db->buforder;
912 if (db->ossfragshift) {
913 if ((1000 << db->ossfragshift) < bytepersec)
914 db->fragshift = ld2(bytepersec/1000);
915 else
916 db->fragshift = db->ossfragshift;
917 } else {
918 db->fragshift = ld2(bytepersec/100/(db->subdivision ? db->subdivision : 1));
919 if (db->fragshift < 3)
920 db->fragshift = 3;
921 }
922 db->numfrag = bufs >> db->fragshift;
923 while (db->numfrag < 4 && db->fragshift > 3) {
924 db->fragshift--;
925 db->numfrag = bufs >> db->fragshift;
926 }
927 db->fragsize = 1 << db->fragshift;
928 if (db->ossmaxfrags >= 4 && db->ossmaxfrags < db->numfrag)
929 db->numfrag = db->ossmaxfrags;
930 db->fragsamples = db->fragsize >> sample_shift[fmt];
931 db->dmasize = db->numfrag << db->fragshift;
932 memset(db->rawbuf, (fmt & ES1371_FMT_S16) ? 0 : 0x80, db->dmasize);
933 outl((reg >> 8) & 15, s->io+ES1371_REG_MEMPAGE);
934 outl(virt_to_bus(db->rawbuf), s->io+(reg & 0xff));
935 outl((db->dmasize >> 2)-1, s->io+((reg + 4) & 0xff));
936 db->ready = 1;
937 return 0;
938 }
939
940 extern inline int prog_dmabuf_adc(struct es1371_state *s)
941 {
942 stop_adc(s);
943 return prog_dmabuf(s, &s->dma_adc, s->adcrate, (s->sctrl >> SCTRL_SH_R1FMT) & ES1371_FMT_MASK,
944 ES1371_REG_ADC_FRAMEADR);
945 }
946
947 extern inline int prog_dmabuf_dac2(struct es1371_state *s)
948 {
949 stop_dac2(s);
950 return prog_dmabuf(s, &s->dma_dac2, s->dac2rate, (s->sctrl >> SCTRL_SH_P2FMT) & ES1371_FMT_MASK,
951 ES1371_REG_DAC2_FRAMEADR);
952 }
953
954 extern inline int prog_dmabuf_dac1(struct es1371_state *s)
955 {
956 stop_dac1(s);
957 return prog_dmabuf(s, &s->dma_dac1, s->dac1rate, (s->sctrl >> SCTRL_SH_P1FMT) & ES1371_FMT_MASK,
958 ES1371_REG_DAC1_FRAMEADR);
959 }
960
961 extern inline unsigned get_hwptr(struct es1371_state *s, struct dmabuf *db, unsigned reg)
962 {
963 unsigned hwptr, diff;
964
965 outl((reg >> 8) & 15, s->io+ES1371_REG_MEMPAGE);
966 hwptr = (inl(s->io+(reg & 0xff)) >> 14) & 0x3fffc;
967 diff = (db->dmasize + hwptr - db->hwptr) % db->dmasize;
968 db->hwptr = hwptr;
969 return diff;
970 }
971
972 extern inline void clear_advance(void *buf, unsigned bsize, unsigned bptr, unsigned len, unsigned char c)
973 {
974 if (bptr + len > bsize) {
975 unsigned x = bsize - bptr;
976 memset(((char *)buf) + bptr, c, x);
977 bptr = 0;
978 len -= x;
979 }
980 memset(((char *)buf) + bptr, c, len);
981 }
982
983 /* call with spinlock held! */
984 static void es1371_update_ptr(struct es1371_state *s)
985 {
986 int diff;
987
988 /* update ADC pointer */
989 if (s->ctrl & CTRL_ADC_EN) {
990 diff = get_hwptr(s, &s->dma_adc, ES1371_REG_ADC_FRAMECNT);
991 s->dma_adc.total_bytes += diff;
992 s->dma_adc.count += diff;
993 if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
994 wake_up(&s->dma_adc.wait);
995 if (!s->dma_adc.mapped) {
996 if (s->dma_adc.count > (signed)(s->dma_adc.dmasize - ((3 * s->dma_adc.fragsize) >> 1))) {
997 s->ctrl &= ~CTRL_ADC_EN;
998 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
999 s->dma_adc.error++;
1000 }
1001 }
1002 }
1003 /* update DAC1 pointer */
1004 if (s->ctrl & CTRL_DAC1_EN) {
1005 diff = get_hwptr(s, &s->dma_dac1, ES1371_REG_DAC1_FRAMECNT);
1006 s->dma_dac1.total_bytes += diff;
1007 if (s->dma_dac1.mapped) {
1008 s->dma_dac1.count += diff;
1009 if (s->dma_dac1.count >= (signed)s->dma_dac1.fragsize)
1010 wake_up(&s->dma_dac1.wait);
1011 } else {
1012 s->dma_dac1.count -= diff;
1013 if (s->dma_dac1.count <= 0) {
1014 s->ctrl &= ~CTRL_DAC1_EN;
1015 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
1016 s->dma_dac1.error++;
1017 } else if (s->dma_dac1.count <= (signed)s->dma_dac1.fragsize && !s->dma_dac1.endcleared) {
1018 clear_advance(s->dma_dac1.rawbuf, s->dma_dac1.dmasize, s->dma_dac1.swptr,
1019 s->dma_dac1.fragsize, (s->sctrl & SCTRL_P1SEB) ? 0 : 0x80);
1020 s->dma_dac1.endcleared = 1;
1021 }
1022 if (s->dma_dac1.count + (signed)s->dma_dac1.fragsize <= (signed)s->dma_dac1.dmasize)
1023 wake_up(&s->dma_dac1.wait);
1024 }
1025 }
1026 /* update DAC2 pointer */
1027 if (s->ctrl & CTRL_DAC2_EN) {
1028 diff = get_hwptr(s, &s->dma_dac2, ES1371_REG_DAC2_FRAMECNT);
1029 s->dma_dac2.total_bytes += diff;
1030 if (s->dma_dac2.mapped) {
1031 s->dma_dac2.count += diff;
1032 if (s->dma_dac2.count >= (signed)s->dma_dac2.fragsize)
1033 wake_up(&s->dma_dac2.wait);
1034 } else {
1035 s->dma_dac2.count -= diff;
1036 if (s->dma_dac2.count <= 0) {
1037 s->ctrl &= ~CTRL_DAC2_EN;
1038 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
1039 s->dma_dac2.error++;
1040 } else if (s->dma_dac2.count <= (signed)s->dma_dac2.fragsize && !s->dma_dac2.endcleared) {
1041 clear_advance(s->dma_dac2.rawbuf, s->dma_dac2.dmasize, s->dma_dac2.swptr,
1042 s->dma_dac2.fragsize, (s->sctrl & SCTRL_P2SEB) ? 0 : 0x80);
1043 s->dma_dac2.endcleared = 1;
1044 }
1045 if (s->dma_dac2.count + (signed)s->dma_dac2.fragsize <= (signed)s->dma_dac2.dmasize)
1046 wake_up(&s->dma_dac2.wait);
1047 }
1048 }
1049 }
1050
1051 /* hold spinlock for the following! */
1052 static void es1371_handle_midi(struct es1371_state *s)
1053 {
1054 unsigned char ch;
1055 int wake;
1056
1057 if (!(s->ctrl & CTRL_UART_EN))
1058 return;
1059 wake = 0;
1060 while (inb(s->io+ES1371_REG_UART_STATUS) & USTAT_RXRDY) {
1061 ch = inb(s->io+ES1371_REG_UART_DATA);
1062 if (s->midi.icnt < MIDIINBUF) {
1063 s->midi.ibuf[s->midi.iwr] = ch;
1064 s->midi.iwr = (s->midi.iwr + 1) % MIDIINBUF;
1065 s->midi.icnt++;
1066 }
1067 wake = 1;
1068 }
1069 if (wake)
1070 wake_up(&s->midi.iwait);
1071 wake = 0;
1072 while ((inb(s->io+ES1371_REG_UART_STATUS) & USTAT_TXRDY) && s->midi.ocnt > 0) {
1073 outb(s->midi.obuf[s->midi.ord], s->io+ES1371_REG_UART_DATA);
1074 s->midi.ord = (s->midi.ord + 1) % MIDIOUTBUF;
1075 s->midi.ocnt--;
1076 if (s->midi.ocnt < MIDIOUTBUF-16)
1077 wake = 1;
1078 }
1079 if (wake)
1080 wake_up(&s->midi.owait);
1081 outb((s->midi.ocnt > 0) ? UCTRL_RXINTEN | UCTRL_ENA_TXINT : UCTRL_RXINTEN, s->io+ES1371_REG_UART_CONTROL);
1082 }
1083
1084 static void es1371_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1085 {
1086 struct es1371_state *s = (struct es1371_state *)dev_id;
1087 unsigned int intsrc, sctl;
1088
1089 /* fastpath out, to ease interrupt sharing */
1090 intsrc = inl(s->io+ES1371_REG_STATUS);
1091 if (!(intsrc & 0x80000000))
1092 return;
1093 spin_lock(&s->lock);
1094 /* clear audio interrupts first */
1095 sctl = s->sctrl;
1096 if (intsrc & STAT_ADC)
1097 sctl &= ~SCTRL_R1INTEN;
1098 if (intsrc & STAT_DAC1)
1099 sctl &= ~SCTRL_P1INTEN;
1100 if (intsrc & STAT_DAC2)
1101 sctl &= ~SCTRL_P2INTEN;
1102 outl(sctl, s->io+ES1371_REG_SERIAL_CONTROL);
1103 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1104 es1371_update_ptr(s);
1105 es1371_handle_midi(s);
1106 spin_unlock(&s->lock);
1107 }
1108
1109 /* --------------------------------------------------------------------- */
1110
1111 static const char invalid_magic[] = KERN_CRIT "es1371: invalid magic value\n";
1112
1113 #define VALIDATE_STATE(s) \
1114 ({ \
1115 if (!(s) || (s)->magic != ES1371_MAGIC) { \
1116 printk(invalid_magic); \
1117 return -ENXIO; \
1118 } \
1119 })
1120
1121 /* --------------------------------------------------------------------- */
1122
1123 /*
1124 * AC97 Mixer Register to Connections mapping of the Concert 97 board
1125 *
1126 * AC97_MASTER_VOL_STEREO Line Out
1127 * AC97_MASTER_VOL_MONO TAD Output
1128 * AC97_PCBEEP_VOL none
1129 * AC97_PHONE_VOL TAD Input (mono)
1130 * AC97_MIC_VOL MIC Input (mono)
1131 * AC97_LINEIN_VOL Line Input (stereo)
1132 * AC97_CD_VOL CD Input (stereo)
1133 * AC97_VIDEO_VOL none
1134 * AC97_AUX_VOL Aux Input (stereo)
1135 * AC97_PCMOUT_VOL Wave Output (stereo)
1136 */
1137
1138 #define AC97_PESSIMISTIC
1139
1140 /*
1141 * this define causes the driver to assume that all optional
1142 * AC97 bits are missing. This is what Ensoniq does too in their
1143 * Windows driver. Maybe we should one day autoprobe for these
1144 * bits. But anyway I have to see an AC97 codec that implements
1145 * one of those optional (volume) bits.
1146 */
1147
1148 static const unsigned int recsrc[8] =
1149 {
1150 SOUND_MASK_MIC,
1151 SOUND_MASK_CD,
1152 SOUND_MASK_VIDEO,
1153 SOUND_MASK_LINE1,
1154 SOUND_MASK_LINE,
1155 SOUND_MASK_VOLUME,
1156 SOUND_MASK_PHONEOUT,
1157 SOUND_MASK_PHONEIN
1158 };
1159
1160 static const unsigned char volreg[SOUND_MIXER_NRDEVICES] =
1161 {
1162 /* 5 bit stereo */
1163 [SOUND_MIXER_LINE] = AC97_LINEIN_VOL,
1164 [SOUND_MIXER_CD] = AC97_CD_VOL,
1165 [SOUND_MIXER_VIDEO] = AC97_VIDEO_VOL,
1166 [SOUND_MIXER_LINE1] = AC97_AUX_VOL,
1167 [SOUND_MIXER_PCM] = AC97_PCMOUT_VOL,
1168 /* 6 bit stereo */
1169 [SOUND_MIXER_VOLUME] = AC97_MASTER_VOL_STEREO,
1170 [SOUND_MIXER_PHONEOUT] = AC97_HEADPHONE_VOL,
1171 /* 6 bit mono */
1172 [SOUND_MIXER_OGAIN] = AC97_MASTER_VOL_MONO,
1173 [SOUND_MIXER_PHONEIN] = AC97_PHONE_VOL,
1174 /* 4 bit mono but shifted by 1 */
1175 [SOUND_MIXER_SPEAKER] = AC97_MASTER_TONE,
1176 /* 6 bit mono + preamp */
1177 [SOUND_MIXER_MIC] = AC97_MIC_VOL,
1178 /* 4 bit stereo */
1179 [SOUND_MIXER_RECLEV] = AC97_RECORD_GAIN,
1180 /* 4 bit mono */
1181 [SOUND_MIXER_IGAIN] = AC97_RECORD_GAIN_MIC
1182 };
1183
1184 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
1185
1186 #define swab(x) ((((x) >> 8) & 0xff) | (((x) << 8) & 0xff00))
1187
1188 static int mixer_rdch(struct es1371_state *s, unsigned int ch, int *arg)
1189 {
1190 int j;
1191
1192 switch (ch) {
1193 case SOUND_MIXER_MIC:
1194 j = rdcodec(s, AC97_MIC_VOL);
1195 if (j & AC97_MUTE)
1196 return put_user(0, (int *)arg);
1197 #ifdef AC97_PESSIMISTIC
1198 return put_user(0x4949 - 0x202 * (j & 0x1f) + ((j & 0x40) ? 0x1b1b : 0), (int *)arg);
1199 #else /* AC97_PESSIMISTIC */
1200 return put_user(0x5757 - 0x101 * ((j & 0x3f) * 5 / 4) + ((j & 0x40) ? 0x0d0d : 0), (int *)arg);
1201 #endif /* AC97_PESSIMISTIC */
1202
1203 case SOUND_MIXER_OGAIN:
1204 case SOUND_MIXER_PHONEIN:
1205 j = rdcodec(s, volreg[ch]);
1206 if (j & AC97_MUTE)
1207 return put_user(0, (int *)arg);
1208 #ifdef AC97_PESSIMISTIC
1209 return put_user(0x6464 - 0x303 * (j & 0x1f), (int *)arg);
1210 #else /* AC97_PESSIMISTIC */
1211 return put_user((0x6464 - 0x303 * (j & 0x3f) / 2) & 0x7f7f, (int *)arg);
1212 #endif /* AC97_PESSIMISTIC */
1213
1214 case SOUND_MIXER_PHONEOUT:
1215 if (!(s->mix.codec_id & CODEC_ID_HEADPHONEOUT))
1216 return -EINVAL;
1217 /* fall through */
1218 case SOUND_MIXER_VOLUME:
1219 j = rdcodec(s, volreg[ch]);
1220 if (j & AC97_MUTE)
1221 return put_user(0, (int *)arg);
1222 #ifdef AC97_PESSIMISTIC
1223 return put_user(0x6464 - (swab(j) & 0x1f1f) * 3, (int *)arg);
1224 #else /* AC97_PESSIMISTIC */
1225 return put_user((0x6464 - (swab(j) & 0x3f3f) * 3 / 2) & 0x7f7f, (int *)arg);
1226 #endif /* AC97_PESSIMISTIC */
1227
1228 case SOUND_MIXER_SPEAKER:
1229 j = rdcodec(s, AC97_PCBEEP_VOL);
1230 if (j & AC97_MUTE
1231 return put_user(0, (int *)arg);
1232 return put_user(0x6464 - ((j >> 1) & 0xf) * 0x606, (int *)arg);
1233
1234 case SOUND_MIXER_LINE:
1235 case SOUND_MIXER_CD:
1236 case SOUND_MIXER_VIDEO:
1237 case SOUND_MIXER_LINE1:
1238 case SOUND_MIXER_PCM:
1239 j = rdcodec(s, volreg[ch]);
1240 if (j & AC97_MUTE)
1241 return put_user(0, (int *)arg);
1242 return put_user(0x6464 - (swab(j) & 0x1f1f) * 3, (int *)arg);
1243
1244 case SOUND_MIXER_BASS:
1245 case SOUND_MIXER_TREBLE:
1246 if (!(s->mix.codec_id & CODEC_ID_BASSTREBLE))
1247 return -EINVAL;
1248 j = rdcodec(s, AC97_MASTER_TONE);
1249 if (ch == SOUND_MIXER_BASS)
1250 j >>= 8;
1251 return put_user((((j & 15) * 100) / 15) * 0x101, (int *)arg);
1252
1253 /* SOUND_MIXER_RECLEV and SOUND_MIXER_IGAIN specify gain */
1254 case SOUND_MIXER_RECLEV:
1255 j = rdcodec(s, AC97_RECORD_GAIN);
1256 if (j & AC97_MUTE)
1257 return put_user(0, (int *)arg);
1258 return put_user((swab(j) & 0xf0f) * 6 + 0xa0a, (int *)arg);
1259
1260 case SOUND_MIXER_IGAIN:
1261 if (!(s->mix.codec_id & CODEC_ID_DEDICATEDMIC))
1262 return -EINVAL;
1263 j = rdcodec(s, AC97_RECORD_GAIN_MIC);
1264 if (j & AC97_MUTE)
1265 return put_user(0, (int *)arg);
1266 return put_user((j & 0xf) * 0x606 + 0xa0a, (int *)arg);
1267
1268 default:
1269 return -EINVAL;
1270 }
1271 }
1272
1273 #else /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1274
1275 static const unsigned char volidx[SOUND_MIXER_NRDEVICES] =
1276 {
1277 /* 5 bit stereo */
1278 [SOUND_MIXER_LINE] = 1,
1279 [SOUND_MIXER_CD] = 2,
1280 [SOUND_MIXER_VIDEO] = 3,
1281 [SOUND_MIXER_LINE1] = 4,
1282 [SOUND_MIXER_PCM] = 5,
1283 /* 6 bit stereo */
1284 [SOUND_MIXER_VOLUME] = 6,
1285 [SOUND_MIXER_PHONEOUT] = 7,
1286 /* 6 bit mono */
1287 [SOUND_MIXER_OGAIN] = 8,
1288 [SOUND_MIXER_PHONEIN] = 9,
1289 /* 4 bit mono but shifted by 1 */
1290 [SOUND_MIXER_SPEAKER] = 10,
1291 /* 6 bit mono + preamp */
1292 [SOUND_MIXER_MIC] = 11,
1293 /* 4 bit stereo */
1294 [SOUND_MIXER_RECLEV] = 12,
1295 /* 4 bit mono */
1296 [SOUND_MIXER_IGAIN] = 13
1297 };
1298
1299 #endif /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1300
1301 static int mixer_wrch(struct es1371_state *s, unsigned int ch, int val)
1302 {
1303 int i;
1304 unsigned l1, r1;
1305
1306 l1 = val & 0xff;
1307 r1 = (val >> 8) & 0xff;
1308 if (l1 > 100)
1309 l1 = 100;
1310 if (r1 > 100)
1311 r1 = 100;
1312 switch (ch) {
1313 case SOUND_MIXER_LINE:
1314 case SOUND_MIXER_CD:
1315 case SOUND_MIXER_VIDEO:
1316 case SOUND_MIXER_LINE1:
1317 case SOUND_MIXER_PCM:
1318 if (l1 < 7 && r1 < 7) {
1319 wrcodec(s, volreg[ch], AC97_MUTE);
1320 return 0;
1321 }
1322 if (l1 < 7)
1323 l1 = 7;
1324 if (r1 < 7)
1325 r1 = 7;
1326 wrcodec(s, volreg[ch], (((100 - l1) / 3) << 8) | ((100 - r1) / 3));
1327 return 0;
1328
1329 case SOUND_MIXER_PHONEOUT:
1330 if (!(s->mix.codec_id & CODEC_ID_HEADPHONEOUT))
1331 return -EINVAL;
1332 /* fall through */
1333 case SOUND_MIXER_VOLUME:
1334 #ifdef AC97_PESSIMISTIC
1335 if (l1 < 7 && r1 < 7) {
1336 wrcodec(s, volreg[ch], AC97_MUTE);
1337 return 0;
1338 }
1339 if (l1 < 7)
1340 l1 = 7;
1341 if (r1 < 7)
1342 r1 = 7;
1343 wrcodec(s, volreg[ch], (((100 - l1) / 3) << 8) | ((100 - r1) / 3));
1344 return 0;
1345 #else /* AC97_PESSIMISTIC */
1346 if (l1 < 4 && r1 < 4) {
1347 wrcodec(s, volreg[ch], AC97_MUTE);
1348 return 0;
1349 }
1350 if (l1 < 4)
1351 l1 = 4;
1352 if (r1 < 4)
1353 r1 = 4;
1354 wrcodec(s, volreg[ch], ((2 * (100 - l1) / 3) << 8) | (2 * (100 - r1) / 3));
1355 return 0;
1356 #endif /* AC97_PESSIMISTIC */
1357
1358 case SOUND_MIXER_OGAIN:
1359 case SOUND_MIXER_PHONEIN:
1360 #ifdef AC97_PESSIMISTIC
1361 wrcodec(s, volreg[ch], (l1 < 7) ? AC97_MUTE : (100 - l1) / 3);
1362 return 0;
1363 #else /* AC97_PESSIMISTIC */
1364 wrcodec(s, volreg[ch], (l1 < 4) ? AC97_MUTE : (2 * (100 - l1) / 3));
1365 return 0;
1366 #endif /* AC97_PESSIMISTIC */
1367
1368 case SOUND_MIXER_SPEAKER:
1369 wrcodec(s, AC97_PCBEEP_VOL, (l1 < 10) ? AC97_MUTE : ((100 - l1) / 6) << 1);
1370 return 0;
1371
1372 case SOUND_MIXER_MIC:
1373 #ifdef AC97_PESSIMISTIC
1374 if (l1 < 11) {
1375 wrcodec(s, AC97_MIC_VOL, AC97_MUTE);
1376 return 0;
1377 }
1378 i = 0;
1379 if (l1 >= 27) {
1380 l1 -= 27;
1381 i = 0x40;
1382 }
1383 if (l1 < 11)
1384 l1 = 11;
1385 wrcodec(s, AC97_MIC_VOL, ((73 - l1) / 2) | i);
1386 return 0;
1387 #else /* AC97_PESSIMISTIC */
1388 if (l1 < 9) {
1389 wrcodec(s, AC97_MIC_VOL, AC97_MUTE);
1390 return 0;
1391 }
1392 i = 0;
1393 if (l1 >= 13) {
1394 l1 -= 13;
1395 i = 0x40;
1396 }
1397 if (l1 < 9)
1398 l1 = 9;
1399 wrcodec(s, AC97_MIC_VOL, (((87 - l1) * 4) / 5) | i);
1400 return 0;
1401 #endif /* AC97_PESSIMISTIC */
1402
1403 case SOUND_MIXER_BASS:
1404 val = ((l1 * 15) / 100) & 0xf;
1405 wrcodec(s, AC97_MASTER_TONE, (rdcodec(s, AC97_MASTER_TONE) & 0x00ff) | (val << 8));
1406 return 0;
1407
1408 case SOUND_MIXER_TREBLE:
1409 val = ((l1 * 15) / 100) & 0xf;
1410 wrcodec(s, AC97_MASTER_TONE, (rdcodec(s, AC97_MASTER_TONE) & 0xff00) | val);
1411 return 0;
1412
1413 /* SOUND_MIXER_RECLEV and SOUND_MIXER_IGAIN specify gain */
1414 case SOUND_MIXER_RECLEV:
1415 if (l1 < 10 || r1 < 10) {
1416 wrcodec(s, AC97_RECORD_GAIN, AC97_MUTE);
1417 return 0;
1418 }
1419 if (l1 < 10)
1420 l1 = 10;
1421 if (r1 < 10)
1422 r1 = 10;
1423 wrcodec(s, AC97_RECORD_GAIN, (((l1 - 10) / 6) << 8) | ((r1 - 10) / 6));
1424 return 0;
1425
1426 case SOUND_MIXER_IGAIN:
1427 if (!(s->mix.codec_id & CODEC_ID_DEDICATEDMIC))
1428 return -EINVAL;
1429 wrcodec(s, AC97_RECORD_GAIN_MIC, (l1 < 10) ? AC97_MUTE : ((l1 - 10) / 6) & 0xf);
1430 return 0;
1431
1432 default:
1433 return -EINVAL;
1434 }
1435 }
1436
1437 static int mixer_ioctl(struct es1371_state *s, unsigned int cmd, unsigned long arg)
1438 {
1439 int i, val;
1440
1441 VALIDATE_STATE(s);
1442 if (cmd == SOUND_MIXER_PRIVATE1) {
1443 if (!(s->mix.codec_id & (CODEC_ID_SEMASK << CODEC_ID_SESHIFT)))
1444 return -EINVAL;
1445 get_user_ret(val, (int *)arg, -EFAULT);
1446 if (val & 1)
1447 wrcodec(s, AC97_3D_CONTROL, ((val << 3) & 0xf00) | ((val >> 1) & 0xf));
1448 val = rdcodec(s, AC97_3D_CONTROL);
1449 return put_user(((val & 0xf) << 1) | ((val & 0xf00) >> 3), (int *)arg);
1450 }
1451 if (cmd == SOUND_MIXER_INFO) {
1452 mixer_info info;
1453 strncpy(info.id, "ES1371", sizeof(info.id));
1454 strncpy(info.name, "Ensoniq ES1371", sizeof(info.name));
1455 info.modify_counter = s->mix.modcnt;
1456 if (copy_to_user((void *)arg, &info, sizeof(info)))
1457 return -EFAULT;
1458 return 0;
1459 }
1460 if (cmd == SOUND_OLD_MIXER_INFO) {
1461 _old_mixer_info info;
1462 strncpy(info.id, "ES1371", sizeof(info.id));
1463 strncpy(info.name, "Ensoniq ES1371", sizeof(info.name));
1464 if (copy_to_user((void *)arg, &info, sizeof(info)))
1465 return -EFAULT;
1466 return 0;
1467 }
1468 if (cmd == OSS_GETVERSION)
1469 return put_user(SOUND_VERSION, (int *)arg);
1470 if (_IOC_TYPE(cmd) != 'M' || _IOC_SIZE(cmd) != sizeof(int))
1471 return -EINVAL;
1472 if (_IOC_DIR(cmd) == _IOC_READ) {
1473 switch (_IOC_NR(cmd)) {
1474 case SOUND_MIXER_RECSRC: /* Arg contains a bit for each recording source */
1475 return put_user(recsrc[rdcodec(s, AC97_RECORD_SELECT) & 7], (int *)arg);
1476
1477 case SOUND_MIXER_DEVMASK: /* Arg contains a bit for each supported device */
1478 return put_user(SOUND_MASK_LINE | SOUND_MASK_CD | SOUND_MASK_VIDEO |
1479 SOUND_MASK_LINE1 | SOUND_MASK_PCM | SOUND_MASK_VOLUME |
1480 SOUND_MASK_OGAIN | SOUND_MASK_PHONEIN | SOUND_MASK_SPEAKER |
1481 SOUND_MASK_MIC | SOUND_MASK_RECLEV |
1482 ((s->mix.codec_id & CODEC_ID_BASSTREBLE) ? (SOUND_MASK_BASS | SOUND_MASK_TREBLE) : 0) |
1483 ((s->mix.codec_id & CODEC_ID_HEADPHONEOUT) ? SOUND_MASK_PHONEOUT : 0) |
1484 ((s->mix.codec_id & CODEC_ID_DEDICATEDMIC) ? SOUND_MASK_IGAIN : 0), (int *)arg);
1485
1486 case SOUND_MIXER_RECMASK: /* Arg contains a bit for each supported recording source */
1487 return put_user(SOUND_MASK_MIC | SOUND_MASK_CD | SOUND_MASK_VIDEO | SOUND_MASK_LINE1 |
1488 SOUND_MASK_LINE | SOUND_MASK_VOLUME | SOUND_MASK_PHONEOUT |
1489 SOUND_MASK_PHONEIN, (int *)arg);
1490
1491 case SOUND_MIXER_STEREODEVS: /* Mixer channels supporting stereo */
1492 return put_user(SOUND_MASK_LINE | SOUND_MASK_CD | SOUND_MASK_VIDEO |
1493 SOUND_MASK_LINE1 | SOUND_MASK_PCM | SOUND_MASK_VOLUME |
1494 SOUND_MASK_PHONEOUT | SOUND_MASK_RECLEV, (int *)arg);
1495
1496 case SOUND_MIXER_CAPS:
1497 return put_user(SOUND_CAP_EXCL_INPUT, (int *)arg);
1498
1499 default:
1500 i = _IOC_NR(cmd);
1501 if (i >= SOUND_MIXER_NRDEVICES)
1502 return -EINVAL;
1503 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
1504 return mixer_rdch(s, i, (int *)arg);
1505 #else /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1506 if (!volidx[i])
1507 return -EINVAL;
1508 return put_user(s->mix.vol[volidx[i]-1], (int *)arg);
1509 #endif /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1510 }
1511 }
1512 if (_IOC_DIR(cmd) != (_IOC_READ|_IOC_WRITE))
1513 return -EINVAL;
1514 s->mix.modcnt++;
1515 switch (_IOC_NR(cmd)) {
1516 case SOUND_MIXER_RECSRC: /* Arg contains a bit for each recording source */
1517 get_user_ret(val, (int *)arg, -EFAULT);
1518 i = hweight32(val);
1519 if (i == 0)
1520 return 0; /*val = mixer_recmask(s);*/
1521 else if (i > 1)
1522 val &= ~recsrc[rdcodec(s, AC97_RECORD_SELECT) & 7];
1523 for (i = 0; i < 8; i++) {
1524 if (val & recsrc[i]) {
1525 wrcodec(s, AC97_RECORD_SELECT, 0x101 * i);
1526 return 0;
1527 }
1528 }
1529 return 0;
1530
1531 default:
1532 i = _IOC_NR(cmd);
1533 if (i >= SOUND_MIXER_NRDEVICES)
1534 return -EINVAL;
1535 get_user_ret(val, (int *)arg, -EFAULT);
1536 if (mixer_wrch(s, i, val))
1537 return -EINVAL;
1538 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
1539 return mixer_rdch(s, i, (int *)arg);
1540 #else /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1541 if (!volidx[i])
1542 return -EINVAL;
1543 s->mix.vol[volidx[i]-1] = val;
1544 return put_user(s->mix.vol[volidx[i]-1], (int *)arg);
1545 #endif /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1546 }
1547 }
1548
1549 /* --------------------------------------------------------------------- */
1550
1551 static loff_t es1371_llseek(struct file *file, loff_t offset, int origin)
1552 {
1553 return -ESPIPE;
1554 }
1555
1556 /* --------------------------------------------------------------------- */
1557
1558 static int es1371_open_mixdev(struct inode *inode, struct file *file)
1559 {
1560 int minor = MINOR(inode->i_rdev);
1561 struct es1371_state *s = devs;
1562
1563 while (s && s->dev_mixer != minor)
1564 s = s->next;
1565 if (!s)
1566 return -ENODEV;
1567 VALIDATE_STATE(s);
1568 file->private_data = s;
1569 MOD_INC_USE_COUNT;
1570 return 0;
1571 }
1572
1573 static int es1371_release_mixdev(struct inode *inode, struct file *file)
1574 {
1575 struct es1371_state *s = (struct es1371_state *)file->private_data;
1576
1577 VALIDATE_STATE(s);
1578 MOD_DEC_USE_COUNT;
1579 return 0;
1580 }
1581
1582 static int es1371_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1583 {
1584 return mixer_ioctl((struct es1371_state *)file->private_data, cmd, arg);
1585 }
1586
1587 static /*const*/ struct file_operations es1371_mixer_fops = {
1588 &es1371_llseek,
1589 NULL, /* read */
1590 NULL, /* write */
1591 NULL, /* readdir */
1592 NULL, /* poll */
1593 &es1371_ioctl_mixdev,
1594 NULL, /* mmap */
1595 &es1371_open_mixdev,
1596 NULL, /* flush */
1597 &es1371_release_mixdev,
1598 NULL, /* fsync */
1599 NULL, /* fasync */
1600 NULL, /* check_media_change */
1601 NULL, /* revalidate */
1602 NULL, /* lock */
1603 };
1604
1605 /* --------------------------------------------------------------------- */
1606
1607 static int drain_dac1(struct es1371_state *s, int nonblock)
1608 {
1609 DECLARE_WAITQUEUE(wait, current);
1610 unsigned long flags;
1611 int count, tmo;
1612
1613 if (s->dma_dac1.mapped || !s->dma_dac1.ready)
1614 return 0;
1615
1616 __set_current_state(TASK_INTERRUPTIBLE);
1617 add_wait_queue(&s->dma_dac1.wait, &wait);
1618 for (;;) {
1619 spin_lock_irqsave(&s->lock, flags);
1620 count = s->dma_dac1.count;
1621 spin_unlock_irqrestore(&s->lock, flags);
1622 if (count <= 0)
1623 break;
1624 if (signal_pending(current))
1625 break;
1626 if (nonblock) {
1627 remove_wait_queue(&s->dma_dac1.wait, &wait);
1628 set_current_state(TASK_RUNNING);
1629 return -EBUSY;
1630 }
1631 tmo = 3 * HZ * (count + s->dma_dac1.fragsize) / 2 / s->dac1rate;
1632 tmo >>= sample_shift[(s->sctrl & SCTRL_P1FMT) >> SCTRL_SH_P1FMT];
1633 if (!schedule_timeout(tmo + 1))
1634 printk(KERN_DEBUG "es1371: dac1 dma timed out??\n");
1635 }
1636 remove_wait_queue(&s->dma_dac1.wait, &wait);
1637 set_current_state(TASK_RUNNING);
1638 if (signal_pending(current))
1639 return -ERESTARTSYS;
1640 return 0;
1641 }
1642
1643 static int drain_dac2(struct es1371_state *s, int nonblock)
1644 {
1645 DECLARE_WAITQUEUE(wait, current);
1646 unsigned long flags;
1647 int count, tmo;
1648
1649 if (s->dma_dac2.mapped || !s->dma_dac2.ready)
1650 return 0;
1651
1652 __set_current_state(TASK_UNINTERRUPTIBLE);
1653 add_wait_queue(&s->dma_dac2.wait, &wait);
1654 for (;;) {
1655 spin_lock_irqsave(&s->lock, flags);
1656 count = s->dma_dac2.count;
1657 spin_unlock_irqrestore(&s->lock, flags);
1658 if (count <= 0)
1659 break;
1660 if (signal_pending(current))
1661 break;
1662 if (nonblock) {
1663 remove_wait_queue(&s->dma_dac2.wait, &wait);
1664 set_current_state(TASK_RUNNING);
1665 return -EBUSY;
1666 }
1667 tmo = 3 * HZ * (count + s->dma_dac2.fragsize) / 2 / s->dac2rate;
1668 tmo >>= sample_shift[(s->sctrl & SCTRL_P2FMT) >> SCTRL_SH_P2FMT];
1669 if (!schedule_timeout(tmo + 1))
1670 printk(KERN_DEBUG "es1371: dac2 dma timed out??\n");
1671 }
1672 remove_wait_queue(&s->dma_dac2.wait, &wait);
1673 set_current_state(TASK_RUNNING);
1674 if (signal_pending(current))
1675 return -ERESTARTSYS;
1676 return 0;
1677 }
1678
1679 /* --------------------------------------------------------------------- */
1680
1681 static ssize_t es1371_read(struct file *file, char *buffer, size_t count, loff_t *ppos)
1682 {
1683 struct es1371_state *s = (struct es1371_state *)file->private_data;
1684 ssize_t ret;
1685 unsigned long flags;
1686 unsigned swptr;
1687 int cnt;
1688
1689 VALIDATE_STATE(s);
1690 if (ppos != &file->f_pos)
1691 return -ESPIPE;
1692 if (s->dma_adc.mapped)
1693 return -ENXIO;
1694 if (!s->dma_adc.ready && (ret = prog_dmabuf_adc(s)))
1695 return ret;
1696 if (!access_ok(VERIFY_WRITE, buffer, count))
1697 return -EFAULT;
1698 ret = 0;
1699 while (count > 0) {
1700 spin_lock_irqsave(&s->lock, flags);
1701 swptr = s->dma_adc.swptr;
1702 cnt = s->dma_adc.dmasize-swptr;
1703 if (s->dma_adc.count < cnt)
1704 cnt = s->dma_adc.count;
1705 spin_unlock_irqrestore(&s->lock, flags);
1706 if (cnt > count)
1707 cnt = count;
1708 if (cnt <= 0) {
1709 start_adc(s);
1710 if (file->f_flags & O_NONBLOCK)
1711 return ret ? ret : -EAGAIN;
1712 interruptible_sleep_on(&s->dma_adc.wait);
1713 if (signal_pending(current))
1714 return ret ? ret : -ERESTARTSYS;
1715 continue;
1716 }
1717 if (copy_to_user(buffer, s->dma_adc.rawbuf + swptr, cnt))
1718 return ret ? ret : -EFAULT;
1719 swptr = (swptr + cnt) % s->dma_adc.dmasize;
1720 spin_lock_irqsave(&s->lock, flags);
1721 s->dma_adc.swptr = swptr;
1722 s->dma_adc.count -= cnt;
1723 spin_unlock_irqrestore(&s->lock, flags);
1724 count -= cnt;
1725 buffer += cnt;
1726 ret += cnt;
1727 start_adc(s);
1728 }
1729 return ret;
1730 }
1731
1732 static ssize_t es1371_write(struct file *file, const char *buffer, size_t count, loff_t *ppos)
1733 {
1734 struct es1371_state *s = (struct es1371_state *)file->private_data;
1735 ssize_t ret;
1736 unsigned long flags;
1737 unsigned swptr;
1738 int cnt;
1739
1740 VALIDATE_STATE(s);
1741 if (ppos != &file->f_pos)
1742 return -ESPIPE;
1743 if (s->dma_dac2.mapped)
1744 return -ENXIO;
1745 if (!s->dma_dac2.ready && (ret = prog_dmabuf_dac2(s)))
1746 return ret;
1747 if (!access_ok(VERIFY_READ, buffer, count))
1748 return -EFAULT;
1749 ret = 0;
1750 while (count > 0) {
1751 spin_lock_irqsave(&s->lock, flags);
1752 if (s->dma_dac2.count < 0) {
1753 s->dma_dac2.count = 0;
1754 s->dma_dac2.swptr = s->dma_dac2.hwptr;
1755 }
1756 swptr = s->dma_dac2.swptr;
1757 cnt = s->dma_dac2.dmasize-swptr;
1758 if (s->dma_dac2.count + cnt > s->dma_dac2.dmasize)
1759 cnt = s->dma_dac2.dmasize - s->dma_dac2.count;
1760 spin_unlock_irqrestore(&s->lock, flags);
1761 if (cnt > count)
1762 cnt = count;
1763 if (cnt <= 0) {
1764 start_dac2(s);
1765 if (file->f_flags & O_NONBLOCK)
1766 return ret ? ret : -EAGAIN;
1767 interruptible_sleep_on(&s->dma_dac2.wait);
1768 if (signal_pending(current))
1769 return ret ? ret : -ERESTARTSYS;
1770 continue;
1771 }
1772 if (copy_from_user(s->dma_dac2.rawbuf + swptr, buffer, cnt))
1773 return ret ? ret : -EFAULT;
1774 swptr = (swptr + cnt) % s->dma_dac2.dmasize;
1775 spin_lock_irqsave(&s->lock, flags);
1776 s->dma_dac2.swptr = swptr;
1777 s->dma_dac2.count += cnt;
1778 s->dma_dac2.endcleared = 0;
1779 spin_unlock_irqrestore(&s->lock, flags);
1780 count -= cnt;
1781 buffer += cnt;
1782 ret += cnt;
1783 start_dac2(s);
1784 }
1785 return ret;
1786 }
1787
1788 static unsigned int es1371_poll(struct file *file, struct poll_table_struct *wait)
1789 {
1790 struct es1371_state *s = (struct es1371_state *)file->private_data;
1791 unsigned long flags;
1792 unsigned int mask = 0;
1793
1794 VALIDATE_STATE(s);
1795 if (file->f_mode & FMODE_WRITE)
1796 poll_wait(file, &s->dma_dac2.wait, wait);
1797 if (file->f_mode & FMODE_READ)
1798 poll_wait(file, &s->dma_adc.wait, wait);
1799 spin_lock_irqsave(&s->lock, flags);
1800 es1371_update_ptr(s);
1801 if (file->f_mode & FMODE_READ) {
1802 if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
1803 mask |= POLLIN | POLLRDNORM;
1804 }
1805 if (file->f_mode & FMODE_WRITE) {
1806 if (s->dma_dac2.mapped) {
1807 if (s->dma_dac2.count >= (signed)s->dma_dac2.fragsize)
1808 mask |= POLLOUT | POLLWRNORM;
1809 } else {
1810 if ((signed)s->dma_dac2.dmasize >= s->dma_dac2.count + (signed)s->dma_dac2.fragsize)
1811 mask |= POLLOUT | POLLWRNORM;
1812 }
1813 }
1814 spin_unlock_irqrestore(&s->lock, flags);
1815 return mask;
1816 }
1817
1818 static int es1371_mmap(struct file *file, struct vm_area_struct *vma)
1819 {
1820 struct es1371_state *s = (struct es1371_state *)file->private_data;
1821 struct dmabuf *db;
1822 int ret;
1823 unsigned long size;
1824
1825 VALIDATE_STATE(s);
1826 if (vma->vm_flags & VM_WRITE) {
1827 if ((ret = prog_dmabuf_dac2(s)) != 0)
1828 return ret;
1829 db = &s->dma_dac2;
1830 } else if (vma->vm_flags & VM_READ) {
1831 if ((ret = prog_dmabuf_adc(s)) != 0)
1832 return ret;
1833 db = &s->dma_adc;
1834 } else
1835 return -EINVAL;
1836 if (vma->vm_offset != 0)
1837 return -EINVAL;
1838 size = vma->vm_end - vma->vm_start;
1839 if (size > (PAGE_SIZE << db->buforder))
1840 return -EINVAL;
1841 if (remap_page_range(vma->vm_start, virt_to_phys(db->rawbuf), size, vma->vm_page_prot))
1842 return -EAGAIN;
1843 db->mapped = 1;
1844 return 0;
1845 }
1846
1847 static int es1371_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1848 {
1849 struct es1371_state *s = (struct es1371_state *)file->private_data;
1850 unsigned long flags;
1851 audio_buf_info abinfo;
1852 count_info cinfo;
1853 int val, mapped, ret;
1854
1855 VALIDATE_STATE(s);
1856 mapped = ((file->f_mode & FMODE_WRITE) && s->dma_dac2.mapped) ||
1857 ((file->f_mode & FMODE_READ) && s->dma_adc.mapped);
1858 switch (cmd) {
1859 case OSS_GETVERSION:
1860 return put_user(SOUND_VERSION, (int *)arg);
1861
1862 case SNDCTL_DSP_SYNC:
1863 if (file->f_mode & FMODE_WRITE)
1864 return drain_dac2(s, 0/*file->f_flags & O_NONBLOCK*/);
1865 return 0;
1866
1867 case SNDCTL_DSP_SETDUPLEX:
1868 return 0;
1869
1870 case SNDCTL_DSP_GETCAPS:
1871 return put_user(DSP_CAP_DUPLEX | DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP, (int *)arg);
1872
1873 case SNDCTL_DSP_RESET:
1874 if (file->f_mode & FMODE_WRITE) {
1875 stop_dac2(s);
1876 synchronize_irq();
1877 s->dma_dac2.swptr = s->dma_dac2.hwptr = s->dma_dac2.count = s->dma_dac2.total_bytes = 0;
1878 }
1879 if (file->f_mode & FMODE_READ) {
1880 stop_adc(s);
1881 synchronize_irq();
1882 s->dma_adc.swptr = s->dma_adc.hwptr = s->dma_adc.count = s->dma_adc.total_bytes = 0;
1883 }
1884 return 0;
1885
1886 case SNDCTL_DSP_SPEED:
1887 get_user_ret(val, (int *)arg, -EFAULT);
1888 if (val >= 0) {
1889 if (file->f_mode & FMODE_READ) {
1890 stop_adc(s);
1891 s->dma_adc.ready = 0;
1892 set_adc_rate(s, val);
1893 }
1894 if (file->f_mode & FMODE_WRITE) {
1895 stop_dac2(s);
1896 s->dma_dac2.ready = 0;
1897 printk (KERN_DEBUG "es137x: setting DAC2 rate: %d\n", val);
1898 set_dac2_rate(s, val);
1899 }
1900 }
1901 return put_user((file->f_mode & FMODE_READ) ? s->adcrate : s->dac2rate, (int *)arg);
1902
1903 case SNDCTL_DSP_STEREO:
1904 get_user_ret(val, (int *)arg, -EFAULT);
1905 if (file->f_mode & FMODE_READ) {
1906 stop_adc(s);
1907 s->dma_adc.ready = 0;
1908 spin_lock_irqsave(&s->lock, flags);
1909 if (val)
1910 s->sctrl |= SCTRL_R1SMB;
1911 else
1912 s->sctrl &= ~SCTRL_R1SMB;
1913 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1914 spin_unlock_irqrestore(&s->lock, flags);
1915 }
1916 if (file->f_mode & FMODE_WRITE) {
1917 stop_dac2(s);
1918 s->dma_dac2.ready = 0;
1919 spin_lock_irqsave(&s->lock, flags);
1920 if (val)
1921 s->sctrl |= SCTRL_P2SMB;
1922 else
1923 s->sctrl &= ~SCTRL_P2SMB;
1924 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1925 spin_unlock_irqrestore(&s->lock, flags);
1926 }
1927 return 0;
1928
1929 case SNDCTL_DSP_CHANNELS:
1930 get_user_ret(val, (int *)arg, -EFAULT);
1931 if (val != 0) {
1932 if (file->f_mode & FMODE_READ) {
1933 stop_adc(s);
1934 s->dma_adc.ready = 0;
1935 spin_lock_irqsave(&s->lock, flags);
1936 if (val >= 2)
1937 s->sctrl |= SCTRL_R1SMB;
1938 else
1939 s->sctrl &= ~SCTRL_R1SMB;
1940 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1941 spin_unlock_irqrestore(&s->lock, flags);
1942 }
1943 if (file->f_mode & FMODE_WRITE) {
1944 stop_dac2(s);
1945 s->dma_dac2.ready = 0;
1946 spin_lock_irqsave(&s->lock, flags);
1947 if (val >= 2)
1948 s->sctrl |= SCTRL_P2SMB;
1949 else
1950 s->sctrl &= ~SCTRL_P2SMB;
1951 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1952 spin_unlock_irqrestore(&s->lock, flags);
1953 }
1954 }
1955 return put_user((s->sctrl & ((file->f_mode & FMODE_READ) ? SCTRL_R1SMB : SCTRL_P2SMB)) ? 2 : 1, (int *)arg);
1956
1957 case SNDCTL_DSP_GETFMTS: /* Returns a mask */
1958 return put_user(AFMT_S16_LE|AFMT_U8, (int *)arg);
1959
1960 case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
1961 get_user_ret(val, (int *)arg, -EFAULT);
1962 if (val != AFMT_QUERY) {
1963 if (file->f_mode & FMODE_READ) {
1964 stop_adc(s);
1965 s->dma_adc.ready = 0;
1966 spin_lock_irqsave(&s->lock, flags);
1967 if (val == AFMT_S16_LE)
1968 s->sctrl |= SCTRL_R1SEB;
1969 else
1970 s->sctrl &= ~SCTRL_R1SEB;
1971 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1972 spin_unlock_irqrestore(&s->lock, flags);
1973 }
1974 if (file->f_mode & FMODE_WRITE) {
1975 stop_dac2(s);
1976 s->dma_dac2.ready = 0;
1977 spin_lock_irqsave(&s->lock, flags);
1978 if (val == AFMT_S16_LE)
1979 s->sctrl |= SCTRL_P2SEB;
1980 else
1981 s->sctrl &= ~SCTRL_P2SEB;
1982 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1983 spin_unlock_irqrestore(&s->lock, flags);
1984 }
1985 }
1986 return put_user((s->sctrl & ((file->f_mode & FMODE_READ) ? SCTRL_R1SEB : SCTRL_P2SEB)) ?
1987 AFMT_S16_LE : AFMT_U8, (int *)arg);
1988
1989 case SNDCTL_DSP_POST:
1990 return 0;
1991
1992 case SNDCTL_DSP_GETTRIGGER:
1993 val = 0;
1994 if (file->f_mode & FMODE_READ && s->ctrl & CTRL_ADC_EN)
1995 val |= PCM_ENABLE_INPUT;
1996 if (file->f_mode & FMODE_WRITE && s->ctrl & CTRL_DAC2_EN)
1997 val |= PCM_ENABLE_OUTPUT;
1998 return put_user(val, (int *)arg);
1999
2000 case SNDCTL_DSP_SETTRIGGER:
2001 get_user_ret(val, (int *)arg, -EFAULT);
2002 if (file->f_mode & FMODE_READ) {
2003 if (val & PCM_ENABLE_INPUT) {
2004 if (!s->dma_adc.ready && (ret = prog_dmabuf_adc(s)))
2005 return ret;
2006 start_adc(s);
2007 } else
2008 stop_adc(s);
2009 }
2010 if (file->f_mode & FMODE_WRITE) {
2011 if (val & PCM_ENABLE_OUTPUT) {
2012 if (!s->dma_dac2.ready && (ret = prog_dmabuf_dac2(s)))
2013 return ret;
2014 start_dac2(s);
2015 } else
2016 stop_dac2(s);
2017 }
2018 return 0;
2019
2020 case SNDCTL_DSP_GETOSPACE:
2021 if (!(file->f_mode & FMODE_WRITE))
2022 return -EINVAL;
2023 if (!(s->ctrl & CTRL_DAC2_EN) && (val = prog_dmabuf_dac2(s)) != 0)
2024 return val;
2025 spin_lock_irqsave(&s->lock, flags);
2026 es1371_update_ptr(s);
2027 abinfo.fragsize = s->dma_dac2.fragsize;
2028 abinfo.bytes = s->dma_dac2.dmasize - s->dma_dac2.count;
2029 abinfo.fragstotal = s->dma_dac2.numfrag;
2030 abinfo.fragments = abinfo.bytes >> s->dma_dac2.fragshift;
2031 spin_unlock_irqrestore(&s->lock, flags);
2032 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
2033
2034 case SNDCTL_DSP_GETISPACE:
2035 if (!(file->f_mode & FMODE_READ))
2036 return -EINVAL;
2037 if (!(s->ctrl & CTRL_ADC_EN) && (val = prog_dmabuf_adc(s)) != 0)
2038 return val;
2039 spin_lock_irqsave(&s->lock, flags);
2040 es1371_update_ptr(s);
2041 abinfo.fragsize = s->dma_adc.fragsize;
2042 abinfo.bytes = s->dma_adc.count;
2043 abinfo.fragstotal = s->dma_adc.numfrag;
2044 abinfo.fragments = abinfo.bytes >> s->dma_adc.fragshift;
2045 spin_unlock_irqrestore(&s->lock, flags);
2046 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
2047
2048 case SNDCTL_DSP_NONBLOCK:
2049 file->f_flags |= O_NONBLOCK;
2050 return 0;
2051
2052 case SNDCTL_DSP_GETODELAY:
2053 if (!(file->f_mode & FMODE_WRITE))
2054 return -EINVAL;
2055 spin_lock_irqsave(&s->lock, flags);
2056 es1371_update_ptr(s);
2057 val = s->dma_dac2.count;
2058 spin_unlock_irqrestore(&s->lock, flags);
2059 return put_user(val, (int *)arg);
2060
2061 case SNDCTL_DSP_GETIPTR:
2062 if (!(file->f_mode & FMODE_READ))
2063 return -EINVAL;
2064 spin_lock_irqsave(&s->lock, flags);
2065 es1371_update_ptr(s);
2066 cinfo.bytes = s->dma_adc.total_bytes;
2067 cinfo.blocks = s->dma_adc.count >> s->dma_adc.fragshift;
2068 cinfo.ptr = s->dma_adc.hwptr;
2069 if (s->dma_adc.mapped)
2070 s->dma_adc.count &= s->dma_adc.fragsize-1;
2071 spin_unlock_irqrestore(&s->lock, flags);
2072 return copy_to_user((void *)arg, &cinfo, sizeof(cinfo));
2073
2074 case SNDCTL_DSP_GETOPTR:
2075 if (!(file->f_mode & FMODE_WRITE))
2076 return -EINVAL;
2077 spin_lock_irqsave(&s->lock, flags);
2078 es1371_update_ptr(s);
2079 cinfo.bytes = s->dma_dac2.total_bytes;
2080 cinfo.blocks = s->dma_dac2.count >> s->dma_dac2.fragshift;
2081 cinfo.ptr = s->dma_dac2.hwptr;
2082 if (s->dma_dac2.mapped)
2083 s->dma_dac2.count &= s->dma_dac2.fragsize-1;
2084 spin_unlock_irqrestore(&s->lock, flags);
2085 return copy_to_user((void *)arg, &cinfo, sizeof(cinfo));
2086
2087 case SNDCTL_DSP_GETBLKSIZE:
2088 if (file->f_mode & FMODE_WRITE) {
2089 if ((val = prog_dmabuf_dac2(s)))
2090 return val;
2091 return put_user(s->dma_dac2.fragsize, (int *)arg);
2092 }
2093 if ((val = prog_dmabuf_adc(s)))
2094 return val;
2095 return put_user(s->dma_adc.fragsize, (int *)arg);
2096
2097 case SNDCTL_DSP_SETFRAGMENT:
2098 get_user_ret(val, (int *)arg, -EFAULT);
2099 if (file->f_mode & FMODE_READ) {
2100 s->dma_adc.ossfragshift = val & 0xffff;
2101 s->dma_adc.ossmaxfrags = (val >> 16) & 0xffff;
2102 if (s->dma_adc.ossfragshift < 4)
2103 s->dma_adc.ossfragshift = 4;
2104 if (s->dma_adc.ossfragshift > 15)
2105 s->dma_adc.ossfragshift = 15;
2106 if (s->dma_adc.ossmaxfrags < 4)
2107 s->dma_adc.ossmaxfrags = 4;
2108 }
2109 if (file->f_mode & FMODE_WRITE) {
2110 s->dma_dac2.ossfragshift = val & 0xffff;
2111 s->dma_dac2.ossmaxfrags = (val >> 16) & 0xffff;
2112 if (s->dma_dac2.ossfragshift < 4)
2113 s->dma_dac2.ossfragshift = 4;
2114 if (s->dma_dac2.ossfragshift > 15)
2115 s->dma_dac2.ossfragshift = 15;
2116 if (s->dma_dac2.ossmaxfrags < 4)
2117 s->dma_dac2.ossmaxfrags = 4;
2118 }
2119 return 0;
2120
2121 case SNDCTL_DSP_SUBDIVIDE:
2122 if ((file->f_mode & FMODE_READ && s->dma_adc.subdivision) ||
2123 (file->f_mode & FMODE_WRITE && s->dma_dac2.subdivision))
2124 return -EINVAL;
2125 get_user_ret(val, (int *)arg, -EFAULT);
2126 if (val != 1 && val != 2 && val != 4)
2127 return -EINVAL;
2128 if (file->f_mode & FMODE_READ)
2129 s->dma_adc.subdivision = val;
2130 if (file->f_mode & FMODE_WRITE)
2131 s->dma_dac2.subdivision = val;
2132 return 0;
2133
2134 case SOUND_PCM_READ_RATE:
2135 return put_user((file->f_mode & FMODE_READ) ? s->adcrate : s->dac2rate, (int *)arg);
2136
2137 case SOUND_PCM_READ_CHANNELS:
2138 return put_user((s->sctrl & ((file->f_mode & FMODE_READ) ? SCTRL_R1SMB : SCTRL_P2SMB)) ? 2 : 1, (int *)arg);
2139
2140 case SOUND_PCM_READ_BITS:
2141 return put_user((s->sctrl & ((file->f_mode & FMODE_READ) ? SCTRL_R1SEB : SCTRL_P2SEB)) ? 16 : 8, (int *)arg);
2142
2143 case SOUND_PCM_WRITE_FILTER:
2144 case SNDCTL_DSP_SETSYNCRO:
2145 case SOUND_PCM_READ_FILTER:
2146 return -EINVAL;
2147
2148 }
2149 return mixer_ioctl(s, cmd, arg);
2150 }
2151
2152 static int es1371_open(struct inode *inode, struct file *file)
2153 {
2154 int minor = MINOR(inode->i_rdev);
2155 struct es1371_state *s = devs;
2156 unsigned long flags;
2157
2158 while (s && ((s->dev_audio ^ minor) & ~0xf))
2159 s = s->next;
2160 if (!s)
2161 return -ENODEV;
2162 VALIDATE_STATE(s);
2163 file->private_data = s;
2164 /* wait for device to become free */
2165 down(&s->open_sem);
2166 while (s->open_mode & file->f_mode) {
2167 if (file->f_flags & O_NONBLOCK) {
2168 up(&s->open_sem);
2169 return -EBUSY;
2170 }
2171 up(&s->open_sem);
2172 interruptible_sleep_on(&s->open_wait);
2173 if (signal_pending(current))
2174 return -ERESTARTSYS;
2175 down(&s->open_sem);
2176 }
2177 if (file->f_mode & FMODE_READ) {
2178 s->dma_adc.ossfragshift = s->dma_adc.ossmaxfrags = s->dma_adc.subdivision = 0;
2179 set_adc_rate(s, 8000);
2180 }
2181 if (file->f_mode & FMODE_WRITE) {
2182 s->dma_dac2.ossfragshift = s->dma_dac2.ossmaxfrags = s->dma_dac2.subdivision = 0;
2183 set_dac2_rate(s, 8000);
2184 }
2185 spin_lock_irqsave(&s->lock, flags);
2186 if (file->f_mode & FMODE_READ) {
2187 s->sctrl &= ~SCTRL_R1FMT;
2188 if ((minor & 0xf) == SND_DEV_DSP16)
2189 s->sctrl |= ES1371_FMT_S16_MONO << SCTRL_SH_R1FMT;
2190 else
2191 s->sctrl |= ES1371_FMT_U8_MONO << SCTRL_SH_R1FMT;
2192 }
2193 if (file->f_mode & FMODE_WRITE) {
2194 s->sctrl &= ~SCTRL_P2FMT;
2195 if ((minor & 0xf) == SND_DEV_DSP16)
2196 s->sctrl |= ES1371_FMT_S16_MONO << SCTRL_SH_P2FMT;
2197 else
2198 s->sctrl |= ES1371_FMT_U8_MONO << SCTRL_SH_P2FMT;
2199 }
2200 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
2201 spin_unlock_irqrestore(&s->lock, flags);
2202 s->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
2203 up(&s->open_sem);
2204 MOD_INC_USE_COUNT;
2205 return 0;
2206 }
2207
2208 static int es1371_release(struct inode *inode, struct file *file)
2209 {
2210 struct es1371_state *s = (struct es1371_state *)file->private_data;
2211
2212 VALIDATE_STATE(s);
2213 if (file->f_mode & FMODE_WRITE)
2214 drain_dac2(s, file->f_flags & O_NONBLOCK);
2215 down(&s->open_sem);
2216 if (file->f_mode & FMODE_WRITE) {
2217 stop_dac2(s);
2218 dealloc_dmabuf(&s->dma_dac2);
2219 }
2220 if (file->f_mode & FMODE_READ) {
2221 stop_adc(s);
2222 dealloc_dmabuf(&s->dma_adc);
2223 }
2224 s->open_mode &= (~file->f_mode) & (FMODE_READ|FMODE_WRITE);
2225 up(&s->open_sem);
2226 wake_up(&s->open_wait);
2227 MOD_DEC_USE_COUNT;
2228 return 0;
2229 }
2230
2231 static /*const*/ struct file_operations es1371_audio_fops = {
2232 &es1371_llseek,
2233 &es1371_read,
2234 &es1371_write,
2235 NULL, /* readdir */
2236 &es1371_poll,
2237 &es1371_ioctl,
2238 &es1371_mmap,
2239 &es1371_open,
2240 NULL, /* flush */
2241 &es1371_release,
2242 NULL, /* fsync */
2243 NULL, /* fasync */
2244 NULL, /* check_media_change */
2245 NULL, /* revalidate */
2246 NULL, /* lock */
2247 };
2248
2249 /* --------------------------------------------------------------------- */
2250
2251 static ssize_t es1371_write_dac(struct file *file, const char *buffer, size_t count, loff_t *ppos)
2252 {
2253 struct es1371_state *s = (struct es1371_state *)file->private_data;
2254 ssize_t ret = 0;
2255 unsigned long flags;
2256 unsigned swptr;
2257 int cnt;
2258
2259 VALIDATE_STATE(s);
2260 if (ppos != &file->f_pos)
2261 return -ESPIPE;
2262 if (s->dma_dac1.mapped)
2263 return -ENXIO;
2264 if (!s->dma_dac1.ready && (ret = prog_dmabuf_dac1(s)))
2265 return ret;
2266 if (!access_ok(VERIFY_READ, buffer, count))
2267 return -EFAULT;
2268 while (count > 0) {
2269 spin_lock_irqsave(&s->lock, flags);
2270 if (s->dma_dac1.count < 0) {
2271 s->dma_dac1.count = 0;
2272 s->dma_dac1.swptr = s->dma_dac1.hwptr;
2273 }
2274 swptr = s->dma_dac1.swptr;
2275 cnt = s->dma_dac1.dmasize-swptr;
2276 if (s->dma_dac1.count + cnt > s->dma_dac1.dmasize)
2277 cnt = s->dma_dac1.dmasize - s->dma_dac1.count;
2278 spin_unlock_irqrestore(&s->lock, flags);
2279 if (cnt > count)
2280 cnt = count;
2281 if (cnt <= 0) {
2282 start_dac1(s);
2283 if (file->f_flags & O_NONBLOCK)
2284 return ret ? ret : -EAGAIN;
2285 interruptible_sleep_on(&s->dma_dac1.wait);
2286 if (signal_pending(current))
2287 return ret ? ret : -ERESTARTSYS;
2288 continue;
2289 }
2290 if (copy_from_user(s->dma_dac1.rawbuf + swptr, buffer, cnt))
2291 return ret ? ret : -EFAULT;
2292 swptr = (swptr + cnt) % s->dma_dac1.dmasize;
2293 spin_lock_irqsave(&s->lock, flags);
2294 s->dma_dac1.swptr = swptr;
2295 s->dma_dac1.count += cnt;
2296 s->dma_dac1.endcleared = 0;
2297 spin_unlock_irqrestore(&s->lock, flags);
2298 count -= cnt;
2299 buffer += cnt;
2300 ret += cnt;
2301 start_dac1(s);
2302 }
2303 return ret;
2304 }
2305
2306 static unsigned int es1371_poll_dac(struct file *file, struct poll_table_struct *wait)
2307 {
2308 struct es1371_state *s = (struct es1371_state *)file->private_data;
2309 unsigned long flags;
2310 unsigned int mask = 0;
2311
2312 VALIDATE_STATE(s);
2313 poll_wait(file, &s->dma_dac1.wait, wait);
2314 spin_lock_irqsave(&s->lock, flags);
2315 es1371_update_ptr(s);
2316 if (s->dma_dac1.mapped) {
2317 if (s->dma_dac1.count >= (signed)s->dma_dac1.fragsize)
2318 mask |= POLLOUT | POLLWRNORM;
2319 } else {
2320 if ((signed)s->dma_dac1.dmasize >= s->dma_dac1.count + (signed)s->dma_dac1.fragsize)
2321 mask |= POLLOUT | POLLWRNORM;
2322 }
2323 spin_unlock_irqrestore(&s->lock, flags);
2324 return mask;
2325 }
2326
2327 static int es1371_mmap_dac(struct file *file, struct vm_area_struct *vma)
2328 {
2329 struct es1371_state *s = (struct es1371_state *)file->private_data;
2330 int ret;
2331 unsigned long size;
2332
2333 VALIDATE_STATE(s);
2334 if (!(vma->vm_flags & VM_WRITE))
2335 return -EINVAL;
2336 if ((ret = prog_dmabuf_dac1(s)) != 0)
2337 return ret;
2338 if (vma->vm_offset != 0)
2339 return -EINVAL;
2340 size = vma->vm_end - vma->vm_start;
2341 if (size > (PAGE_SIZE << s->dma_dac1.buforder))
2342 return -EINVAL;
2343 if (remap_page_range(vma->vm_start, virt_to_phys(s->dma_dac1.rawbuf), size, vma->vm_page_prot))
2344 return -EAGAIN;
2345 s->dma_dac1.mapped = 1;
2346 return 0;
2347 }
2348
2349 static int es1371_ioctl_dac(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
2350 {
2351 struct es1371_state *s = (struct es1371_state *)file->private_data;
2352 unsigned long flags;
2353 audio_buf_info abinfo;
2354 count_info cinfo;
2355 int val, ret;
2356
2357 VALIDATE_STATE(s);
2358 switch (cmd) {
2359 case OSS_GETVERSION:
2360 return put_user(SOUND_VERSION, (int *)arg);
2361
2362 case SNDCTL_DSP_SYNC:
2363 return drain_dac1(s, 0/*file->f_flags & O_NONBLOCK*/);
2364
2365 case SNDCTL_DSP_SETDUPLEX:
2366 return -EINVAL;
2367
2368 case SNDCTL_DSP_GETCAPS:
2369 return put_user(DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP, (int *)arg);
2370
2371 case SNDCTL_DSP_RESET:
2372 stop_dac1(s);
2373 synchronize_irq();
2374 s->dma_dac1.swptr = s->dma_dac1.hwptr = s->dma_dac1.count = s->dma_dac1.total_bytes = 0;
2375 return 0;
2376
2377 case SNDCTL_DSP_SPEED:
2378 get_user_ret(val, (int *)arg, -EFAULT);
2379 if (val >= 0) {
2380 stop_dac1(s);
2381 s->dma_dac1.ready = 0;
2382 set_dac1_rate(s, val);
2383 }
2384 return put_user(s->dac1rate, (int *)arg);
2385
2386 case SNDCTL_DSP_STEREO:
2387 get_user_ret(val, (int *)arg, -EFAULT);
2388 stop_dac1(s);
2389 s->dma_dac1.ready = 0;
2390 spin_lock_irqsave(&s->lock, flags);
2391 if (val)
2392 s->sctrl |= SCTRL_P1SMB;
2393 else
2394 s->sctrl &= ~SCTRL_P1SMB;
2395 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
2396 spin_unlock_irqrestore(&s->lock, flags);
2397 return 0;
2398
2399 case SNDCTL_DSP_CHANNELS:
2400 get_user_ret(val, (int *)arg, -EFAULT);
2401 if (val != 0) {
2402 stop_dac1(s);
2403 s->dma_dac1.ready = 0;
2404 spin_lock_irqsave(&s->lock, flags);
2405 if (val >= 2)
2406 s->sctrl |= SCTRL_P1SMB;
2407 else
2408 s->sctrl &= ~SCTRL_P1SMB;
2409 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
2410 spin_unlock_irqrestore(&s->lock, flags);
2411 }
2412 return put_user((s->sctrl & SCTRL_P1SMB) ? 2 : 1, (int *)arg);
2413
2414 case SNDCTL_DSP_GETFMTS: /* Returns a mask */
2415 return put_user(AFMT_S16_LE|AFMT_U8, (int *)arg);
2416
2417 case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
2418 get_user_ret(val, (int *)arg, -EFAULT);
2419 if (val != AFMT_QUERY) {
2420 stop_dac1(s);
2421 s->dma_dac1.ready = 0;
2422 spin_lock_irqsave(&s->lock, flags);
2423 if (val == AFMT_S16_LE)
2424 s->sctrl |= SCTRL_P1SEB;
2425 else
2426 s->sctrl &= ~SCTRL_P1SEB;
2427 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
2428 spin_unlock_irqrestore(&s->lock, flags);
2429 }
2430 return put_user((s->sctrl & SCTRL_P1SEB) ? AFMT_S16_LE : AFMT_U8, (int *)arg);
2431
2432 case SNDCTL_DSP_POST:
2433 return 0;
2434
2435 case SNDCTL_DSP_GETTRIGGER:
2436 return put_user((s->ctrl & CTRL_DAC1_EN) ? PCM_ENABLE_OUTPUT : 0, (int *)arg);
2437
2438 case SNDCTL_DSP_SETTRIGGER:
2439 get_user_ret(val, (int *)arg, -EFAULT);
2440 if (val & PCM_ENABLE_OUTPUT) {
2441 if (!s->dma_dac1.ready && (ret = prog_dmabuf_dac1(s)))
2442 return ret;
2443 start_dac1(s);
2444 } else
2445 stop_dac1(s);
2446 return 0;
2447
2448 case SNDCTL_DSP_GETOSPACE:
2449 if (!(s->ctrl & CTRL_DAC2_EN) && (val = prog_dmabuf_dac1(s)) != 0)
2450 return val;
2451 spin_lock_irqsave(&s->lock, flags);
2452 es1371_update_ptr(s);
2453 abinfo.fragsize = s->dma_dac1.fragsize;
2454 abinfo.bytes = s->dma_dac1.dmasize - s->dma_dac1.count;
2455 abinfo.fragstotal = s->dma_dac1.numfrag;
2456 abinfo.fragments = abinfo.bytes >> s->dma_dac1.fragshift;
2457 spin_unlock_irqrestore(&s->lock, flags);
2458 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
2459
2460 case SNDCTL_DSP_NONBLOCK:
2461 file->f_flags |= O_NONBLOCK;
2462 return 0;
2463
2464 case SNDCTL_DSP_GETODELAY:
2465 spin_lock_irqsave(&s->lock, flags);
2466 es1371_update_ptr(s);
2467 val = s->dma_dac1.count;
2468 spin_unlock_irqrestore(&s->lock, flags);
2469 return put_user(val, (int *)arg);
2470
2471 case SNDCTL_DSP_GETOPTR:
2472 if (!(file->f_mode & FMODE_WRITE))
2473 return -EINVAL;
2474 spin_lock_irqsave(&s->lock, flags);
2475 es1371_update_ptr(s);
2476 cinfo.bytes = s->dma_dac1.total_bytes;
2477 cinfo.blocks = s->dma_dac1.count >> s->dma_dac1.fragshift;
2478 cinfo.ptr = s->dma_dac1.hwptr;
2479 if (s->dma_dac1.mapped)
2480 s->dma_dac1.count &= s->dma_dac1.fragsize-1;
2481 spin_unlock_irqrestore(&s->lock, flags);
2482 return copy_to_user((void *)arg, &cinfo, sizeof(cinfo));
2483
2484 case SNDCTL_DSP_GETBLKSIZE:
2485 if ((val = prog_dmabuf_dac1(s)))
2486 return val;
2487 return put_user(s->dma_dac1.fragsize, (int *)arg);
2488
2489 case SNDCTL_DSP_SETFRAGMENT:
2490 get_user_ret(val, (int *)arg, -EFAULT);
2491 s->dma_dac1.ossfragshift = val & 0xffff;
2492 s->dma_dac1.ossmaxfrags = (val >> 16) & 0xffff;
2493 if (s->dma_dac1.ossfragshift < 4)
2494 s->dma_dac1.ossfragshift = 4;
2495 if (s->dma_dac1.ossfragshift > 15)
2496 s->dma_dac1.ossfragshift = 15;
2497 if (s->dma_dac1.ossmaxfrags < 4)
2498 s->dma_dac1.ossmaxfrags = 4;
2499 return 0;
2500
2501 case SNDCTL_DSP_SUBDIVIDE:
2502 if (s->dma_dac1.subdivision)
2503 return -EINVAL;
2504 get_user_ret(val, (int *)arg, -EFAULT);
2505 if (val != 1 && val != 2 && val != 4)
2506 return -EINVAL;
2507 s->dma_dac1.subdivision = val;
2508 return 0;
2509
2510 case SOUND_PCM_READ_RATE:
2511 return put_user(s->dac1rate, (int *)arg);
2512
2513 case SOUND_PCM_READ_CHANNELS:
2514 return put_user((s->sctrl & SCTRL_P1SMB) ? 2 : 1, (int *)arg);
2515
2516 case SOUND_PCM_READ_BITS:
2517 return put_user((s->sctrl & SCTRL_P1SEB) ? 16 : 8, (int *)arg);
2518
2519 case SOUND_PCM_WRITE_FILTER:
2520 case SNDCTL_DSP_SETSYNCRO:
2521 case SOUND_PCM_READ_FILTER:
2522 return -EINVAL;
2523
2524 }
2525 return mixer_ioctl(s, cmd, arg);
2526 }
2527
2528 static int es1371_open_dac(struct inode *inode, struct file *file)
2529 {
2530 int minor = MINOR(inode->i_rdev);
2531 struct es1371_state *s = devs;
2532 unsigned long flags;
2533
2534 while (s && ((s->dev_dac ^ minor) & ~0xf))
2535 s = s->next;
2536 if (!s)
2537 return -ENODEV;
2538 VALIDATE_STATE(s);
2539 /* we allow opening with O_RDWR, most programs do it although they will only write */
2540 #if 0
2541 if (file->f_mode & FMODE_READ)
2542 return -EPERM;
2543 #endif
2544 if (!(file->f_mode & FMODE_WRITE))
2545 return -EINVAL;
2546 file->private_data = s;
2547 /* wait for device to become free */
2548 down(&s->open_sem);
2549 while (s->open_mode & FMODE_DAC) {
2550 if (file->f_flags & O_NONBLOCK) {
2551 up(&s->open_sem);
2552 return -EBUSY;
2553 }
2554 up(&s->open_sem);
2555 interruptible_sleep_on(&s->open_wait);
2556 if (signal_pending(current))
2557 return -ERESTARTSYS;
2558 down(&s->open_sem);
2559 }
2560 s->dma_dac1.ossfragshift = s->dma_dac1.ossmaxfrags = s->dma_dac1.subdivision = 0;
2561 set_dac1_rate(s, 8000);
2562 spin_lock_irqsave(&s->lock, flags);
2563 s->sctrl &= ~SCTRL_P1FMT;
2564 if ((minor & 0xf) == SND_DEV_DSP16)
2565 s->sctrl |= ES1371_FMT_S16_MONO << SCTRL_SH_P1FMT;
2566 else
2567 s->sctrl |= ES1371_FMT_U8_MONO << SCTRL_SH_P1FMT;
2568 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
2569 spin_unlock_irqrestore(&s->lock, flags);
2570 s->open_mode |= FMODE_DAC;
2571 up(&s->open_sem);
2572 MOD_INC_USE_COUNT;
2573 return 0;
2574 }
2575
2576 static int es1371_release_dac(struct inode *inode, struct file *file)
2577 {
2578 struct es1371_state *s = (struct es1371_state *)file->private_data;
2579
2580 VALIDATE_STATE(s);
2581 drain_dac1(s, file->f_flags & O_NONBLOCK);
2582 down(&s->open_sem);
2583 stop_dac1(s);
2584 dealloc_dmabuf(&s->dma_dac1);
2585 s->open_mode &= ~FMODE_DAC;
2586 up(&s->open_sem);
2587 wake_up(&s->open_wait);
2588 MOD_DEC_USE_COUNT;
2589 return 0;
2590 }
2591
2592 static /*const*/ struct file_operations es1371_dac_fops = {
2593 &es1371_llseek,
2594 NULL, /* read */
2595 &es1371_write_dac,
2596 NULL, /* readdir */
2597 &es1371_poll_dac,
2598 &es1371_ioctl_dac,
2599 &es1371_mmap_dac,
2600 &es1371_open_dac,
2601 NULL, /* flush */
2602 &es1371_release_dac,
2603 NULL, /* fsync */
2604 NULL, /* fasync */
2605 NULL, /* check_media_change */
2606 NULL, /* revalidate */
2607 NULL, /* lock */
2608 };
2609
2610 /* --------------------------------------------------------------------- */
2611
2612 static ssize_t es1371_midi_read(struct file *file, char *buffer, size_t count, loff_t *ppos)
2613 {
2614 struct es1371_state *s = (struct es1371_state *)file->private_data;
2615 DECLARE_WAITQUEUE(wait, current);
2616 ssize_t ret;
2617 unsigned long flags;
2618 unsigned ptr;
2619 int cnt;
2620
2621 VALIDATE_STATE(s);
2622 if (ppos != &file->f_pos)
2623 return -ESPIPE;
2624 if (!access_ok(VERIFY_WRITE, buffer, count))
2625 return -EFAULT;
2626 if (count == 0)
2627 return 0;
2628 ret = 0;
2629 add_wait_queue(&s->midi.iwait, &wait);
2630 while (count > 0) {
2631 spin_lock_irqsave(&s->lock, flags);
2632 ptr = s->midi.ird;
2633 cnt = MIDIINBUF - ptr;
2634 if (s->midi.icnt < cnt)
2635 cnt = s->midi.icnt;
2636 spin_unlock_irqrestore(&s->lock, flags);
2637 if (cnt > count)
2638 cnt = count;
2639 if (cnt <= 0) {
2640 if (file->f_flags & O_NONBLOCK) {
2641 if (!ret)
2642 ret = -EAGAIN;
2643 break;
2644 }
2645 __set_current_state(TASK_INTERRUPTIBLE);
2646 schedule();
2647 if (signal_pending(current)) {
2648 if (!ret)
2649 ret = -ERESTARTSYS;
2650 break;
2651 }
2652 continue;
2653 }
2654 if (copy_to_user(buffer, s->midi.ibuf + ptr, cnt)) {
2655 if (!ret)
2656 ret = -EFAULT;
2657 break;
2658 }
2659 ptr = (ptr + cnt) % MIDIINBUF;
2660 spin_lock_irqsave(&s->lock, flags);
2661 s->midi.ird = ptr;
2662 s->midi.icnt -= cnt;
2663 spin_unlock_irqrestore(&s->lock, flags);
2664 count -= cnt;
2665 buffer += cnt;
2666 ret += cnt;
2667 break;
2668 }
2669 __set_current_state(TASK_RUNNING);
2670 remove_wait_queue(&s->midi.iwait, &wait);
2671 return ret;
2672 }
2673
2674 static ssize_t es1371_midi_write(struct file *file, const char *buffer, size_t count, loff_t *ppos)
2675 {
2676 struct es1371_state *s = (struct es1371_state *)file->private_data;
2677 DECLARE_WAITQUEUE(wait, current);
2678 ssize_t ret;
2679 unsigned long flags;
2680 unsigned ptr;
2681 int cnt;
2682
2683 VALIDATE_STATE(s);
2684 if (ppos != &file->f_pos)
2685 return -ESPIPE;
2686 if (!access_ok(VERIFY_READ, buffer, count))
2687 return -EFAULT;
2688 if (count == 0)
2689 return 0;
2690 ret = 0;
2691 add_wait_queue(&s->midi.owait, &wait);
2692 while (count > 0) {
2693 spin_lock_irqsave(&s->lock, flags);
2694 ptr = s->midi.owr;
2695 cnt = MIDIOUTBUF - ptr;
2696 if (s->midi.ocnt + cnt > MIDIOUTBUF)
2697 cnt = MIDIOUTBUF - s->midi.ocnt;
2698 if (cnt <= 0)
2699 es1371_handle_midi(s);
2700 spin_unlock_irqrestore(&s->lock, flags);
2701 if (cnt > count)
2702 cnt = count;
2703 if (cnt <= 0) {
2704 if (file->f_flags & O_NONBLOCK) {
2705 if (!ret)
2706 ret = -EAGAIN;
2707 break;
2708 }
2709 __set_current_state(TASK_INTERRUPTIBLE);
2710 schedule();
2711 if (signal_pending(current)) {
2712 if (!ret)
2713 ret = -ERESTARTSYS;
2714 break;
2715 }
2716 continue;
2717 }
2718 if (copy_from_user(s->midi.obuf + ptr, buffer, cnt)) {
2719 if (!ret)
2720 ret = -EFAULT;
2721 break;
2722 }
2723 ptr = (ptr + cnt) % MIDIOUTBUF;
2724 spin_lock_irqsave(&s->lock, flags);
2725 s->midi.owr = ptr;
2726 s->midi.ocnt += cnt;
2727 spin_unlock_irqrestore(&s->lock, flags);
2728 count -= cnt;
2729 buffer += cnt;
2730 ret += cnt;
2731 spin_lock_irqsave(&s->lock, flags);
2732 es1371_handle_midi(s);
2733 spin_unlock_irqrestore(&s->lock, flags);
2734 }
2735 __set_current_state(TASK_RUNNING);
2736 remove_wait_queue(&s->midi.owait, &wait);
2737 return ret;
2738 }
2739
2740 static unsigned int es1371_midi_poll(struct file *file, struct poll_table_struct *wait)
2741 {
2742 struct es1371_state *s = (struct es1371_state *)file->private_data;
2743 unsigned long flags;
2744 unsigned int mask = 0;
2745
2746 VALIDATE_STATE(s);
2747 if (file->f_mode & FMODE_WRITE)
2748 poll_wait(file, &s->midi.owait, wait);
2749 if (file->f_mode & FMODE_READ)
2750 poll_wait(file, &s->midi.iwait, wait);
2751 spin_lock_irqsave(&s->lock, flags);
2752 if (file->f_mode & FMODE_READ) {
2753 if (s->midi.icnt > 0)
2754 mask |= POLLIN | POLLRDNORM;
2755 }
2756 if (file->f_mode & FMODE_WRITE) {
2757 if (s->midi.ocnt < MIDIOUTBUF)
2758 mask |= POLLOUT | POLLWRNORM;
2759 }
2760 spin_unlock_irqrestore(&s->lock, flags);
2761 return mask;
2762 }
2763
2764 static int es1371_midi_open(struct inode *inode, struct file *file)
2765 {
2766 int minor = MINOR(inode->i_rdev);
2767 struct es1371_state *s = devs;
2768 unsigned long flags;
2769
2770 while (s && s->dev_midi != minor)
2771 s = s->next;
2772 if (!s)
2773 return -ENODEV;
2774 VALIDATE_STATE(s);
2775 file->private_data = s;
2776 /* wait for device to become free */
2777 down(&s->open_sem);
2778 while (s->open_mode & (file->f_mode << FMODE_MIDI_SHIFT)) {
2779 if (file->f_flags & O_NONBLOCK) {
2780 up(&s->open_sem);
2781 return -EBUSY;
2782 }
2783 up(&s->open_sem);
2784 interruptible_sleep_on(&s->open_wait);
2785 if (signal_pending(current))
2786 return -ERESTARTSYS;
2787 down(&s->open_sem);
2788 }
2789 spin_lock_irqsave(&s->lock, flags);
2790 if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
2791 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
2792 s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
2793 outb(UCTRL_CNTRL_SWR, s->io+ES1371_REG_UART_CONTROL);
2794 outb(0, s->io+ES1371_REG_UART_CONTROL);
2795 outb(0, s->io+ES1371_REG_UART_TEST);
2796 }
2797 if (file->f_mode & FMODE_READ) {
2798 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
2799 }
2800 if (file->f_mode & FMODE_WRITE) {
2801 s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
2802 }
2803 s->ctrl |= CTRL_UART_EN;
2804 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
2805 es1371_handle_midi(s);
2806 spin_unlock_irqrestore(&s->lock, flags);
2807 s->open_mode |= (file->f_mode << FMODE_MIDI_SHIFT) & (FMODE_MIDI_READ | FMODE_MIDI_WRITE);
2808 up(&s->open_sem);
2809 MOD_INC_USE_COUNT;
2810 return 0;
2811 }
2812
2813 static int es1371_midi_release(struct inode *inode, struct file *file)
2814 {
2815 struct es1371_state *s = (struct es1371_state *)file->private_data;
2816 DECLARE_WAITQUEUE(wait, current);
2817 unsigned long flags;
2818 unsigned count, tmo;
2819
2820 VALIDATE_STATE(s);
2821 if (file->f_mode & FMODE_WRITE) {
2822 __set_current_state(TASK_INTERRUPTIBLE);
2823 add_wait_queue(&s->midi.owait, &wait);
2824 for (;;) {
2825 spin_lock_irqsave(&s->lock, flags);
2826 count = s->midi.ocnt;
2827 spin_unlock_irqrestore(&s->lock, flags);
2828 if (count <= 0)
2829 break;
2830 if (signal_pending(current))
2831 break;
2832 if (file->f_flags & O_NONBLOCK) {
2833 remove_wait_queue(&s->midi.owait, &wait);
2834 set_current_state(TASK_RUNNING);
2835 return -EBUSY;
2836 }
2837 tmo = (count * HZ) / 3100;
2838 if (!schedule_timeout(tmo ? : 1) && tmo)
2839 printk(KERN_DEBUG "es1371: midi timed out??\n");
2840 }
2841 remove_wait_queue(&s->midi.owait, &wait);
2842 set_current_state(TASK_RUNNING);
2843 }
2844 down(&s->open_sem);
2845 s->open_mode &= (~(file->f_mode << FMODE_MIDI_SHIFT)) & (FMODE_MIDI_READ|FMODE_MIDI_WRITE);
2846 spin_lock_irqsave(&s->lock, flags);
2847 if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
2848 s->ctrl &= ~CTRL_UART_EN;
2849 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
2850 }
2851 spin_unlock_irqrestore(&s->lock, flags);
2852 up(&s->open_sem);
2853 wake_up(&s->open_wait);
2854 MOD_DEC_USE_COUNT;
2855 return 0;
2856 }
2857
2858 static /*const*/ struct file_operations es1371_midi_fops = {
2859 &es1371_llseek,
2860 &es1371_midi_read,
2861 &es1371_midi_write,
2862 NULL, /* readdir */
2863 &es1371_midi_poll,
2864 NULL, /* ioctl */
2865 NULL, /* mmap */
2866 &es1371_midi_open,
2867 NULL, /* flush */
2868 &es1371_midi_release,
2869 NULL, /* fsync */
2870 NULL, /* fasync */
2871 NULL, /* check_media_change */
2872 NULL, /* revalidate */
2873 NULL, /* lock */
2874 };
2875
2876 /* --------------------------------------------------------------------- */
2877
2878 /*
2879 * for debugging purposes, we'll create a proc device that dumps the
2880 * CODEC chipstate
2881 */
2882
2883 #ifdef ES1371_DEBUG
2884 static int proc_es1371_dump (char *buf, char **start, off_t fpos, int length, int *eof, void *data)
2885 {
2886 int len = 0;
2887
2888 struct es1371_state *s = devs;
2889 int cnt;
2890
2891 /* print out header */
2892 len += sprintf(buf + len, "\t\tCreative ES137x Debug Dump-o-matic\n");
2893
2894 /* print out CODEC state */
2895 len += sprintf (buf + len, "AC97 CODEC state\n");
2896
2897 for (cnt=0; cnt <= 0x7e; cnt = cnt +2)
2898 len+= sprintf (buf + len, "reg:0x%02x val:0x%04x\n", cnt, rdcodec(s , cnt));
2899
2900 if (fpos >=len){
2901 *start = buf;
2902 *eof =1;
2903 return 0;
2904 }
2905 *start = buf + fpos;
2906 if ((len -= fpos) > length)
2907 return length;
2908 *eof =1;
2909 return len;
2910
2911 }
2912 #endif /* ES1371_DEBUG */
2913
2914 /* --------------------------------------------------------------------- */
2915
2916 /* maximum number of devices */
2917 #define NR_DEVICE 5
2918
2919 static int joystick[NR_DEVICE] = { 0, };
2920 static int spdif[NR_DEVICE] = { 0, };
2921
2922 MODULE_PARM(joystick, "1-" __MODULE_STRING(NR_DEVICE) "i");
2923 MODULE_PARM_DESC(joystick, "sets address and enables joystick interface (still need separate driver)");
2924 MODULE_PARM(spdif, "1-" __MODULE_STRING(NR_DEVICE) "i");
2925 MODULE_PARM_DESC(spdif, "if 1 the output is in S/PDIF digital mode");
2926
2927 MODULE_AUTHOR("Thomas M. Sailer, sailer@ife.ee.ethz.ch, hb9jnx@hb9w.che.eu");
2928 MODULE_DESCRIPTION("ES1371 AudioPCI97 Driver");
2929
2930 /* --------------------------------------------------------------------- */
2931
2932 static struct initvol {
2933 int mixch;
2934 int vol;
2935 } initvol[] __initdata = {
2936 { SOUND_MIXER_WRITE_LINE, 0x4040 },
2937 { SOUND_MIXER_WRITE_CD, 0x4040 },
2938 { MIXER_WRITE(SOUND_MIXER_VIDEO), 0x4040 },
2939 { SOUND_MIXER_WRITE_LINE1, 0x4040 },
2940 { SOUND_MIXER_WRITE_PCM, 0x4040 },
2941 { SOUND_MIXER_WRITE_VOLUME, 0x4040 },
2942 { MIXER_WRITE(SOUND_MIXER_PHONEOUT), 0x4040 },
2943 { SOUND_MIXER_WRITE_OGAIN, 0x4040 },
2944 { MIXER_WRITE(SOUND_MIXER_PHONEIN), 0x4040 },
2945 { SOUND_MIXER_WRITE_SPEAKER, 0x4040 },
2946 { SOUND_MIXER_WRITE_MIC, 0x4040 },
2947 { SOUND_MIXER_WRITE_RECLEV, 0x4040 },
2948 { SOUND_MIXER_WRITE_IGAIN, 0x4040 }
2949 };
2950
2951 #define RSRCISIOREGION(dev,num) ((dev)->resource[(num)].start != 0 && \
2952 ((dev)->resource[(num)].flags & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_IO)
2953 #define RSRCADDRESS(dev,num) ((dev)->resource[(num)].start)
2954
2955
2956 static int __init init_es1371(void)
2957 {
2958 struct es1371_state *s;
2959 struct pci_dev *pcidev = NULL;
2960 mm_segment_t fs;
2961 int i, val, val2, index = 0;
2962 unsigned cssr;
2963
2964 if (!pci_present()) /* No PCI bus in this machine! */
2965 return -ENODEV;
2966 printk(KERN_INFO "es1371: version v0.17 time " __TIME__ " " __DATE__ "\n");
2967 while (index < NR_DEVICE &&
2968 (pcidev = pci_find_device(PCI_VENDOR_ID_ENSONIQ, PCI_DEVICE_ID_ENSONIQ_ES1371, pcidev))) {
2969 if (!RSRCISIOREGION(pcidev, 0))
2970 continue;
2971 if (pcidev->irq == 0)
2972 continue;
2973 if (!(s = kmalloc(sizeof(struct es1371_state), GFP_KERNEL))) {
2974 printk(KERN_WARNING "es1371: out of memory\n");
2975 continue;
2976 }
2977 memset(s, 0, sizeof(struct es1371_state));
2978 init_waitqueue_head(&s->dma_adc.wait);
2979 init_waitqueue_head(&s->dma_dac1.wait);
2980 init_waitqueue_head(&s->dma_dac2.wait);
2981 init_waitqueue_head(&s->open_wait);
2982 init_waitqueue_head(&s->midi.iwait);
2983 init_waitqueue_head(&s->midi.owait);
2984 init_MUTEX(&s->open_sem);
2985 spin_lock_init(&s->lock);
2986 s->magic = ES1371_MAGIC;
2987 s->io = RSRCADDRESS(pcidev, 0);
2988 s->irq = pcidev->irq;
2989 pci_read_config_byte(pcidev, PCI_REVISION_ID, &s->rev);
2990 if (check_region(s->io, ES1371_EXTENT)) {
2991 printk(KERN_ERR "es1371: io ports %#lx-%#lx in use\n", s->io, s->io+ES1371_EXTENT-1);
2992 goto err_region;
2993 }
2994 request_region(s->io, ES1371_EXTENT, "es1371");
2995 if (request_irq(s->irq, es1371_interrupt, SA_SHIRQ, "es1371", s)) {
2996 printk(KERN_ERR "es1371: irq %u in use\n", s->irq);
2997 goto err_irq;
2998 }
2999 printk(KERN_INFO "es1371: found es1371 rev %d at io %#lx irq %u\n"
3000 KERN_INFO "es1371: features: joystick 0x%x\n", s->rev, s->io, s->irq, joystick[index]);
3001 /* register devices */
3002 if ((s->dev_audio = register_sound_dsp(&es1371_audio_fops, -1)) < 0)
3003 goto err_dev1;
3004 if ((s->dev_mixer = register_sound_mixer(&es1371_mixer_fops, -1)) < 0)
3005 goto err_dev2;
3006 if ((s->dev_dac = register_sound_dsp(&es1371_dac_fops, -1)) < 0)
3007 goto err_dev3;
3008 if ((s->dev_midi = register_sound_midi(&es1371_midi_fops, -1)) < 0)
3009 goto err_dev4;
3010 #ifdef ES1371_DEBUG
3011 /* intialize the debug proc device */
3012 s->ps = create_proc_entry("es1371", S_IFREG | S_IRUGO, NULL);
3013 if (s->ps)
3014 s->ps->read_proc = proc_es1371_dump;
3015 #endif /* ES1371_DEBUG */
3016
3017 /* initialize codec registers */
3018 s->ctrl = 0;
3019 if ((joystick[index] & ~0x18) == 0x200) {
3020 if (check_region(joystick[index], JOY_EXTENT))
3021 printk(KERN_ERR "es1371: joystick address 0x%x already in use\n", joystick[index]);
3022 else {
3023 s->ctrl |= CTRL_JYSTK_EN | (((joystick[index] >> 3) & CTRL_JOY_MASK) << CTRL_JOY_SHIFT);
3024 }
3025 }
3026 s->sctrl = 0;
3027 cssr = 0;
3028 /* check to see if s/pdif mode is being requested */
3029 if (spdif[index]) {
3030 if (s->rev >= 4) {
3031 printk(KERN_INFO "es1371: enabling S/PDIF output\n");
3032 cssr |= STAT_EN_SPDIF;
3033 s->ctrl |= CTRL_SPDIFEN_B;
3034 } else {
3035 printk(KERN_ERR "es1371: revision %d does not support S/PDIF\n", s->rev);
3036 }
3037 }
3038 /* initialize the chips */
3039 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
3040 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
3041 outl(0, s->io+ES1371_REG_LEGACY);
3042 pci_set_master(pcidev); /* enable bus mastering */
3043 /* AC97 warm reset to start the bitclk */
3044 outl(s->ctrl | CTRL_SYNCRES, s->io+ES1371_REG_CONTROL);
3045 udelay(2);
3046 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
3047 /* init the sample rate converter */
3048 src_init(s);
3049 /* codec init */
3050 wrcodec(s, AC97_RESET, 0); /* reset codec */
3051 s->mix.codec_id = rdcodec(s, AC97_RESET); /* get codec ID */
3052 val = rdcodec(s, AC97_VENDOR_ID1);
3053 val2 = rdcodec(s, AC97_VENDOR_ID2);
3054 printk(KERN_INFO "es1371: codec vendor %c%c%c revision %d\n",
3055 (val >> 8) & 0xff, val & 0xff, (val2 >> 8) & 0xff, val2 & 0xff);
3056 printk(KERN_INFO "es1371: codec features");
3057 if (s->mix.codec_id & CODEC_ID_DEDICATEDMIC)
3058 printk(" dedicated MIC PCM in");
3059 if (s->mix.codec_id & CODEC_ID_MODEMCODEC)
3060 printk(" Modem Line Codec");
3061 if (s->mix.codec_id & CODEC_ID_BASSTREBLE)
3062 printk(" Bass & Treble");
3063 if (s->mix.codec_id & CODEC_ID_SIMULATEDSTEREO)
3064 printk(" Simulated Stereo");
3065 if (s->mix.codec_id & CODEC_ID_HEADPHONEOUT)
3066 printk(" Headphone out");
3067 if (s->mix.codec_id & CODEC_ID_LOUDNESS)
3068 printk(" Loudness");
3069 if (s->mix.codec_id & CODEC_ID_18BITDAC)
3070 printk(" 18bit DAC");
3071 if (s->mix.codec_id & CODEC_ID_20BITDAC)
3072 printk(" 20bit DAC");
3073 if (s->mix.codec_id & CODEC_ID_18BITADC)
3074 printk(" 18bit ADC");
3075 if (s->mix.codec_id & CODEC_ID_20BITADC)
3076 printk(" 20bit ADC");
3077 printk("%s\n", (s->mix.codec_id & 0x3ff) ? "" : " none");
3078 val = (s->mix.codec_id >> CODEC_ID_SESHIFT) & CODEC_ID_SEMASK;
3079 printk(KERN_INFO "es1371: stereo enhancement: %s\n", (val <= 20) ? stereo_enhancement[val] : "unknown");
3080
3081 fs = get_fs();
3082 set_fs(KERNEL_DS);
3083 val = SOUND_MASK_LINE;
3084 mixer_ioctl(s, SOUND_MIXER_WRITE_RECSRC, (unsigned long)&val);
3085 for (i = 0; i < sizeof(initvol)/sizeof(initvol[0]); i++) {
3086 val = initvol[i].vol;
3087 mixer_ioctl(s, initvol[i].mixch, (unsigned long)&val);
3088 }
3089 set_fs(fs);
3090 /* turn on S/PDIF output driver if requested */
3091 outl(cssr, s->io+ES1371_REG_STATUS);
3092 /* queue it for later freeing */
3093 s->next = devs;
3094 devs = s;
3095 index++;
3096 continue;
3097
3098 err_dev4:
3099 unregister_sound_dsp(s->dev_dac);
3100 err_dev3:
3101 unregister_sound_mixer(s->dev_mixer);
3102 err_dev2:
3103 unregister_sound_dsp(s->dev_audio);
3104 err_dev1:
3105 printk(KERN_ERR "es1371: cannot register misc device\n");
3106 free_irq(s->irq, s);
3107 err_irq:
3108 release_region(s->io, ES1371_EXTENT);
3109 err_region:
3110 kfree_s(s, sizeof(struct es1371_state));
3111 }
3112 if (!devs)
3113 return -ENODEV;
3114 return 0;
3115 }
3116
3117 static void __exit cleanup_es1371(void)
3118 {
3119 struct es1371_state *s;
3120
3121 while ((s = devs)) {
3122 devs = devs->next;
3123 #ifdef ES1371_DEBUG
3124 if (s->ps)
3125 remove_proc_entry("es1371", NULL);
3126 #endif /* ES1371_DEBUG */
3127 outl(0, s->io+ES1371_REG_CONTROL); /* switch everything off */
3128 outl(0, s->io+ES1371_REG_SERIAL_CONTROL); /* clear serial interrupts */
3129 synchronize_irq();
3130 free_irq(s->irq, s);
3131 release_region(s->io, ES1371_EXTENT);
3132 unregister_sound_dsp(s->dev_audio);
3133 unregister_sound_mixer(s->dev_mixer);
3134 unregister_sound_dsp(s->dev_dac);
3135 unregister_sound_midi(s->dev_midi);
3136 kfree_s(s, sizeof(struct es1371_state));
3137 }
3138 printk(KERN_INFO "es1371: unloading\n");
3139 }
3140
3141 module_init(init_es1371);
3142 module_exit(cleanup_es1371);
3143
3144 /* --------------------------------------------------------------------- */
3145
3146 #ifndef MODULE
3147
3148 /* format is: es1371=[joystick] */
3149
3150 static int __init es1371_setup(char *str)
3151 {
3152 static unsigned __initlocaldata nr_dev = 0;
3153
3154 if (nr_dev >= NR_DEVICE)
3155 return 0;
3156 if (get_option(&str, &joystick[nr_dev]) == 2)
3157 (void)get_option(&str, &spdif[nr_dev]);
3158 nr_dev++;
3159 return 1;
3160 }
3161
3162 __setup("es1371=", es1371_setup);
3163
3164 #endif /* MODULE */