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nvfx: expose GLSL
[mesa/mesa-lb.git] / src / gallium / drivers / svga / svga_screen_texture.c
blob4a058eda885a129c636f4198148cc108cc764aab
1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 **********************************************************/
25
26 #include "svga_cmd.h"
27
28 #include "pipe/p_state.h"
29 #include "pipe/p_defines.h"
30 #include "util/u_inlines.h"
31 #include "os/os_thread.h"
32 #include "util/u_format.h"
33 #include "util/u_math.h"
34 #include "util/u_memory.h"
35
36 #include "svga_screen.h"
37 #include "svga_context.h"
38 #include "svga_screen_texture.h"
39 #include "svga_screen_buffer.h"
40 #include "svga_winsys.h"
41 #include "svga_debug.h"
42 #include "svga_screen_buffer.h"
43
44
45 /* XXX: This isn't a real hardware flag, but just a hack for kernel to
46 * know about primary surfaces. Find a better way to accomplish this.
47 */
48 #define SVGA3D_SURFACE_HINT_SCANOUT (1 << 9)
49
50
51 /*
52 * Helper function and arrays
53 */
54
55 SVGA3dSurfaceFormat
56 svga_translate_format(enum pipe_format format)
57 {
58 switch(format) {
59
60 case PIPE_FORMAT_B8G8R8A8_UNORM:
61 return SVGA3D_A8R8G8B8;
62 case PIPE_FORMAT_B8G8R8X8_UNORM:
63 return SVGA3D_X8R8G8B8;
64
65 /* Required for GL2.1:
66 */
67 case PIPE_FORMAT_B8G8R8A8_SRGB:
68 return SVGA3D_A8R8G8B8;
69
70 case PIPE_FORMAT_B5G6R5_UNORM:
71 return SVGA3D_R5G6B5;
72 case PIPE_FORMAT_B5G5R5A1_UNORM:
73 return SVGA3D_A1R5G5B5;
74 case PIPE_FORMAT_B4G4R4A4_UNORM:
75 return SVGA3D_A4R4G4B4;
76
77
78 /* XXX: Doesn't seem to work properly.
79 case PIPE_FORMAT_Z32_UNORM:
80 return SVGA3D_Z_D32;
81 */
82 case PIPE_FORMAT_Z16_UNORM:
83 return SVGA3D_Z_D16;
84 case PIPE_FORMAT_S8Z24_UNORM:
85 return SVGA3D_Z_D24S8;
86 case PIPE_FORMAT_X8Z24_UNORM:
87 return SVGA3D_Z_D24X8;
88
89 case PIPE_FORMAT_A8_UNORM:
90 return SVGA3D_ALPHA8;
91 case PIPE_FORMAT_L8_UNORM:
92 return SVGA3D_LUMINANCE8;
93
94 case PIPE_FORMAT_DXT1_RGB:
95 case PIPE_FORMAT_DXT1_RGBA:
96 return SVGA3D_DXT1;
97 case PIPE_FORMAT_DXT3_RGBA:
98 return SVGA3D_DXT3;
99 case PIPE_FORMAT_DXT5_RGBA:
100 return SVGA3D_DXT5;
101
102 default:
103 return SVGA3D_FORMAT_INVALID;
104 }
105 }
106
107
108 SVGA3dSurfaceFormat
109 svga_translate_format_render(enum pipe_format format)
110 {
111 switch(format) {
112 case PIPE_FORMAT_B8G8R8A8_UNORM:
113 case PIPE_FORMAT_B8G8R8X8_UNORM:
114 case PIPE_FORMAT_B5G5R5A1_UNORM:
115 case PIPE_FORMAT_B4G4R4A4_UNORM:
116 case PIPE_FORMAT_B5G6R5_UNORM:
117 case PIPE_FORMAT_S8Z24_UNORM:
118 case PIPE_FORMAT_X8Z24_UNORM:
119 case PIPE_FORMAT_Z32_UNORM:
120 case PIPE_FORMAT_Z16_UNORM:
121 case PIPE_FORMAT_L8_UNORM:
122 return svga_translate_format(format);
123
124 #if 1
125 /* For on host conversion */
126 case PIPE_FORMAT_DXT1_RGB:
127 return SVGA3D_X8R8G8B8;
128 case PIPE_FORMAT_DXT1_RGBA:
129 case PIPE_FORMAT_DXT3_RGBA:
130 case PIPE_FORMAT_DXT5_RGBA:
131 return SVGA3D_A8R8G8B8;
132 #endif
133
134 default:
135 return SVGA3D_FORMAT_INVALID;
136 }
137 }
138
139
140 static INLINE void
141 svga_transfer_dma_band(struct svga_transfer *st,
142 SVGA3dTransferType transfer,
143 unsigned y, unsigned h, unsigned srcy)
144 {
145 struct svga_texture *texture = svga_texture(st->base.texture);
146 struct svga_screen *screen = svga_screen(texture->base.screen);
147 SVGA3dCopyBox box;
148 enum pipe_error ret;
149
150 SVGA_DBG(DEBUG_DMA, "dma %s sid %p, face %u, (%u, %u, %u) - (%u, %u, %u), %ubpp\n",
151 transfer == SVGA3D_WRITE_HOST_VRAM ? "to" : "from",
152 texture->handle,
153 st->base.face,
154 st->base.x,
155 y,
156 st->base.zslice,
157 st->base.x + st->base.width,
158 y + h,
159 st->base.zslice + 1,
160 util_format_get_blocksize(texture->base.format)*8/
161 (util_format_get_blockwidth(texture->base.format)*util_format_get_blockheight(texture->base.format)));
162
163 box.x = st->base.x;
164 box.y = y;
165 box.z = st->base.zslice;
166 box.w = st->base.width;
167 box.h = h;
168 box.d = 1;
169 box.srcx = 0;
170 box.srcy = srcy;
171 box.srcz = 0;
172
173 pipe_mutex_lock(screen->swc_mutex);
174 ret = SVGA3D_SurfaceDMA(screen->swc, st, transfer, &box, 1);
175 if(ret != PIPE_OK) {
176 screen->swc->flush(screen->swc, NULL);
177 ret = SVGA3D_SurfaceDMA(screen->swc, st, transfer, &box, 1);
178 assert(ret == PIPE_OK);
179 }
180 pipe_mutex_unlock(screen->swc_mutex);
181 }
182
183
184 static INLINE void
185 svga_transfer_dma(struct svga_transfer *st,
186 SVGA3dTransferType transfer)
187 {
188 struct svga_texture *texture = svga_texture(st->base.texture);
189 struct svga_screen *screen = svga_screen(texture->base.screen);
190 struct svga_winsys_screen *sws = screen->sws;
191 struct pipe_fence_handle *fence = NULL;
192
193 if (transfer == SVGA3D_READ_HOST_VRAM) {
194 SVGA_DBG(DEBUG_PERF, "%s: readback transfer\n", __FUNCTION__);
195 }
196
197
198 if(!st->swbuf) {
199 /* Do the DMA transfer in a single go */
200
201 svga_transfer_dma_band(st, transfer, st->base.y, st->base.height, 0);
202
203 if(transfer == SVGA3D_READ_HOST_VRAM) {
204 svga_screen_flush(screen, &fence);
205 sws->fence_finish(sws, fence, 0);
206 sws->fence_reference(sws, &fence, NULL);
207 }
208 }
209 else {
210 unsigned y, h, srcy;
211 unsigned blockheight = util_format_get_blockheight(st->base.texture->format);
212 h = st->hw_nblocksy * blockheight;
213 srcy = 0;
214 for(y = 0; y < st->base.height; y += h) {
215 unsigned offset, length;
216 void *hw, *sw;
217
218 if (y + h > st->base.height)
219 h = st->base.height - y;
220
221 /* Transfer band must be aligned to pixel block boundaries */
222 assert(y % blockheight == 0);
223 assert(h % blockheight == 0);
224
225 offset = y * st->base.stride / blockheight;
226 length = h * st->base.stride / blockheight;
227
228 sw = (uint8_t *)st->swbuf + offset;
229
230 if(transfer == SVGA3D_WRITE_HOST_VRAM) {
231 /* Wait for the previous DMAs to complete */
232 /* TODO: keep one DMA (at half the size) in the background */
233 if(y) {
234 svga_screen_flush(screen, &fence);
235 sws->fence_finish(sws, fence, 0);
236 sws->fence_reference(sws, &fence, NULL);
237 }
238
239 hw = sws->buffer_map(sws, st->hwbuf, PIPE_BUFFER_USAGE_CPU_WRITE);
240 assert(hw);
241 if(hw) {
242 memcpy(hw, sw, length);
243 sws->buffer_unmap(sws, st->hwbuf);
244 }
245 }
246
247 svga_transfer_dma_band(st, transfer, y, h, srcy);
248
249 if(transfer == SVGA3D_READ_HOST_VRAM) {
250 svga_screen_flush(screen, &fence);
251 sws->fence_finish(sws, fence, 0);
252
253 hw = sws->buffer_map(sws, st->hwbuf, PIPE_BUFFER_USAGE_CPU_READ);
254 assert(hw);
255 if(hw) {
256 memcpy(sw, hw, length);
257 sws->buffer_unmap(sws, st->hwbuf);
258 }
259 }
260 }
261 }
262 }
263
264
265 static struct pipe_texture *
266 svga_texture_create(struct pipe_screen *screen,
267 const struct pipe_texture *templat)
268 {
269 struct svga_screen *svgascreen = svga_screen(screen);
270 struct svga_texture *tex = CALLOC_STRUCT(svga_texture);
271 unsigned width, height, depth;
272 unsigned level;
273
274 if (!tex)
275 goto error1;
276
277 tex->base = *templat;
278 pipe_reference_init(&tex->base.reference, 1);
279 tex->base.screen = screen;
280
281 assert(templat->last_level < SVGA_MAX_TEXTURE_LEVELS);
282 if(templat->last_level >= SVGA_MAX_TEXTURE_LEVELS)
283 goto error2;
284
285 width = templat->width0;
286 height = templat->height0;
287 depth = templat->depth0;
288 for(level = 0; level <= templat->last_level; ++level) {
289 width = u_minify(width, 1);
290 height = u_minify(height, 1);
291 depth = u_minify(depth, 1);
292 }
293
294 tex->key.flags = 0;
295 tex->key.size.width = templat->width0;
296 tex->key.size.height = templat->height0;
297 tex->key.size.depth = templat->depth0;
298
299 if(templat->target == PIPE_TEXTURE_CUBE) {
300 tex->key.flags |= SVGA3D_SURFACE_CUBEMAP;
301 tex->key.numFaces = 6;
302 }
303 else {
304 tex->key.numFaces = 1;
305 }
306
307 tex->key.cachable = 1;
308
309 if(templat->tex_usage & PIPE_TEXTURE_USAGE_SAMPLER)
310 tex->key.flags |= SVGA3D_SURFACE_HINT_TEXTURE;
311
312 if(templat->tex_usage & PIPE_TEXTURE_USAGE_DISPLAY_TARGET) {
313 tex->key.cachable = 0;
314 }
315
316 if(templat->tex_usage & PIPE_TEXTURE_USAGE_SHARED) {
317 tex->key.cachable = 0;
318 }
319
320 if(templat->tex_usage & PIPE_TEXTURE_USAGE_SCANOUT) {
321 tex->key.flags |= SVGA3D_SURFACE_HINT_SCANOUT;
322 tex->key.cachable = 0;
323 }
324
325 /*
326 * XXX: Never pass the SVGA3D_SURFACE_HINT_RENDERTARGET hint. Mesa cannot
327 * know beforehand whether a texture will be used as a rendertarget or not
328 * and it always requests PIPE_TEXTURE_USAGE_RENDER_TARGET, therefore
329 * passing the SVGA3D_SURFACE_HINT_RENDERTARGET here defeats its purpose.
330 */
331 #if 0
332 if((templat->tex_usage & PIPE_TEXTURE_USAGE_RENDER_TARGET) &&
333 !util_format_is_compressed(templat->format))
334 tex->key.flags |= SVGA3D_SURFACE_HINT_RENDERTARGET;
335 #endif
336
337 if(templat->tex_usage & PIPE_TEXTURE_USAGE_DEPTH_STENCIL)
338 tex->key.flags |= SVGA3D_SURFACE_HINT_DEPTHSTENCIL;
339
340 tex->key.numMipLevels = templat->last_level + 1;
341
342 tex->key.format = svga_translate_format(templat->format);
343 if(tex->key.format == SVGA3D_FORMAT_INVALID)
344 goto error2;
345
346 SVGA_DBG(DEBUG_DMA, "surface_create for texture\n", tex->handle);
347 tex->handle = svga_screen_surface_create(svgascreen, &tex->key);
348 if (tex->handle)
349 SVGA_DBG(DEBUG_DMA, " --> got sid %p (texture)\n", tex->handle);
350
351 return &tex->base;
352
353 error2:
354 FREE(tex);
355 error1:
356 return NULL;
357 }
358
359
360
361
362
363 static struct pipe_texture *
364 svga_screen_texture_from_handle(struct pipe_screen *screen,
365 const struct pipe_texture *base,
366 struct winsys_handle *whandle)
367 {
368 struct svga_winsys_screen *sws = svga_winsys_screen(screen);
369 struct svga_winsys_surface *srf;
370 struct svga_texture *tex;
371 enum SVGA3dSurfaceFormat format = 0;
372 assert(screen);
373
374 /* Only supports one type */
375 if (base->target != PIPE_TEXTURE_2D ||
376 base->last_level != 0 ||
377 base->depth0 != 1) {
378 return NULL;
379 }
380
381 srf = sws->surface_from_handle(sws, whandle, &format);
382
383 if (!srf)
384 return NULL;
385
386 if (svga_translate_format(base->format) != format) {
387 unsigned f1 = svga_translate_format(base->format);
388 unsigned f2 = format;
389
390 /* It's okay for XRGB and ARGB or depth with/out stencil to get mixed up */
391 if ( !( (f1 == SVGA3D_X8R8G8B8 && f2 == SVGA3D_A8R8G8B8) ||
392 (f1 == SVGA3D_A8R8G8B8 && f2 == SVGA3D_X8R8G8B8) ||
393 (f1 == SVGA3D_Z_D24X8 && f2 == SVGA3D_Z_D24S8) ) ) {
394 debug_printf("%s wrong format %u != %u\n", __FUNCTION__, f1, f2);
395 return NULL;
396 }
397 }
398
399 tex = CALLOC_STRUCT(svga_texture);
400 if (!tex)
401 return NULL;
402
403 tex->base = *base;
404
405
406 if (format == 1)
407 tex->base.format = PIPE_FORMAT_B8G8R8X8_UNORM;
408 else if (format == 2)
409 tex->base.format = PIPE_FORMAT_B8G8R8A8_UNORM;
410
411 pipe_reference_init(&tex->base.reference, 1);
412 tex->base.screen = screen;
413
414 SVGA_DBG(DEBUG_DMA, "wrap surface sid %p\n", srf);
415
416 tex->key.cachable = 0;
417 tex->handle = srf;
418
419 return &tex->base;
420 }
421
422
423 static boolean
424 svga_screen_texture_get_handle(struct pipe_screen *screen,
425 struct pipe_texture *texture,
426 struct winsys_handle *whandle)
427 {
428 struct svga_winsys_screen *sws = svga_winsys_screen(texture->screen);
429 unsigned stride;
430
431 assert(svga_texture(texture)->key.cachable == 0);
432 svga_texture(texture)->key.cachable = 0;
433 stride = util_format_get_nblocksx(texture->format, texture->width0) *
434 util_format_get_blocksize(texture->format);
435 return sws->surface_get_handle(sws, svga_texture(texture)->handle, stride, whandle);
436 }
437
438
439 static void
440 svga_texture_destroy(struct pipe_texture *pt)
441 {
442 struct svga_screen *ss = svga_screen(pt->screen);
443 struct svga_texture *tex = (struct svga_texture *)pt;
444
445 ss->texture_timestamp++;
446
447 svga_sampler_view_reference(&tex->cached_view, NULL);
448
449 /*
450 DBG("%s deleting %p\n", __FUNCTION__, (void *) tex);
451 */
452 SVGA_DBG(DEBUG_DMA, "unref sid %p (texture)\n", tex->handle);
453 svga_screen_surface_destroy(ss, &tex->key, &tex->handle);
454
455 FREE(tex);
456 }
457
458
459 static void
460 svga_texture_copy_handle(struct svga_context *svga,
461 struct svga_screen *ss,
462 struct svga_winsys_surface *src_handle,
463 unsigned src_x, unsigned src_y, unsigned src_z,
464 unsigned src_level, unsigned src_face,
465 struct svga_winsys_surface *dst_handle,
466 unsigned dst_x, unsigned dst_y, unsigned dst_z,
467 unsigned dst_level, unsigned dst_face,
468 unsigned width, unsigned height, unsigned depth)
469 {
470 struct svga_surface dst, src;
471 enum pipe_error ret;
472 SVGA3dCopyBox box, *boxes;
473
474 assert(svga || ss);
475
476 src.handle = src_handle;
477 src.real_level = src_level;
478 src.real_face = src_face;
479 src.real_zslice = 0;
480
481 dst.handle = dst_handle;
482 dst.real_level = dst_level;
483 dst.real_face = dst_face;
484 dst.real_zslice = 0;
485
486 box.x = dst_x;
487 box.y = dst_y;
488 box.z = dst_z;
489 box.w = width;
490 box.h = height;
491 box.d = depth;
492 box.srcx = src_x;
493 box.srcy = src_y;
494 box.srcz = src_z;
495
496 /*
497 SVGA_DBG(DEBUG_VIEWS, "mipcopy src: %p %u (%ux%ux%u), dst: %p %u (%ux%ux%u)\n",
498 src_handle, src_level, src_x, src_y, src_z,
499 dst_handle, dst_level, dst_x, dst_y, dst_z);
500 */
501
502 if (svga) {
503 ret = SVGA3D_BeginSurfaceCopy(svga->swc,
504 &src.base,
505 &dst.base,
506 &boxes, 1);
507 if(ret != PIPE_OK) {
508 svga_context_flush(svga, NULL);
509 ret = SVGA3D_BeginSurfaceCopy(svga->swc,
510 &src.base,
511 &dst.base,
512 &boxes, 1);
513 assert(ret == PIPE_OK);
514 }
515 *boxes = box;
516 SVGA_FIFOCommitAll(svga->swc);
517 } else {
518 pipe_mutex_lock(ss->swc_mutex);
519 ret = SVGA3D_BeginSurfaceCopy(ss->swc,
520 &src.base,
521 &dst.base,
522 &boxes, 1);
523 if(ret != PIPE_OK) {
524 ss->swc->flush(ss->swc, NULL);
525 ret = SVGA3D_BeginSurfaceCopy(ss->swc,
526 &src.base,
527 &dst.base,
528 &boxes, 1);
529 assert(ret == PIPE_OK);
530 }
531 *boxes = box;
532 SVGA_FIFOCommitAll(ss->swc);
533 pipe_mutex_unlock(ss->swc_mutex);
534 }
535 }
536
537 static struct svga_winsys_surface *
538 svga_texture_view_surface(struct pipe_context *pipe,
539 struct svga_texture *tex,
540 SVGA3dSurfaceFormat format,
541 unsigned start_mip,
542 unsigned num_mip,
543 int face_pick,
544 int zslice_pick,
545 struct svga_host_surface_cache_key *key) /* OUT */
546 {
547 struct svga_screen *ss = svga_screen(tex->base.screen);
548 struct svga_winsys_surface *handle;
549 uint32_t i, j;
550 unsigned z_offset = 0;
551
552 SVGA_DBG(DEBUG_PERF,
553 "svga: Create surface view: face %d zslice %d mips %d..%d\n",
554 face_pick, zslice_pick, start_mip, start_mip+num_mip-1);
555
556 key->flags = 0;
557 key->format = format;
558 key->numMipLevels = num_mip;
559 key->size.width = u_minify(tex->base.width0, start_mip);
560 key->size.height = u_minify(tex->base.height0, start_mip);
561 key->size.depth = zslice_pick < 0 ? u_minify(tex->base.depth0, start_mip) : 1;
562 key->cachable = 1;
563 assert(key->size.depth == 1);
564
565 if(tex->base.target == PIPE_TEXTURE_CUBE && face_pick < 0) {
566 key->flags |= SVGA3D_SURFACE_CUBEMAP;
567 key->numFaces = 6;
568 } else {
569 key->numFaces = 1;
570 }
571
572 if(key->format == SVGA3D_FORMAT_INVALID) {
573 key->cachable = 0;
574 return NULL;
575 }
576
577 SVGA_DBG(DEBUG_DMA, "surface_create for texture view\n");
578 handle = svga_screen_surface_create(ss, key);
579 if (!handle) {
580 key->cachable = 0;
581 return NULL;
582 }
583
584 SVGA_DBG(DEBUG_DMA, " --> got sid %p (texture view)\n", handle);
585
586 if (face_pick < 0)
587 face_pick = 0;
588
589 if (zslice_pick >= 0)
590 z_offset = zslice_pick;
591
592 for (i = 0; i < key->numMipLevels; i++) {
593 for (j = 0; j < key->numFaces; j++) {
594 if(tex->defined[j + face_pick][i + start_mip]) {
595 unsigned depth = (zslice_pick < 0 ?
596 u_minify(tex->base.depth0, i + start_mip) :
597 1);
598
599 svga_texture_copy_handle(svga_context(pipe),
600 ss,
601 tex->handle,
602 0, 0, z_offset,
603 i + start_mip,
604 j + face_pick,
605 handle, 0, 0, 0, i, j,
606 u_minify(tex->base.width0, i + start_mip),
607 u_minify(tex->base.height0, i + start_mip),
608 depth);
609 }
610 }
611 }
612
613 return handle;
614 }
615
616
617 static struct pipe_surface *
618 svga_get_tex_surface(struct pipe_screen *screen,
619 struct pipe_texture *pt,
620 unsigned face, unsigned level, unsigned zslice,
621 unsigned flags)
622 {
623 struct svga_texture *tex = svga_texture(pt);
624 struct svga_surface *s;
625 boolean render = flags & PIPE_BUFFER_USAGE_GPU_WRITE ? TRUE : FALSE;
626 boolean view = FALSE;
627 SVGA3dSurfaceFormat format;
628
629 s = CALLOC_STRUCT(svga_surface);
630 if (!s)
631 return NULL;
632
633 pipe_reference_init(&s->base.reference, 1);
634 pipe_texture_reference(&s->base.texture, pt);
635 s->base.format = pt->format;
636 s->base.width = u_minify(pt->width0, level);
637 s->base.height = u_minify(pt->height0, level);
638 s->base.usage = flags;
639 s->base.level = level;
640 s->base.face = face;
641 s->base.zslice = zslice;
642
643 if (!render)
644 format = svga_translate_format(pt->format);
645 else
646 format = svga_translate_format_render(pt->format);
647
648 assert(format != SVGA3D_FORMAT_INVALID);
649 assert(!(flags & PIPE_BUFFER_USAGE_CPU_READ_WRITE));
650
651
652 if (svga_screen(screen)->debug.force_surface_view)
653 view = TRUE;
654
655 /* Currently only used for compressed textures */
656 if (render &&
657 format != svga_translate_format(pt->format)) {
658 view = TRUE;
659 }
660
661 if (level != 0 &&
662 svga_screen(screen)->debug.force_level_surface_view)
663 view = TRUE;
664
665 if (pt->target == PIPE_TEXTURE_3D)
666 view = TRUE;
667
668 if (svga_screen(screen)->debug.no_surface_view)
669 view = FALSE;
670
671 if (view) {
672 SVGA_DBG(DEBUG_VIEWS, "svga: Surface view: yes %p, level %u face %u z %u, %p\n",
673 pt, level, face, zslice, s);
674
675 s->handle = svga_texture_view_surface(NULL, tex, format, level, 1, face, zslice,
676 &s->key);
677 s->real_face = 0;
678 s->real_level = 0;
679 s->real_zslice = 0;
680 } else {
681 SVGA_DBG(DEBUG_VIEWS, "svga: Surface view: no %p, level %u, face %u, z %u, %p\n",
682 pt, level, face, zslice, s);
683
684 memset(&s->key, 0, sizeof s->key);
685 s->handle = tex->handle;
686 s->real_face = face;
687 s->real_level = level;
688 s->real_zslice = zslice;
689 }
690
691 return &s->base;
692 }
693
694
695 static void
696 svga_tex_surface_destroy(struct pipe_surface *surf)
697 {
698 struct svga_surface *s = svga_surface(surf);
699 struct svga_texture *t = svga_texture(surf->texture);
700 struct svga_screen *ss = svga_screen(surf->texture->screen);
701
702 if(s->handle != t->handle) {
703 SVGA_DBG(DEBUG_DMA, "unref sid %p (tex surface)\n", s->handle);
704 svga_screen_surface_destroy(ss, &s->key, &s->handle);
705 }
706
707 pipe_texture_reference(&surf->texture, NULL);
708 FREE(surf);
709 }
710
711
712 static INLINE void
713 svga_mark_surface_dirty(struct pipe_surface *surf)
714 {
715 struct svga_surface *s = svga_surface(surf);
716
717 if(!s->dirty) {
718 struct svga_texture *tex = svga_texture(surf->texture);
719
720 s->dirty = TRUE;
721
722 if (s->handle == tex->handle)
723 tex->defined[surf->face][surf->level] = TRUE;
724 else {
725 /* this will happen later in svga_propagate_surface */
726 }
727 }
728 }
729
730
731 void svga_mark_surfaces_dirty(struct svga_context *svga)
732 {
733 unsigned i;
734
735 for (i = 0; i < PIPE_MAX_COLOR_BUFS; i++) {
736 if (svga->curr.framebuffer.cbufs[i])
737 svga_mark_surface_dirty(svga->curr.framebuffer.cbufs[i]);
738 }
739 if (svga->curr.framebuffer.zsbuf)
740 svga_mark_surface_dirty(svga->curr.framebuffer.zsbuf);
741 }
742
743 /**
744 * Progagate any changes from surfaces to texture.
745 * pipe is optional context to inline the blit command in.
746 */
747 void
748 svga_propagate_surface(struct pipe_context *pipe, struct pipe_surface *surf)
749 {
750 struct svga_surface *s = svga_surface(surf);
751 struct svga_texture *tex = svga_texture(surf->texture);
752 struct svga_screen *ss = svga_screen(surf->texture->screen);
753
754 if (!s->dirty)
755 return;
756
757 s->dirty = FALSE;
758 ss->texture_timestamp++;
759 tex->view_age[surf->level] = ++(tex->age);
760
761 if (s->handle != tex->handle) {
762 SVGA_DBG(DEBUG_VIEWS, "svga: Surface propagate: tex %p, level %u, from %p\n", tex, surf->level, surf);
763 svga_texture_copy_handle(svga_context(pipe), ss,
764 s->handle, 0, 0, 0, s->real_level, s->real_face,
765 tex->handle, 0, 0, surf->zslice, surf->level, surf->face,
766 u_minify(tex->base.width0, surf->level),
767 u_minify(tex->base.height0, surf->level), 1);
768 tex->defined[surf->face][surf->level] = TRUE;
769 }
770 }
771
772 /**
773 * Check if we should call svga_propagate_surface on the surface.
774 */
775 extern boolean
776 svga_surface_needs_propagation(struct pipe_surface *surf)
777 {
778 struct svga_surface *s = svga_surface(surf);
779 struct svga_texture *tex = svga_texture(surf->texture);
780
781 return s->dirty && s->handle != tex->handle;
782 }
783
784 /* XXX: Still implementing this as if it was a screen function, but
785 * can now modify it to queue transfers on the context.
786 */
787 static struct pipe_transfer *
788 svga_get_tex_transfer(struct pipe_context *pipe,
789 struct pipe_texture *texture,
790 unsigned face, unsigned level, unsigned zslice,
791 enum pipe_transfer_usage usage, unsigned x, unsigned y,
792 unsigned w, unsigned h)
793 {
794 struct svga_screen *ss = svga_screen(pipe->screen);
795 struct svga_winsys_screen *sws = ss->sws;
796 struct svga_transfer *st;
797 unsigned nblocksx = util_format_get_nblocksx(texture->format, w);
798 unsigned nblocksy = util_format_get_nblocksy(texture->format, h);
799
800 /* We can't map texture storage directly */
801 if (usage & PIPE_TRANSFER_MAP_DIRECTLY)
802 return NULL;
803
804 st = CALLOC_STRUCT(svga_transfer);
805 if (!st)
806 return NULL;
807
808 st->base.x = x;
809 st->base.y = y;
810 st->base.width = w;
811 st->base.height = h;
812 st->base.stride = nblocksx*util_format_get_blocksize(texture->format);
813 st->base.usage = usage;
814 st->base.face = face;
815 st->base.level = level;
816 st->base.zslice = zslice;
817
818 st->hw_nblocksy = nblocksy;
819
820 st->hwbuf = svga_winsys_buffer_create(ss,
821 1,
822 0,
823 st->hw_nblocksy*st->base.stride);
824 while(!st->hwbuf && (st->hw_nblocksy /= 2)) {
825 st->hwbuf = svga_winsys_buffer_create(ss,
826 1,
827 0,
828 st->hw_nblocksy*st->base.stride);
829 }
830
831 if(!st->hwbuf)
832 goto no_hwbuf;
833
834 if(st->hw_nblocksy < nblocksy) {
835 /* We couldn't allocate a hardware buffer big enough for the transfer,
836 * so allocate regular malloc memory instead */
837 debug_printf("%s: failed to allocate %u KB of DMA, splitting into %u x %u KB DMA transfers\n",
838 __FUNCTION__,
839 (nblocksy*st->base.stride + 1023)/1024,
840 (nblocksy + st->hw_nblocksy - 1)/st->hw_nblocksy,
841 (st->hw_nblocksy*st->base.stride + 1023)/1024);
842 st->swbuf = MALLOC(nblocksy*st->base.stride);
843 if(!st->swbuf)
844 goto no_swbuf;
845 }
846
847 pipe_texture_reference(&st->base.texture, texture);
848
849 if (usage & PIPE_TRANSFER_READ)
850 svga_transfer_dma(st, SVGA3D_READ_HOST_VRAM);
851
852 return &st->base;
853
854 no_swbuf:
855 sws->buffer_destroy(sws, st->hwbuf);
856 no_hwbuf:
857 FREE(st);
858 return NULL;
859 }
860
861
862 /* XXX: Still implementing this as if it was a screen function, but
863 * can now modify it to queue transfers on the context.
864 */
865 static void *
866 svga_transfer_map( struct pipe_context *pipe,
867 struct pipe_transfer *transfer )
868 {
869 struct svga_screen *ss = svga_screen(pipe->screen);
870 struct svga_winsys_screen *sws = ss->sws;
871 struct svga_transfer *st = svga_transfer(transfer);
872
873 if(st->swbuf)
874 return st->swbuf;
875 else
876 /* The wait for read transfers already happened when svga_transfer_dma
877 * was called. */
878 return sws->buffer_map(sws, st->hwbuf,
879 pipe_transfer_buffer_flags(transfer));
880 }
881
882
883 /* XXX: Still implementing this as if it was a screen function, but
884 * can now modify it to queue transfers on the context.
885 */
886 static void
887 svga_transfer_unmap(struct pipe_context *pipe,
888 struct pipe_transfer *transfer)
889 {
890 struct svga_screen *ss = svga_screen(pipe->screen);
891 struct svga_winsys_screen *sws = ss->sws;
892 struct svga_transfer *st = svga_transfer(transfer);
893
894 if(!st->swbuf)
895 sws->buffer_unmap(sws, st->hwbuf);
896 }
897
898
899 static void
900 svga_tex_transfer_destroy(struct pipe_context *pipe,
901 struct pipe_transfer *transfer)
902 {
903 struct svga_texture *tex = svga_texture(transfer->texture);
904 struct svga_screen *ss = svga_screen(pipe->screen);
905 struct svga_winsys_screen *sws = ss->sws;
906 struct svga_transfer *st = svga_transfer(transfer);
907
908 if (st->base.usage & PIPE_TRANSFER_WRITE) {
909 svga_transfer_dma(st, SVGA3D_WRITE_HOST_VRAM);
910 ss->texture_timestamp++;
911 tex->view_age[transfer->level] = ++(tex->age);
912 tex->defined[transfer->face][transfer->level] = TRUE;
913 }
914
915 pipe_texture_reference(&st->base.texture, NULL);
916 FREE(st->swbuf);
917 sws->buffer_destroy(sws, st->hwbuf);
918 FREE(st);
919 }
920
921
922 void
923 svga_init_texture_functions(struct pipe_context *pipe)
924 {
925 pipe->get_tex_transfer = svga_get_tex_transfer;
926 pipe->transfer_map = svga_transfer_map;
927 pipe->transfer_unmap = svga_transfer_unmap;
928 pipe->tex_transfer_destroy = svga_tex_transfer_destroy;
929 }
930
931
932 void
933 svga_screen_init_texture_functions(struct pipe_screen *screen)
934 {
935 screen->texture_create = svga_texture_create;
936 screen->texture_from_handle = svga_screen_texture_from_handle;
937 screen->texture_get_handle = svga_screen_texture_get_handle;
938 screen->texture_destroy = svga_texture_destroy;
939 screen->get_tex_surface = svga_get_tex_surface;
940 screen->tex_surface_destroy = svga_tex_surface_destroy;
941 }
942
943 /***********************************************************************
944 */
945
946 struct svga_sampler_view *
947 svga_get_tex_sampler_view(struct pipe_context *pipe, struct pipe_texture *pt,
948 unsigned min_lod, unsigned max_lod)
949 {
950 struct svga_screen *ss = svga_screen(pt->screen);
951 struct svga_texture *tex = svga_texture(pt);
952 struct svga_sampler_view *sv = NULL;
953 SVGA3dSurfaceFormat format = svga_translate_format(pt->format);
954 boolean view = TRUE;
955
956 assert(pt);
957 assert(min_lod >= 0);
958 assert(min_lod <= max_lod);
959 assert(max_lod <= pt->last_level);
960
961
962 /* Is a view needed */
963 {
964 /*
965 * Can't control max lod. For first level views and when we only
966 * look at one level we disable mip filtering to achive the same
967 * results as a view.
968 */
969 if (min_lod == 0 && max_lod >= pt->last_level)
970 view = FALSE;
971
972 if (util_format_is_compressed(pt->format) && view) {
973 format = svga_translate_format_render(pt->format);
974 }
975
976 if (ss->debug.no_sampler_view)
977 view = FALSE;
978
979 if (ss->debug.force_sampler_view)
980 view = TRUE;
981 }
982
983 /* First try the cache */
984 if (view) {
985 pipe_mutex_lock(ss->tex_mutex);
986 if (tex->cached_view &&
987 tex->cached_view->min_lod == min_lod &&
988 tex->cached_view->max_lod == max_lod) {
989 svga_sampler_view_reference(&sv, tex->cached_view);
990 pipe_mutex_unlock(ss->tex_mutex);
991 SVGA_DBG(DEBUG_VIEWS, "svga: Sampler view: reuse %p, %u %u, last %u\n",
992 pt, min_lod, max_lod, pt->last_level);
993 svga_validate_sampler_view(svga_context(pipe), sv);
994 return sv;
995 }
996 pipe_mutex_unlock(ss->tex_mutex);
997 }
998
999 sv = CALLOC_STRUCT(svga_sampler_view);
1000 pipe_reference_init(&sv->reference, 1);
1001 pipe_texture_reference(&sv->texture, pt);
1002 sv->min_lod = min_lod;
1003 sv->max_lod = max_lod;
1004
1005 /* No view needed just use the whole texture */
1006 if (!view) {
1007 SVGA_DBG(DEBUG_VIEWS,
1008 "svga: Sampler view: no %p, mips %u..%u, nr %u, size (%ux%ux%u), last %u\n",
1009 pt, min_lod, max_lod,
1010 max_lod - min_lod + 1,
1011 pt->width0,
1012 pt->height0,
1013 pt->depth0,
1014 pt->last_level);
1015 sv->key.cachable = 0;
1016 sv->handle = tex->handle;
1017 return sv;
1018 }
1019
1020 SVGA_DBG(DEBUG_VIEWS,
1021 "svga: Sampler view: yes %p, mips %u..%u, nr %u, size (%ux%ux%u), last %u\n",
1022 pt, min_lod, max_lod,
1023 max_lod - min_lod + 1,
1024 pt->width0,
1025 pt->height0,
1026 pt->depth0,
1027 pt->last_level);
1028
1029 sv->age = tex->age;
1030 sv->handle = svga_texture_view_surface(pipe, tex, format,
1031 min_lod,
1032 max_lod - min_lod + 1,
1033 -1, -1,
1034 &sv->key);
1035
1036 if (!sv->handle) {
1037 assert(0);
1038 sv->key.cachable = 0;
1039 sv->handle = tex->handle;
1040 return sv;
1041 }
1042
1043 pipe_mutex_lock(ss->tex_mutex);
1044 svga_sampler_view_reference(&tex->cached_view, sv);
1045 pipe_mutex_unlock(ss->tex_mutex);
1046
1047 return sv;
1048 }
1049
1050 void
1051 svga_validate_sampler_view(struct svga_context *svga, struct svga_sampler_view *v)
1052 {
1053 struct svga_texture *tex = svga_texture(v->texture);
1054 unsigned numFaces;
1055 unsigned age = 0;
1056 int i, k;
1057
1058 assert(svga);
1059
1060 if (v->handle == tex->handle)
1061 return;
1062
1063 age = tex->age;
1064
1065 if(tex->base.target == PIPE_TEXTURE_CUBE)
1066 numFaces = 6;
1067 else
1068 numFaces = 1;
1069
1070 for (i = v->min_lod; i <= v->max_lod; i++) {
1071 for (k = 0; k < numFaces; k++) {
1072 if (v->age < tex->view_age[i])
1073 svga_texture_copy_handle(svga, NULL,
1074 tex->handle, 0, 0, 0, i, k,
1075 v->handle, 0, 0, 0, i - v->min_lod, k,
1076 u_minify(tex->base.width0, i),
1077 u_minify(tex->base.height0, i),
1078 u_minify(tex->base.depth0, i));
1079 }
1080 }
1081
1082 v->age = age;
1083 }
1084
1085 void
1086 svga_destroy_sampler_view_priv(struct svga_sampler_view *v)
1087 {
1088 struct svga_texture *tex = svga_texture(v->texture);
1089
1090 if(v->handle != tex->handle) {
1091 struct svga_screen *ss = svga_screen(v->texture->screen);
1092 SVGA_DBG(DEBUG_DMA, "unref sid %p (sampler view)\n", v->handle);
1093 svga_screen_surface_destroy(ss, &v->key, &v->handle);
1094 }
1095 pipe_texture_reference(&v->texture, NULL);
1096 FREE(v);
1097 }
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