gallium: add target-helpers/wrap_screen.c to C_SOURCES
[mesa/mesa-lb.git] / src / gallium / drivers / i965 / brw_pipe_clear.c
blobd7048f769b2fde495fd4078d2ee18b3d2f0b5dbc
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
28 #include "util/u_pack_color.h"
30 #include "pipe/p_state.h"
32 #include "brw_batchbuffer.h"
33 #include "brw_screen.h"
34 #include "brw_context.h"
36 #define MASK16 0xffff
37 #define MASK24 0xffffff
40 /**
41 * Use blitting to clear the renderbuffers named by 'flags'.
42 * Note: we can't use the ctx->DrawBuffer->_ColorDrawBufferIndexes field
43 * since that might include software renderbuffers or renderbuffers
44 * which we're clearing with triangles.
45 * \param mask bitmask of BUFFER_BIT_* values indicating buffers to clear
47 static enum pipe_error
48 try_clear( struct brw_context *brw,
49 struct brw_surface *surface,
50 unsigned value )
52 uint32_t BR13, CMD;
53 int x1 = 0;
54 int y1 = 0;
55 int x2 = surface->base.width;
56 int y2 = surface->base.height;
57 int pitch = surface->pitch;
58 int cpp = surface->cpp;
60 if (x2 == 0 || y2 == 0)
61 return 0;
63 debug_printf("%s dst:buf(%p)/%d+%d %d,%d sz:%dx%d\n",
64 __FUNCTION__,
65 (void *)surface->bo, pitch * cpp,
66 surface->base.offset,
67 x1, y1, x2 - x1, y2 - y1);
69 BR13 = 0xf0 << 16;
70 CMD = XY_COLOR_BLT_CMD | XY_BLT_WRITE_RGB | XY_BLT_WRITE_ALPHA;
72 /* Setup the blit command */
73 if (cpp == 4) {
74 BR13 |= BR13_8888;
75 CMD |= XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB;
77 else {
78 assert(cpp == 2);
79 BR13 |= BR13_565;
82 /* XXX: nasty hack for clearing depth buffers
84 if (surface->tiling == BRW_TILING_Y) {
85 x2 = pitch;
88 if (surface->tiling == BRW_TILING_X) {
89 CMD |= XY_DST_TILED;
90 pitch /= 4;
93 BR13 |= (pitch * cpp);
95 BEGIN_BATCH(6, 0);
96 OUT_BATCH(CMD);
97 OUT_BATCH(BR13);
98 OUT_BATCH((y1 << 16) | x1);
99 OUT_BATCH((y2 << 16) | x2);
100 OUT_RELOC(surface->bo,
101 BRW_USAGE_BLIT_DEST,
102 surface->base.offset);
103 OUT_BATCH(value);
104 ADVANCE_BATCH();
106 return 0;
112 static void color_clear(struct brw_context *brw,
113 struct brw_surface *bsurface,
114 const float *rgba )
116 enum pipe_error ret;
117 union util_color value;
119 util_pack_color( rgba, bsurface->base.format, &value );
121 if (bsurface->cpp == 2)
122 value.ui |= value.ui << 16;
124 ret = try_clear( brw, bsurface, value.ui );
126 if (ret != 0) {
127 brw_context_flush( brw );
128 ret = try_clear( brw, bsurface, value.ui );
129 assert( ret == 0 );
133 static void zstencil_clear(struct brw_context *brw,
134 struct brw_surface *bsurface,
135 double depth,
136 unsigned stencil )
138 enum pipe_error ret;
139 unsigned value;
141 switch (bsurface->base.format) {
142 case PIPE_FORMAT_Z24X8_UNORM:
143 case PIPE_FORMAT_Z24S8_UNORM:
144 value = ((unsigned)(depth * MASK24) & MASK24);
145 break;
146 case PIPE_FORMAT_Z16_UNORM:
147 value = ((unsigned)(depth * MASK16) & MASK16);
148 break;
149 default:
150 assert(0);
151 return;
154 switch (bsurface->base.format) {
155 case PIPE_FORMAT_Z24X8_UNORM:
156 case PIPE_FORMAT_Z24S8_UNORM:
157 value = value | (stencil << 24);
158 break;
160 case PIPE_FORMAT_Z16_UNORM:
161 value = value | (value << 16);
162 break;
164 default:
165 break;
168 ret = try_clear( brw, bsurface, value );
170 if (ret != 0) {
171 brw_context_flush( brw );
172 ret = try_clear( brw, bsurface, value );
173 assert( ret == 0 );
180 * Clear the given surface to the specified value.
181 * No masking, no scissor (clear entire buffer).
183 static void brw_clear(struct pipe_context *pipe,
184 unsigned buffers,
185 const float *rgba,
186 double depth,
187 unsigned stencil)
189 struct brw_context *brw = brw_context( pipe );
190 int i;
192 if (buffers & PIPE_CLEAR_COLOR) {
193 for (i = 0; i < brw->curr.fb.nr_cbufs; i++) {
194 color_clear( brw,
195 brw_surface(brw->curr.fb.cbufs[i]),
196 rgba );
200 if (buffers & PIPE_CLEAR_DEPTHSTENCIL) {
201 if (brw->curr.fb.zsbuf) {
202 zstencil_clear( brw,
203 brw_surface(brw->curr.fb.zsbuf),
204 depth, stencil );
210 void brw_pipe_clear_init( struct brw_context *brw )
212 brw->base.clear = brw_clear;
216 void brw_pipe_clear_cleanup( struct brw_context *brw )