4 * Redistribution and use in source and binary forms, with or without modification,
5 * are permitted provided that the following conditions are met:
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
10 * Redistributions in binary form must reproduce the above copyright notice, this
11 * list of conditions and the following disclaimer in the documentation and/or
12 * other materials provided with the distribution.
14 * Neither the name of the NXP Semiconductor nor the names of its
15 * contributors may be used to endorse or promote products derived from this
16 * software without specific prior written permission.
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
54 uint32_t ImageStartAddr
;
59 uint32_t Reserved2
[2];
64 uint32_t ImageStartAddr
;
71 #define ROM_KERNEL_CMD_RD_MEM 0x0101
72 #define ROM_KERNEL_CMD_WR_MEM 0x0202
73 #define ROM_KERNEL_CMD_WR_FILE 0x0404
74 #define ROM_KERNEL_CMD_ERROR_STATUS 0x0505
75 #define RAM_KERNEL_CMD_HEADER 0x0606
76 //#define ROM_KERNEL_CMD_RE_ENUM 0x0909
77 #define ROM_KERNEL_CMD_DCD_WRITE 0x0A0A
78 #define ROM_KERNEL_CMD_JUMP_ADDR 0x0B0B
79 #define ROM_KERNEL_CMD_SKIP_DCD_HEADER 0x0C0C
81 #define MAX_DCD_WRITE_REG_CNT 85
82 #define ROM_WRITE_ACK 0x128A8A12
83 #define ROM_STATUS_ACK 0x88888888
84 #define ROM_OK_ACK 0x900DD009
86 #define IVT_BARKER_HEADER 0x402000D1
87 #define IVT_BARKER2_HEADER 0x412000D1
89 #define HAB_TAG_DCD 0xd2 /**< Device Configuration Data */
91 class SDPCmdBase
:public CmdBase
98 HabEnabled
= 0x12343412,
99 HabDisabled
= 0x56787856
102 SDPCmdBase(char *p
) :CmdBase(p
) { init_cmd(); }
105 int check_ack(HIDReport
*report
, uint32_t ack
);
106 HAB_t
get_hab_type(HIDReport
*report
);
107 int get_status(HIDReport
*p
, uint32_t &status
, uint8_t report_id
);
109 IvtHeader
* search_ivt_header(std::shared_ptr
<DataBuffer
> data
, size_t &off
, size_t limit
=ULLONG_MAX
);
111 std::string m_filename
;
113 uint64_t m_scan_limited
= UINT64_MAX
;
116 int send_cmd(HIDReport
*p
);
118 std::vector
<uint8_t> m_input
;
121 class SDPBootlogCmd
: public SDPCmdBase
124 SDPBootlogCmd(char *p
);
125 int run(CmdCtx
*) override
;
128 class SDPDcdCmd
: public SDPCmdBase
132 int run(CmdCtx
*) override
;
138 class SDPReadMemCmd
: public SDPCmdBase
141 SDPReadMemCmd(char*p
);
142 int run(CmdCtx
*) override
;
146 uint8_t m_mem_format
;
149 class SDPWriteMemCmd
: public SDPCmdBase
152 SDPWriteMemCmd(char*p
);
153 int run(CmdCtx
*p
) override
;
157 uint8_t m_mem_format
;
158 uint32_t m_mem_value
;
161 class SDPWriteCmd
: public SDPCmdBase
166 int run(CmdCtx
*p
) override
;
167 int run(CmdCtx
*p
, void *buff
, size_t size
, uint32_t addr
);
170 uint32_t m_download_addr
;
173 uint32_t m_max_download_pre_cmd
;
176 bool m_bskipspl
= false;
177 bool m_bskipfhdr
= false;
178 bool m_bscanterm
= false;
181 class SDPJumpCmd
: public SDPCmdBase
185 int run(CmdCtx
*p
) override
;
188 bool m_clear_dcd
= false;
190 uint32_t m_jump_addr
= 0;
191 bool m_PlugIn
= false;
194 class SDPSkipDCDCmd
:public SDPCmdBase
197 SDPSkipDCDCmd(char *p
);
198 int run(CmdCtx
*p
) override
;
201 class SDPStatusCmd
:public SDPCmdBase
204 SDPStatusCmd(char *p
);
205 int run(CmdCtx
*p
) override
;
208 class SDPBootCmd
: public SDPCmdBase
212 int run(CmdCtx
*p
) override
;
215 bool m_clear_dcd
= false;
216 uint32_t m_dcd_addr
= 0;
217 bool m_nojump
= false;