3 patch to fix big-endian mips support from matt@netbsd.org
6 diff -rup src/cpus/cpu_mips_coproc.cc src/cpus/cpu_mips_coproc.cc
7 --- src/cpus/cpu_mips_coproc.cc 2009-06-21 09:03:48.000000000 -0700
8 +++ src/cpus/cpu_mips_coproc.cc 2009-11-12 12:22:12.000000000 -0800
9 @@ -1987,6 +1987,13 @@ void coproc_function(struct cpu *cpu, st
11 if (cpnr < 2 && (((function & 0x03e007f8) == (COPz_MTCz << 21))
12 || ((function & 0x03e007f8) == (COPz_DMTCz << 21)))) {
13 + tmpvalue = cpu->cd.mips.gpr[rt];
14 + if (copz == COPz_MTCz) {
16 + tmpvalue &= 0xffffffffULL;
17 + if (tmpvalue & 0x80000000ULL)
18 + tmpvalue |= 0xffffffff00000000ULL;
20 if (unassemble_only) {
21 debug("%s%i\t%s,", copz==COPz_DMTCz? "dmtc" : "mtc",
23 @@ -1996,16 +2003,10 @@ void coproc_function(struct cpu *cpu, st
26 debug(",%i", (int)(function & 7));
27 + debug(" [%016llx]", (long long)tmpvalue);
31 - tmpvalue = cpu->cd.mips.gpr[rt];
32 - if (copz == COPz_MTCz) {
34 - tmpvalue &= 0xffffffffULL;
35 - if (tmpvalue & 0x80000000ULL)
36 - tmpvalue |= 0xffffffff00000000ULL;
38 coproc_register_write(cpu, cpu->cd.mips.coproc[cpnr], rd,
39 &tmpvalue, copz == COPz_DMTCz, function & 7);