drivers/orinoco/hermes.h

   1 /*
   2  * hermes.h
   3  *
   4  * Constants, structures and prototypes needed for the low level access of
   5  * Prism cards. The hermes.h file was used as the basis of this file
   6  *
   7  * Adjusted to Minix by Stevens Le Blond <slblond@few.vu.nl>
   8  *                  and Michael Valkering <mjvalker@cs.vu.nl>
   9  */
  10
  11 /* Original copyright notices from hermes.h of the Linux kernel
  12  *
  13  * Copyright (C) 2000, David Gibson, Linuxcare Australia
  14  * <hermes@gibson.dropbear.id.au>
  15  * Portions taken from hfa384x.h, Copyright (C) 1999 AbsoluteValue Systems, Inc.
  16  * All Rights Reserved.
  17  * This file distributed under the GPL, version 2.
  18  */
  19 #ifndef _HERMES_H
  20 #define _HERMES_H
  21
  22 #include <minix/drivers.h>
  23 #include <net/gen/ether.h>
  24 #include <net/gen/eth_io.h>
  25 #include <net/hton.h>
  26 #include <stdarg.h>
  27
  28 /*****************************************************************************
  29  *              HERMES CONSTANTS                                             *
  30  *****************************************************************************/
  31 #define         HERMES_ALLOC_LEN_MIN            (4)
  32 #define         HERMES_ALLOC_LEN_MAX            (2400)
  33 #define         HERMES_LTV_LEN_MAX              (34)
  34 #define         HERMES_BAP_DATALEN_MAX          (4096)
  35 #define         HERMES_BAP_OFFSET_MAX           (4096)
  36 #define         HERMES_PORTID_MAX               (7)
  37 #define         HERMES_NUMPORTS_MAX             (HERMES_PORTID_MAX+1)
  38 #define         HERMES_PDR_LEN_MAX              (260)
  39 #define         HERMES_PDA_RECS_MAX             (200)
  40 #define         HERMES_PDA_LEN_MAX              (1024)
  41 #define         HERMES_SCANRESULT_MAX           (35)
  42 #define         HERMES_CHINFORESULT_MAX         (8)
  43 #define         HERMES_MAX_MULTICAST            (16)
  44 #define         HERMES_MAGIC                    (0x69ff)
  45
  46 /*
  47  * Hermes register offsets
  48  */
  49 #define         HERMES_CMD                      (0x00)
  50 #define         HERMES_PARAM0                   (0x02)
  51 #define         HERMES_PARAM1                   (0x04)
  52 #define         HERMES_PARAM2                   (0x06)
  53 #define         HERMES_STATUS                   (0x08)
  54 #define         HERMES_RESP0                    (0x0A)
  55 #define         HERMES_RESP1                    (0x0C)
  56 #define         HERMES_RESP2                    (0x0E)
  57 #define         HERMES_INFOFID                  (0x10)
  58 #define         HERMES_RXFID                    (0x20)
  59 #define         HERMES_ALLOCFID                 (0x22)
  60 #define         HERMES_TXCOMPLFID               (0x24)
  61 #define         HERMES_SELECT0                  (0x18)
  62 #define         HERMES_OFFSET0                  (0x1C)
  63 #define         HERMES_DATA0                    (0x36)
  64 #define         HERMES_SELECT1                  (0x1A)
  65 #define         HERMES_OFFSET1                  (0x1E)
  66 #define         HERMES_DATA1                    (0x38)
  67 #define         HERMES_EVSTAT                   (0x30)
  68 #define         HERMES_INTEN                    (0x32)
  69 #define         HERMES_EVACK                    (0x34)
  70 #define         HERMES_CONTROL                  (0x14)
  71 #define         HERMES_SWSUPPORT0               (0x28)
  72 #define         HERMES_SWSUPPORT1               (0x2A)
  73 #define         HERMES_SWSUPPORT2               (0x2C)
  74 #define         HERMES_AUXPAGE                  (0x3A)
  75 #define         HERMES_AUXOFFSET                (0x3C)
  76 #define         HERMES_AUXDATA                  (0x3E)
  77
  78 /*
  79  * CMD register bitmasks
  80  */
  81 #define         HERMES_CMD_BUSY                 (0x8000)
  82 #define         HERMES_CMD_AINFO                (0x7f00)
  83 #define         HERMES_CMD_MACPORT              (0x0700)
  84 #define         HERMES_CMD_RECL                 (0x0100)
  85 #define         HERMES_CMD_WRITE                (0x0100)
  86 #define         HERMES_CMD_PROGMODE             (0x0300)
  87 #define         HERMES_CMD_CMDCODE              (0x003f)
  88
  89 /*
  90  * STATUS register bitmasks
  91  */
  92 #define         HERMES_STATUS_RESULT            (0x7f00)
  93 #define         HERMES_STATUS_CMDCODE           (0x003f)
  94
  95 /*
  96  * OFFSET register bitmasks
  97  */
  98 #define         HERMES_OFFSET_BUSY              (0x8000)
  99 #define         HERMES_OFFSET_ERR               (0x4000)
 100 #define         HERMES_OFFSET_DATAOFF           (0x0ffe)
 101
 102 /*
 103  * Event register bitmasks (INTEN, EVSTAT, EVACK)
 104  */
 105 #define         HERMES_EV_TICK                  (0x8000)
 106 #define         HERMES_EV_WTERR                 (0x4000)
 107 #define         HERMES_EV_INFDROP               (0x2000)
 108 #define         HERMES_EV_INFO                  (0x0080)
 109 #define         HERMES_EV_DTIM                  (0x0020)
 110 #define         HERMES_EV_CMD                   (0x0010)
 111 #define         HERMES_EV_ALLOC                 (0x0008)
 112 #define         HERMES_EV_TXEXC                 (0x0004)
 113 #define         HERMES_EV_TX                    (0x0002)
 114 #define         HERMES_EV_RX                    (0x0001)
 115
 116 /*
 117  * COR reset options
 118  */
 119 #define         HERMES_PCI_COR                  (0x26)
 120 #define         HERMES_PCI_COR_MASK             (0x0080)
 121 /* It appears that the card needs quite some time to recover: */
 122 #define         HERMES_PCI_COR_ONT              (250) /* ms */
 123 #define         HERMES_PCI_COR_OFFT             (500) /* ms */
 124 #define         HERMES_PCI_COR_BUSYT            (500) /* ms */
 125 /*
 126  * Command codes
 127  */
 128 /*--- Controller Commands --------------------------*/
 129 #define         HERMES_CMD_INIT                 (0x0000)
 130 #define         HERMES_CMD_ENABLE               (0x0001)
 131 #define         HERMES_CMD_DISABLE              (0x0002)
 132 #define         HERMES_CMD_DIAG                 (0x0003)
 133
 134 /*--- Buffer Mgmt Commands --------------------------*/
 135 #define         HERMES_CMD_ALLOC                (0x000A)
 136 #define         HERMES_CMD_TX                   (0x000B)
 137 #define         HERMES_CMD_CLRPRST              (0x0012)
 138
 139 /*--- Regulate Commands --------------------------*/
 140 #define         HERMES_CMD_NOTIFY               (0x0010)
 141 #define         HERMES_CMD_INQUIRE              (0x0011)
 142
 143 /*--- Configure Commands --------------------------*/
 144 #define         HERMES_CMD_ACCESS               (0x0021)
 145 #define         HERMES_CMD_DOWNLD               (0x0022)
 146
 147 /*--- Debugging Commands -----------------------------*/
 148 #define         HERMES_CMD_MONITOR              (0x0038)
 149 #define         HERMES_MONITOR_ENABLE           (0x000b)
 150 #define         HERMES_MONITOR_DISABLE          (0x000f)
 151
 152 /*
 153  * Frame structures and constants
 154  */
 155
 156 #define         HERMES_DESCRIPTOR_OFFSET        (0)
 157 #define         HERMES_802_11_OFFSET            (14)
 158 #define         HERMES_802_3_OFFSET             (14+32)
 159 #define         HERMES_802_2_OFFSET             (14+32+14)
 160
 161 struct hermes_rx_descriptor
 162 {
 163         u16_t status;
 164         u16_t time_lefthalf;
 165         u16_t time_righthalf;
 166         u8_t silence;
 167         u8_t signal;
 168         u8_t rate;
 169         u8_t rxflow;
 170         u16_t reserved1;
 171         u16_t reserved2;
 172 };
 173
 174 #define HERMES_RXSTAT_ERR               (0x0003)
 175 #define HERMES_RXSTAT_BADCRC            (0x0001)
 176 #define HERMES_RXSTAT_UNDECRYPTABLE     (0x0002)
 177 #define HERMES_RXSTAT_MACPORT           (0x0700)
 178 #define HERMES_RXSTAT_PCF               (0x1000)
 179 #define HERMES_RXSTAT_MSGTYPE           (0xE000)
 180 #define HERMES_RXSTAT_1042              (0x2000)        /* RFC-1042 frame */
 181 #define HERMES_RXSTAT_TUNNEL            (0x4000)        /* bridge-tunnel
 182                                                          * encoded frame */
 183 #define HERMES_RXSTAT_WMP               (0x6000)        /* Wavelan-II
 184                                                          * Management
 185                                                          * Protocol frame */
 186
 187 struct hermes_tx_descriptor
 188 {
 189         u16_t status;
 190         u16_t reserved1;
 191         u16_t reserved2;
 192         u16_t sw_support_lefthalf;
 193         u16_t sw_support_righthalf;
 194         u8_t retry_count;
 195         u8_t tx_rate;
 196         u16_t tx_control;
 197 };
 198
 199 #define HERMES_TXSTAT_RETRYERR          (0x0001)
 200 #define HERMES_TXSTAT_AGEDERR           (0x0002)
 201 #define HERMES_TXSTAT_DISCON            (0x0004)
 202 #define HERMES_TXSTAT_FORMERR           (0x0008)
 203
 204 #define HERMES_TXCTRL_TX_OK             (0x0002)
 205 #define HERMES_TXCTRL_TX_EX             (0x0004)
 206 #define HERMES_TXCTRL_802_11            (0x0008)
 207 #define HERMES_TXCTRL_ALT_RTRY          (0x0020)
 208
 209 /* Inquiry constants and data types */
 210
 211 #define HERMES_INQ_TALLIES              (0xF100)
 212 #define HERMES_INQ_SCAN                 (0xF101)
 213 #define HERMES_INQ_LINKSTATUS           (0xF200)
 214
 215
 216 /* The tallies are retrieved, but these fields are not processed until now */
 217 struct hermes_tallies_frame
 218 {
 219         u16_t TxUnicastFrames;
 220         u16_t TxMulticastFrames;
 221         u16_t TxFragments;
 222         u16_t TxUnicastOctets;
 223         u16_t TxMulticastOctets;
 224         u16_t TxDeferredTransmissions;
 225         u16_t TxSingleRetryFrames;
 226         u16_t TxMultipleRetryFrames;
 227         u16_t TxRetryLimitExceeded;
 228         u16_t TxDiscards;
 229         u16_t RxUnicastFrames;
 230         u16_t RxMulticastFrames;
 231         u16_t RxFragments;
 232         u16_t RxUnicastOctets;
 233         u16_t RxMulticastOctets;
 234         u16_t RxFCSErrors;
 235         u16_t RxDiscards_NoBuffer;
 236         u16_t TxDiscardsWrongSA;
 237         u16_t RxWEPUndecryptable;
 238         u16_t RxMsgInMsgFragments;
 239         u16_t RxMsgInBadMsgFragments;
 240         u16_t RxDiscards_WEPICVError;
 241         u16_t RxDiscards_WEPExcluded;
 242 };
 243
 244 #define HERMES_LINKSTATUS_NOT_CONNECTED   (0x0000)
 245 #define HERMES_LINKSTATUS_CONNECTED       (0x0001)
 246 #define HERMES_LINKSTATUS_DISCONNECTED    (0x0002)
 247 #define HERMES_LINKSTATUS_AP_CHANGE       (0x0003)
 248 #define HERMES_LINKSTATUS_AP_OUT_OF_RANGE (0x0004)
 249 #define HERMES_LINKSTATUS_AP_IN_RANGE     (0x0005)
 250 #define HERMES_LINKSTATUS_ASSOC_FAILED    (0x0006)
 251
 252 struct hermes_linkstatus
 253 {
 254         u16_t linkstatus;       /* Link status */
 255 };
 256
 257 /* Timeouts. These are maximum timeouts. Most often, card wil react
 258  * much faster */
 259 #define HERMES_BAP_BUSY_TIMEOUT         (10000) /* In iterations of ~1us */
 260 #define HERMES_CMD_BUSY_TIMEOUT         (100)   /* In iterations of ~1us */
 261 #define HERMES_CMD_INIT_TIMEOUT         (50000) /* in iterations of ~10us */
 262 #define HERMES_CMD_COMPL_TIMEOUT        (20000) /* in iterations of ~10us */
 263 #define HERMES_ALLOC_COMPL_TIMEOUT      (1000)  /* in iterations of ~10us */
 264
 265 /* WEP settings */
 266 #define HERMES_AUTH_OPEN                (1)
 267 #define HERMES_AUTH_SHARED_KEY          (2)
 268 #define HERMES_WEP_PRIVACY_INVOKED      (0x0001)
 269 #define HERMES_WEP_EXCL_UNENCRYPTED     (0x0002)
 270 #define HERMES_WEP_HOST_ENCRYPT         (0x0010)
 271 #define HERMES_WEP_HOST_DECRYPT         (0x0080)
 272
 273
 274 /* Basic control structure */
 275 typedef struct hermes
 276 {
 277         u32_t iobase;
 278         int io_space;           /* 1 if we IO-mapped IO, 0 for memory-mapped
 279                                  * IO */
 280 #define HERMES_IO       1
 281 #define HERMES_MEM      0
 282         int reg_spacing;
 283 #define HERMES_16BIT_REGSPACING 0
 284 #define HERMES_32BIT_REGSPACING 1
 285         u16_t inten;            /* Which interrupts should be enabled? */
 286         char *locmem;
 287 } hermes_t;
 288
 289 typedef struct hermes_response
 290 {
 291         u16_t status, resp0, resp1, resp2;
 292 } hermes_response_t;
 293
 294 struct hermes_idstring
 295 {
 296         u16_t len;
 297         u16_t val[16];
 298 };
 299
 300 #define HERMES_BYTES_TO_RECLEN(n) ( (((n)+1)/2) + 1 )
 301 #define HERMES_RECLEN_TO_BYTES(n) ( ((n)-1) * 2 )
 302
 303 /* Function prototypes */
 304 u16_t hermes_read_reg(const hermes_t * hw, u16_t off);
 305 void hermes_write_reg(const hermes_t * hw, u16_t off, u16_t val);
 306 void hermes_struct_init(hermes_t * hw, u32_t address, int io_space, int
 307         reg_spacing);
 308 int hermes_init(hermes_t * hw);
 309 int hermes_docmd_wait(hermes_t * hw, u16_t cmd, u16_t parm0,
 310         hermes_response_t * resp);
 311 int hermes_allocate(hermes_t * hw, u16_t size, u16_t * fid);
 312 int hermes_bap_pread(hermes_t * hw, int bap, void *buf, unsigned len,
 313         u16_t id, u16_t offset);
 314 int hermes_bap_pwrite(hermes_t * hw, int bap, const void *buf, unsigned
 315         len, u16_t id, u16_t offset);
 316 void hermes_read_words(hermes_t * hw, int off, void *buf, unsigned
 317         count);
 318 int hermes_read_ltv(hermes_t * hw, int bap, u16_t rid, unsigned buflen,
 319         u16_t * length, void *buf);
 320 int hermes_write_ltv(hermes_t * hw, int bap, u16_t rid, u16_t length,
 321         const void *value);
 322 int hermes_set_irqmask(hermes_t * hw, u16_t events);
 323 u16_t hermes_get_irqmask(hermes_t * hw);
 324 int hermes_read_wordrec(hermes_t * hw, int bap, u16_t rid, u16_t *
 325         word);
 326 int hermes_write_wordrec(hermes_t * hw, int bap, u16_t rid, u16_t word);
 327 int hermes_cor_reset(hermes_t *hw);
 328 #endif /* _HERMES_H */