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memory: use sys_safememset() for /dev/zero
[minix.git] / drivers / at_wini / at_wini.c
blob6e1f1fb866f0204c741001976de8aed962f4e8ff
1 /* This file contains the device dependent part of a driver for the IBM-AT
2 * winchester controller. Written by Adri Koppes.
3 *
4 * The file contains one entry point:
5 *
6 * at_winchester_task: main entry when system is brought up
7 *
8 * Changes:
9 * Aug 19, 2005 ATA PCI support, supports SATA (Ben Gras)
10 * Nov 18, 2004 moved AT disk driver to user-space (Jorrit N. Herder)
11 * Aug 20, 2004 watchdogs replaced by sync alarms (Jorrit N. Herder)
12 * Mar 23, 2000 added ATAPI CDROM support (Michael Temari)
13 * May 14, 2000 d-d/i rewrite (Kees J. Bot)
14 * Apr 13, 1992 device dependent/independent split (Kees J. Bot)
15 */
16
17 #include "at_wini.h"
18
19 #include <minix/sysutil.h>
20 #include <minix/type.h>
21 #include <minix/endpoint.h>
22 #include <sys/ioc_disk.h>
23 #include <machine/pci.h>
24 #include <sys/mman.h>
25 #include <sys/svrctl.h>
26
27 /* Variables. */
28
29 /* Common command block */
30 struct command {
31 u8_t precomp; /* REG_PRECOMP, etc. */
32 u8_t count;
33 u8_t sector;
34 u8_t cyl_lo;
35 u8_t cyl_hi;
36 u8_t ldh;
37 u8_t command;
38
39 /* The following at for LBA48 */
40 u8_t count_prev;
41 u8_t sector_prev;
42 u8_t cyl_lo_prev;
43 u8_t cyl_hi_prev;
44 };
45
46 /* Timeouts and max retries. */
47 static int timeout_usecs = DEF_TIMEOUT_USECS;
48 static int max_errors = MAX_ERRORS;
49 static long w_standard_timeouts = 0;
50 static long w_pci_debug = 0;
51 static long w_instance = 0;
52 static long disable_dma = 0;
53 static long atapi_debug = 0;
54 static long w_identify_wakeup_ticks;
55 static long wakeup_ticks;
56 static long w_atapi_dma;
57
58 static int w_testing = 0;
59 static int w_silent = 0;
60
61 static int w_next_drive = 0;
62
63 static u32_t system_hz;
64
65 /* The struct wini is indexed by controller first, then drive (0-3).
66 * Controller 0 is always the 'compatability' ide controller, at
67 * the fixed locations, whether present or not.
68 */
69 static struct wini { /* main drive struct, one entry per drive */
70 unsigned state; /* drive state: deaf, initialized, dead */
71 unsigned short w_status; /* device status register */
72 unsigned base_cmd; /* command base register */
73 unsigned base_ctl; /* control base register */
74 unsigned base_dma; /* dma base register */
75 int dma_intseen;
76 unsigned irq; /* interrupt request line */
77 unsigned irq_need_ack; /* irq needs to be acknowledged */
78 int irq_hook_id; /* id of irq hook at the kernel */
79 int lba48; /* supports lba48 */
80 int dma; /* supports dma */
81 unsigned lcylinders; /* logical number of cylinders (BIOS) */
82 unsigned lheads; /* logical number of heads */
83 unsigned lsectors; /* logical number of sectors per track */
84 unsigned pcylinders; /* physical number of cylinders (translated) */
85 unsigned pheads; /* physical number of heads */
86 unsigned psectors; /* physical number of sectors per track */
87 unsigned ldhpref; /* top four bytes of the LDH (head) register */
88 unsigned precomp; /* write precompensation cylinder / 4 */
89 unsigned max_count; /* max request for this drive */
90 unsigned open_ct; /* in-use count */
91 struct device part[DEV_PER_DRIVE]; /* disks and partitions */
92 struct device subpart[SUB_PER_DRIVE]; /* subpartitions */
93 } wini[MAX_DRIVES], *w_wn;
94
95 static int w_device = -1;
96
97 int w_command; /* current command in execution */
98 static int w_drive; /* selected drive */
99 static struct device *w_dv; /* device's base and size */
100
101 static u8_t *tmp_buf;
102
103 #define ATA_DMA_SECTORS 64
104 #define ATA_DMA_BUF_SIZE (ATA_DMA_SECTORS*SECTOR_SIZE)
105
106 static char *dma_buf;
107 static phys_bytes dma_buf_phys;
108
109 #define N_PRDTE 1024 /* Should be enough for large requests */
110
111 struct prdte
112 {
113 phys_bytes prdte_base;
114 u16_t prdte_count;
115 u8_t prdte_reserved;
116 u8_t prdte_flags;
117 };
118
119 #define PRDT_BYTES (sizeof(struct prdte) * N_PRDTE)
120 static struct prdte *prdt;
121 static phys_bytes prdt_phys;
122
123 #define PRDTE_FL_EOT 0x80 /* End of table */
124
125 /* IDE devices we trust are IDE devices. */
126 static struct quirk
127 {
128 int pci_class, pci_subclass, pci_interface;
129 u16_t vendor;
130 u16_t device;
131 } quirk_table[]=
132 {
133 { 0x01, 0x04, 0x00, 0x1106, 0x3149 }, /* VIA VT6420 */
134 { 0x01, 0x04, 0x00, 0x1095, 0x3512 },
135 { 0x01, 0x80, -1, 0x1095, 0x3114 }, /* Silicon Image SATA */
136 { 0, 0, 0, 0, 0 } /* end of list */
137 };
138
139 static void init_params(void);
140 static void init_drive(struct wini *w, int base_cmd, int base_ctl, int
141 base_dma, int irq, int ack, int hook, int drive);
142 static void init_params_pci(int);
143 static int w_do_open(dev_t minor, int access);
144 static struct device *w_prepare(dev_t dev);
145 static struct device *w_part(dev_t minor);
146 static int w_identify(void);
147 static char *w_name(void);
148 static int w_specify(void);
149 static int w_io_test(void);
150 static ssize_t w_transfer(dev_t minor, int do_write, u64_t position,
151 endpoint_t proc_nr, iovec_t *iov, unsigned int nr_req, int flags);
152 static int com_out(struct command *cmd);
153 static int com_out_ext(struct command *cmd);
154 static int setup_dma(unsigned *sizep, endpoint_t proc_nr, iovec_t *iov,
155 size_t addr_offset, int do_write);
156 static void w_need_reset(void);
157 static void ack_irqs(unsigned int);
158 static int w_do_close(dev_t minor);
159 static int w_ioctl(dev_t minor, unsigned int request, endpoint_t endpt,
160 cp_grant_id_t grant);
161 static void w_hw_int(unsigned int irqs);
162 static int com_simple(struct command *cmd);
163 static void w_timeout(void);
164 static int w_reset(void);
165 static void w_intr_wait(void);
166 static int at_intr_wait(void);
167 static int w_waitfor(int mask, int value);
168 static int w_waitfor_dma(int mask, int value);
169 static void w_geometry(dev_t minor, struct partition *entry);
170 #if ENABLE_ATAPI
171 static int atapi_sendpacket(u8_t *packet, unsigned cnt, int do_dma);
172 static int atapi_intr_wait(int dma, size_t max);
173 static int atapi_open(void);
174 static void atapi_close(void);
175 static int atapi_transfer(int do_write, u64_t position, endpoint_t
176 endpt, iovec_t *iov, unsigned int nr_req);
177 #endif
178
179 #define sys_voutb(out, n) at_voutb((out), (n))
180 static int at_voutb(pvb_pair_t *, int n);
181 #define sys_vinb(in, n) at_vinb((in), (n))
182 static int at_vinb(pvb_pair_t *, int n);
183
184 #undef sys_outb
185 #undef sys_inb
186 #undef sys_outl
187
188 static int at_out(int line, u32_t port, u32_t value, char *typename,
189 int type);
190 static int at_in(int line, u32_t port, u32_t *value, char *typename,
191 int type);
192
193 #define sys_outb(p, v) at_out(__LINE__, (p), (v), "outb", _DIO_BYTE)
194 #define sys_inb(p, v) at_in(__LINE__, (p), (v), "inb", _DIO_BYTE)
195 #define sys_outl(p, v) at_out(__LINE__, (p), (v), "outl", _DIO_LONG)
196
197 /* Entry points to this driver. */
198 static struct blockdriver w_dtab = {
199 BLOCKDRIVER_TYPE_DISK,/* handle partition requests */
200 w_do_open, /* open or mount request, initialize device */
201 w_do_close, /* release device */
202 w_transfer, /* do the I/O */
203 w_ioctl, /* I/O control requests */
204 NULL, /* nothing to clean up */
205 w_part, /* return partition information */
206 w_geometry, /* tell the geometry of the disk */
207 w_hw_int, /* leftover hardware interrupts */
208 NULL, /* ignore leftover alarms */
209 NULL, /* ignore unrecognized messages */
210 NULL /* no multithreading support */
211 };
212
213 /* SEF functions and variables. */
214 static void sef_local_startup(void);
215 static int sef_cb_init_fresh(int type, sef_init_info_t *info);
216 EXTERN int sef_cb_lu_prepare(int state);
217 EXTERN int sef_cb_lu_state_isvalid(int state);
218 EXTERN void sef_cb_lu_state_dump(int state);
219
220 /*===========================================================================*
221 * at_winchester_task *
222 *===========================================================================*/
223 int main(int argc, char *argv[])
224 {
225 /* SEF local startup. */
226 env_setargs(argc, argv);
227 sef_local_startup();
228
229 /* Call the generic receive loop. */
230 blockdriver_task(&w_dtab);
231
232 return(OK);
233 }
234
235 /*===========================================================================*
236 * sef_local_startup *
237 *===========================================================================*/
238 static void sef_local_startup(void)
239 {
240 /* Register init callbacks. */
241 sef_setcb_init_fresh(sef_cb_init_fresh);
242 sef_setcb_init_lu(sef_cb_init_fresh);
243
244 /* Register live update callbacks. */
245 sef_setcb_lu_prepare(sef_cb_lu_prepare);
246 sef_setcb_lu_state_isvalid(sef_cb_lu_state_isvalid);
247 sef_setcb_lu_state_dump(sef_cb_lu_state_dump);
248
249 /* Let SEF perform startup. */
250 sef_startup();
251 }
252
253 /*===========================================================================*
254 * sef_cb_init_fresh *
255 *===========================================================================*/
256 static int sef_cb_init_fresh(int type, sef_init_info_t *UNUSED(info))
257 {
258 /* Initialize the at_wini driver. */
259 system_hz = sys_hz();
260
261 if (!(tmp_buf = alloc_contig(2*DMA_BUF_SIZE, AC_ALIGN4K, NULL)))
262 panic("unable to allocate temporary buffer");
263
264 w_identify_wakeup_ticks = WAKEUP_TICKS;
265 wakeup_ticks = WAKEUP_TICKS;
266
267 /* Set special disk parameters. */
268 init_params();
269
270 /* Announce we are up! */
271 blockdriver_announce(type);
272
273 return(OK);
274 }
275
276 /*===========================================================================*
277 * init_params *
278 *===========================================================================*/
279 static void init_params(void)
280 {
281 /* This routine is called at startup to initialize the drive parameters. */
282
283 u16_t parv[2];
284 unsigned int vector, size;
285 int drive, nr_drives;
286 struct wini *wn;
287 u8_t params[16];
288 int s;
289 long wakeup_secs = WAKEUP_SECS;
290
291 /* Boot variables. */
292 env_parse("instance", "d", 0, &w_instance, 0, 8);
293 env_parse("ata_std_timeout", "d", 0, &w_standard_timeouts, 0, 1);
294 env_parse("ata_pci_debug", "d", 0, &w_pci_debug, 0, 1);
295 env_parse(NO_DMA_VAR, "d", 0, &disable_dma, 0, 1);
296 env_parse("ata_id_timeout", "d", 0, &wakeup_secs, 1, 60);
297 env_parse("atapi_debug", "d", 0, &atapi_debug, 0, 1);
298 env_parse("atapi_dma", "d", 0, &w_atapi_dma, 0, 1);
299
300 w_identify_wakeup_ticks = wakeup_secs * system_hz;
301
302 if(atapi_debug)
303 panic("atapi_debug");
304
305 if(w_identify_wakeup_ticks <= 0) {
306 printf("changing wakeup from %ld to %d ticks.\n",
307 w_identify_wakeup_ticks, WAKEUP_TICKS);
308 w_identify_wakeup_ticks = WAKEUP_TICKS;
309 }
310
311 if (disable_dma) {
312 printf("at_wini%ld: DMA for ATA devices is disabled.\n", w_instance);
313 } else {
314 /* Ask for anonymous memory for DMA, that is physically contiguous. */
315 dma_buf = alloc_contig(ATA_DMA_BUF_SIZE, 0, &dma_buf_phys);
316 prdt = alloc_contig(PRDT_BYTES, 0, &prdt_phys);
317 if(!dma_buf || !prdt) {
318 disable_dma = 1;
319 printf("at_wini%ld: no dma\n", w_instance);
320 }
321 }
322
323 if (w_instance == 0) {
324 /* Get the number of drives from the BIOS data area */
325 s=sys_readbios(NR_HD_DRIVES_ADDR, params, NR_HD_DRIVES_SIZE);
326 if (s != OK)
327 panic("Couldn't read BIOS: %d", s);
328 if ((nr_drives = params[0]) > 2) nr_drives = 2;
329
330 for (drive = 0, wn = wini; drive < COMPAT_DRIVES; drive++, wn++) {
331 if (drive < nr_drives) {
332 /* Copy the BIOS parameter vector */
333 vector = (drive == 0) ? BIOS_HD0_PARAMS_ADDR :
334 BIOS_HD1_PARAMS_ADDR;
335 size = (drive == 0) ? BIOS_HD0_PARAMS_SIZE :
336 BIOS_HD1_PARAMS_SIZE;
337 s=sys_readbios(vector, parv, size);
338 if (s != OK)
339 panic("Couldn't read BIOS: %d", s);
340
341 /* Calculate the address of the parameters and copy them */
342 s=sys_readbios(hclick_to_physb(parv[1]) + parv[0],
343 params, 16L);
344 if (s != OK)
345 panic("Couldn't copy parameters: %d", s);
346
347 /* Copy the parameters to the structures of the drive */
348 wn->lcylinders = bp_cylinders(params);
349 wn->lheads = bp_heads(params);
350 wn->lsectors = bp_sectors(params);
351 wn->precomp = bp_precomp(params) >> 2;
352 }
353
354 /* Fill in non-BIOS parameters. */
355 init_drive(wn,
356 drive < 2 ? REG_CMD_BASE0 : REG_CMD_BASE1,
357 drive < 2 ? REG_CTL_BASE0 : REG_CTL_BASE1,
358 0 /* no DMA */, NO_IRQ, 0, 0, drive);
359 w_next_drive++;
360 }
361 }
362
363 /* Look for controllers on the pci bus. Skip none the first instance,
364 * skip one and then 2 for every instance, for every next instance.
365 */
366 if (w_instance == 0)
367 init_params_pci(0);
368 else
369 init_params_pci(w_instance*2-1);
370
371 }
372
373 #define ATA_IF_NOTCOMPAT1 (1L << 0)
374 #define ATA_IF_NOTCOMPAT2 (1L << 2)
375
376 /*===========================================================================*
377 * init_drive *
378 *===========================================================================*/
379 static void init_drive(struct wini *w, int base_cmd, int base_ctl,
380 int base_dma, int irq, int ack, int hook, int drive)
381 {
382 w->state = 0;
383 w->w_status = 0;
384 w->base_cmd = base_cmd;
385 w->base_ctl = base_ctl;
386 w->base_dma = base_dma;
387 if(w_pci_debug)
388 printf("at_wini%ld: drive %d: base_cmd 0x%x, base_ctl 0x%x, base_dma 0x%x\n",
389 w_instance, w-wini, w->base_cmd, w->base_ctl, w->base_dma);
390 w->irq = irq;
391 w->irq_need_ack = ack;
392 w->irq_hook_id = hook;
393 w->ldhpref = ldh_init(drive);
394 w->max_count = MAX_SECS << SECTOR_SHIFT;
395 w->lba48 = 0;
396 w->dma = 0;
397 }
398
399 static int quirkmatch(struct quirk *table, u8_t bcr, u8_t scr, u8_t interface, u16_t vid, u16_t did) {
400 while(table->vendor) {
401 if(table->vendor == vid && table->device == did &&
402 table->pci_class == bcr &&
403 table->pci_subclass == scr &&
404 (table->pci_interface == -1 ||
405 table->pci_interface == interface)) {
406 return 1;
407 }
408 table++;
409 }
410
411 return 0;
412 }
413
414 /*===========================================================================*
415 * init_params_pci *
416 *===========================================================================*/
417 static void init_params_pci(int skip)
418 {
419 int i, r, devind, drive, pci_compat = 0;
420 int irq, irq_hook;
421 u8_t bcr, scr, interface;
422 u16_t vid, did;
423 u32_t base_dma, t3;
424
425 pci_init();
426 for(drive = w_next_drive; drive < MAX_DRIVES; drive++)
427 wini[drive].state = IGNORING;
428 for(r = pci_first_dev(&devind, &vid, &did); r != 0;
429 r = pci_next_dev(&devind, &vid, &did)) {
430 int quirk = 0;
431
432 /* Except class 01h (mass storage), subclass be 01h (ATA).
433 * Also check listed RAID controllers.
434 */
435 bcr= pci_attr_r8(devind, PCI_BCR);
436 scr= pci_attr_r8(devind, PCI_SCR);
437 interface= pci_attr_r8(devind, PCI_PIFR);
438 t3= ((bcr << 16) | (scr << 8) | interface);
439 if (bcr == PCI_BCR_MASS_STORAGE && scr == PCI_MS_IDE)
440 ; /* Okay */
441 else if(quirkmatch(quirk_table, bcr, scr, interface, vid, did)) {
442 quirk = 1;
443 } else
444 continue; /* Unsupported device class */
445
446 /* Found a controller.
447 * Programming interface register tells us more.
448 */
449 irq = pci_attr_r8(devind, PCI_ILR);
450
451 /* Any non-compat drives? */
452 if (quirk || (interface & (ATA_IF_NOTCOMPAT1 | ATA_IF_NOTCOMPAT2))) {
453 if (w_next_drive >= MAX_DRIVES)
454 {
455 /* We can't accept more drives, but have to search for
456 * controllers operating in compatibility mode.
457 */
458 continue;
459 }
460
461 irq_hook = irq;
462 if (skip > 0) {
463 if (w_pci_debug)
464 {
465 printf(
466 "atapci skipping controller (remain %d)\n",
467 skip);
468 }
469 skip--;
470 continue;
471 }
472 if(pci_reserve_ok(devind) != OK) {
473 printf("at_wini%ld: pci_reserve %d failed - "
474 "ignoring controller!\n",
475 w_instance, devind);
476 continue;
477 }
478 if (sys_irqsetpolicy(irq, 0, &irq_hook) != OK) {
479 printf("atapci: couldn't set IRQ policy %d\n", irq);
480 continue;
481 }
482 if (sys_irqenable(&irq_hook) != OK) {
483 printf("atapci: couldn't enable IRQ line %d\n", irq);
484 continue;
485 }
486 }
487
488 base_dma = pci_attr_r32(devind, PCI_BAR_5) & PCI_BAR_IO_MASK;
489
490 /* Primary channel not in compatability mode? */
491 if (quirk || (interface & ATA_IF_NOTCOMPAT1)) {
492 u32_t base_cmd, base_ctl;
493
494 base_cmd = pci_attr_r32(devind, PCI_BAR) & PCI_BAR_IO_MASK;
495 base_ctl = pci_attr_r32(devind, PCI_BAR_2) & PCI_BAR_IO_MASK;
496 if (base_cmd != REG_CMD_BASE0 && base_cmd != REG_CMD_BASE1) {
497 init_drive(&wini[w_next_drive],
498 base_cmd, base_ctl+PCI_CTL_OFF,
499 base_dma, irq, 1, irq_hook, 0);
500 init_drive(&wini[w_next_drive+1],
501 base_cmd, base_ctl+PCI_CTL_OFF,
502 base_dma, irq, 1, irq_hook, 1);
503 if (w_pci_debug)
504 printf("at_wini%ld: atapci %d: 0x%x 0x%x irq %d\n",
505 w_instance, devind, base_cmd, base_ctl, irq);
506 w_next_drive += 2;
507 } else printf("at_wini%ld: atapci: ignored drives on primary channel, base %x\n", w_instance, base_cmd);
508 }
509 else
510 {
511 /* Update base_dma for compatibility device */
512 for (i= 0; i<MAX_DRIVES; i++)
513 {
514 if (wini[i].base_cmd == REG_CMD_BASE0) {
515 wini[i].base_dma= base_dma;
516 if(w_pci_debug)
517 printf("at_wini%ld: drive %d: base_dma 0x%x\n",
518 w_instance, i, wini[i].base_dma);
519 pci_compat = 1;
520 }
521 }
522 }
523
524 /* Secondary channel not in compatability mode? */
525 if (quirk || (interface & ATA_IF_NOTCOMPAT2)) {
526 u32_t base_cmd, base_ctl;
527
528 base_cmd = pci_attr_r32(devind, PCI_BAR_3) & PCI_BAR_IO_MASK;
529 base_ctl = pci_attr_r32(devind, PCI_BAR_4) & PCI_BAR_IO_MASK;
530 if (base_dma != 0)
531 base_dma += PCI_DMA_2ND_OFF;
532 if (base_cmd != REG_CMD_BASE0 && base_cmd != REG_CMD_BASE1) {
533 init_drive(&wini[w_next_drive],
534 base_cmd, base_ctl+PCI_CTL_OFF, base_dma,
535 irq, 1, irq_hook, 2);
536 init_drive(&wini[w_next_drive+1],
537 base_cmd, base_ctl+PCI_CTL_OFF, base_dma,
538 irq, 1, irq_hook, 3);
539 if (w_pci_debug)
540 printf("at_wini%ld: atapci %d: 0x%x 0x%x irq %d\n",
541 w_instance, devind, base_cmd, base_ctl, irq);
542 w_next_drive += 2;
543 } else printf("at_wini%ld: atapci: ignored drives on "
544 "secondary channel, base %x\n", w_instance, base_cmd);
545 }
546 else
547 {
548 /* Update base_dma for compatibility device */
549 for (i= 0; i<MAX_DRIVES; i++)
550 {
551 if (wini[i].base_cmd == REG_CMD_BASE1 && base_dma != 0) {
552 wini[i].base_dma= base_dma+PCI_DMA_2ND_OFF;
553 if (w_pci_debug)
554 printf("at_wini%ld: drive %d: base_dma 0x%x\n",
555 w_instance, i, wini[i].base_dma);
556 pci_compat = 1;
557 }
558 }
559 }
560
561 if(pci_compat) {
562 if(pci_reserve_ok(devind) != OK) {
563 printf("at_wini%ld (compat): pci_reserve %d failed!\n",
564 w_instance, devind);
565 }
566 }
567 }
568 }
569
570 /*===========================================================================*
571 * w_do_open *
572 *===========================================================================*/
573 static int w_do_open(dev_t minor, int access)
574 {
575 /* Device open: Initialize the controller and read the partition table. */
576
577 struct wini *wn;
578
579 if (w_prepare(minor) == NULL) return(ENXIO);
580
581 wn = w_wn;
582
583 /* If we've probed it before and it failed, don't probe it again. */
584 if (wn->state & IGNORING) return ENXIO;
585
586 /* If we haven't identified it yet, or it's gone deaf,
587 * (re-)identify it.
588 */
589 if (!(wn->state & IDENTIFIED) || (wn->state & DEAF)) {
590 /* Try to identify the device. */
591 if (w_identify() != OK) {
592 #if VERBOSE
593 printf("%s: probe failed\n", w_name());
594 #endif
595 if (wn->state & DEAF){
596 int err = w_reset();
597 if( err != OK ){
598 return err;
599 }
600 }
601 wn->state = IGNORING;
602 return(ENXIO);
603 }
604 /* Do a test transaction unless it's a CD drive (then
605 * we can believe the controller, and a test may fail
606 * due to no CD being in the drive). If it fails, ignore
607 * the device forever.
608 */
609 if (!(wn->state & ATAPI) && w_io_test() != OK) {
610 wn->state |= IGNORING;
611 return(ENXIO);
612 }
613 }
614
615 #if ENABLE_ATAPI
616 if ((wn->state & ATAPI) && (access & W_BIT))
617 return(EACCES);
618 #endif
619
620 /* Partition the drive if it's being opened for the first time,
621 * or being opened after being closed.
622 */
623 if (wn->open_ct == 0) {
624 #if ENABLE_ATAPI
625 if (wn->state & ATAPI) {
626 int r;
627 if ((r = atapi_open()) != OK) return(r);
628 }
629 #endif
630
631 /* Partition the disk. */
632 partition(&w_dtab, w_drive * DEV_PER_DRIVE, P_PRIMARY,
633 wn->state & ATAPI);
634 }
635 wn->open_ct++;
636 return(OK);
637 }
638
639 /*===========================================================================*
640 * w_prepare *
641 *===========================================================================*/
642 static struct device *w_prepare(dev_t device)
643 {
644 /* Prepare for I/O on a device. */
645 w_device = (int) device;
646
647 if (device < NR_MINORS) { /* d0, d0p[0-3], d1, ... */
648 w_drive = device / DEV_PER_DRIVE; /* save drive number */
649 w_wn = &wini[w_drive];
650 w_dv = &w_wn->part[device % DEV_PER_DRIVE];
651 } else
652 if ((unsigned) (device -= MINOR_d0p0s0) < NR_SUBDEVS) {/*d[0-7]p[0-3]s[0-3]*/
653 w_drive = device / SUB_PER_DRIVE;
654 w_wn = &wini[w_drive];
655 w_dv = &w_wn->subpart[device % SUB_PER_DRIVE];
656 } else {
657 w_device = -1;
658 return(NULL);
659 }
660 return(w_dv);
661 }
662
663 /*===========================================================================*
664 * w_part *
665 *===========================================================================*/
666 static struct device *w_part(dev_t device)
667 {
668 /* Return a pointer to the partition information of the given minor device. */
669
670 return w_prepare(device);
671 }
672
673 #define id_byte(n) (&tmp_buf[2 * (n)])
674 #define id_word(n) (((u16_t) id_byte(n)[0] << 0) \
675 |((u16_t) id_byte(n)[1] << 8))
676 #define id_longword(n) (((u32_t) id_byte(n)[0] << 0) \
677 |((u32_t) id_byte(n)[1] << 8) \
678 |((u32_t) id_byte(n)[2] << 16) \
679 |((u32_t) id_byte(n)[3] << 24))
680
681 /*===========================================================================*
682 * check_dma *
683 *===========================================================================*/
684 static void
685 check_dma(struct wini *wn)
686 {
687 u32_t dma_status, dma_base;
688 int id_dma, ultra_dma;
689 u16_t w;
690
691 wn->dma= 0;
692
693 if (disable_dma)
694 return;
695
696 w= id_word(ID_CAPABILITIES);
697 id_dma= !!(w & ID_CAP_DMA);
698 w= id_byte(ID_FIELD_VALIDITY)[0];
699 ultra_dma= !!(w & ID_FV_88);
700 dma_base= wn->base_dma;
701
702 if (dma_base) {
703 if (sys_inb(dma_base + DMA_STATUS, &dma_status) != OK) {
704 panic("unable to read DMA status register");
705 }
706 }
707
708 if (id_dma && dma_base) {
709 w= id_word(ID_MULTIWORD_DMA);
710 if (w_pci_debug &&
711 (w & (ID_MWDMA_2_SUP|ID_MWDMA_1_SUP|ID_MWDMA_0_SUP))) {
712 printf(
713 "%s: multiword DMA modes supported:%s%s%s\n",
714 w_name(),
715 (w & ID_MWDMA_0_SUP) ? " 0" : "",
716 (w & ID_MWDMA_1_SUP) ? " 1" : "",
717 (w & ID_MWDMA_2_SUP) ? " 2" : "");
718 }
719 if (w_pci_debug &&
720 (w & (ID_MWDMA_0_SEL|ID_MWDMA_1_SEL|ID_MWDMA_2_SEL))) {
721 printf(
722 "%s: multiword DMA mode selected:%s%s%s\n",
723 w_name(),
724 (w & ID_MWDMA_0_SEL) ? " 0" : "",
725 (w & ID_MWDMA_1_SEL) ? " 1" : "",
726 (w & ID_MWDMA_2_SEL) ? " 2" : "");
727 }
728 if (w_pci_debug && ultra_dma) {
729 w= id_word(ID_ULTRA_DMA);
730 if (w & (ID_UDMA_0_SUP|ID_UDMA_1_SUP|
731 ID_UDMA_2_SUP|ID_UDMA_3_SUP|
732 ID_UDMA_4_SUP|ID_UDMA_5_SUP)) {
733 printf(
734 "%s: Ultra DMA modes supported:%s%s%s%s%s%s\n",
735 w_name(),
736 (w & ID_UDMA_0_SUP) ? " 0" : "",
737 (w & ID_UDMA_1_SUP) ? " 1" : "",
738 (w & ID_UDMA_2_SUP) ? " 2" : "",
739 (w & ID_UDMA_3_SUP) ? " 3" : "",
740 (w & ID_UDMA_4_SUP) ? " 4" : "",
741 (w & ID_UDMA_5_SUP) ? " 5" : "");
742 }
743 if (w & (ID_UDMA_0_SEL|ID_UDMA_1_SEL|
744 ID_UDMA_2_SEL|ID_UDMA_3_SEL|
745 ID_UDMA_4_SEL|ID_UDMA_5_SEL)) {
746 printf(
747 "%s: Ultra DMA mode selected:%s%s%s%s%s%s\n",
748 w_name(),
749 (w & ID_UDMA_0_SEL) ? " 0" : "",
750 (w & ID_UDMA_1_SEL) ? " 1" : "",
751 (w & ID_UDMA_2_SEL) ? " 2" : "",
752 (w & ID_UDMA_3_SEL) ? " 3" : "",
753 (w & ID_UDMA_4_SEL) ? " 4" : "",
754 (w & ID_UDMA_5_SEL) ? " 5" : "");
755 }
756 }
757 wn->dma= 1;
758 } else if (id_dma || dma_base) {
759 printf("id_dma %d, dma_base 0x%x\n", id_dma, dma_base);
760 } else
761 printf("no DMA support\n");
762 }
763
764 /*===========================================================================*
765 * w_identify *
766 *===========================================================================*/
767 static int w_identify(void)
768 {
769 /* Find out if a device exists, if it is an old AT disk, or a newer ATA
770 * drive, a removable media device, etc.
771 */
772
773 struct wini *wn = w_wn;
774 struct command cmd;
775 int s;
776 u16_t w;
777 unsigned long size;
778 int prev_wakeup;
779 int r;
780
781 /* Try to identify the device. */
782 cmd.ldh = wn->ldhpref;
783 cmd.command = ATA_IDENTIFY;
784
785 /* In testing mode, a drive will get ignored at the first timeout. */
786 w_testing = 1;
787
788 /* Execute *_IDENTIFY with configured *_IDENTIFY timeout. */
789 prev_wakeup = wakeup_ticks;
790 wakeup_ticks = w_identify_wakeup_ticks;
791 r = com_simple(&cmd);
792
793 if (r == OK && w_waitfor(STATUS_DRQ, STATUS_DRQ) &&
794 !(wn->w_status & (STATUS_ERR|STATUS_WF))) {
795
796 /* Device information. */
797 if ((s=sys_insw(wn->base_cmd + REG_DATA, SELF, tmp_buf, SECTOR_SIZE)) != OK)
798 panic("Call to sys_insw() failed: %d", s);
799
800 #if 0
801 if (id_word(0) & ID_GEN_NOT_ATA)
802 {
803 printf("%s: not an ATA device?\n", w_name());
804 wakeup_ticks = prev_wakeup;
805 w_testing = 0;
806 return ERR;
807 }
808 #endif
809
810 /* This is an ATA device. */
811 wn->state |= SMART;
812
813 /* Preferred CHS translation mode. */
814 wn->pcylinders = id_word(1);
815 wn->pheads = id_word(3);
816 wn->psectors = id_word(6);
817 size = (u32_t) wn->pcylinders * wn->pheads * wn->psectors;
818
819 w= id_word(ID_CAPABILITIES);
820 if ((w & ID_CAP_LBA) && size > 512L*1024*2) {
821 /* Drive is LBA capable and is big enough to trust it to
822 * not make a mess of it.
823 */
824 wn->ldhpref |= LDH_LBA;
825 size = id_longword(60);
826
827 w= id_word(ID_CSS);
828 if (size < LBA48_CHECK_SIZE)
829 {
830 /* No need to check for LBA48 */
831 }
832 else if (w & ID_CSS_LBA48) {
833 /* Drive is LBA48 capable (and LBA48 is turned on). */
834 if (id_longword(102)) {
835 /* If no. of sectors doesn't fit in 32 bits,
836 * trunacte to this. So it's LBA32 for now.
837 * This can still address devices up to 2TB
838 * though.
839 */
840 size = ULONG_MAX;
841 } else {
842 /* Actual number of sectors fits in 32 bits. */
843 size = id_longword(100);
844 }
845 wn->lba48 = 1;
846 }
847
848 check_dma(wn);
849 }
850
851 if (wn->lcylinders == 0 || wn->lheads == 0 || wn->lsectors == 0) {
852 /* No BIOS parameters? Then make some up. */
853 wn->lcylinders = wn->pcylinders;
854 wn->lheads = wn->pheads;
855 wn->lsectors = wn->psectors;
856 while (wn->lcylinders > 1024) {
857 wn->lheads *= 2;
858 wn->lcylinders /= 2;
859 }
860 }
861 #if ENABLE_ATAPI
862 } else
863 if (cmd.command = ATAPI_IDENTIFY,
864 com_simple(&cmd) == OK && w_waitfor(STATUS_DRQ, STATUS_DRQ) &&
865 !(wn->w_status & (STATUS_ERR|STATUS_WF))) {
866 /* An ATAPI device. */
867 wn->state |= ATAPI;
868
869 /* Device information. */
870 if ((s=sys_insw(wn->base_cmd + REG_DATA, SELF, tmp_buf, 512)) != OK)
871 panic("Call to sys_insw() failed: %d", s);
872
873 size = 0; /* Size set later. */
874 check_dma(wn);
875 #endif
876 } else {
877 /* Not an ATA device; no translations, no special features. Don't
878 * touch it unless the BIOS knows about it.
879 */
880 if (wn->lcylinders == 0) {
881 wakeup_ticks = prev_wakeup;
882 w_testing = 0;
883 return(ERR);
884 } /* no BIOS parameters */
885 wn->pcylinders = wn->lcylinders;
886 wn->pheads = wn->lheads;
887 wn->psectors = wn->lsectors;
888 size = (u32_t) wn->pcylinders * wn->pheads * wn->psectors;
889 }
890
891 /* Restore wakeup_ticks and unset testing mode. */
892 wakeup_ticks = prev_wakeup;
893 w_testing = 0;
894
895 /* Size of the whole drive */
896 wn->part[0].dv_size = mul64u(size, SECTOR_SIZE);
897
898 /* Reset/calibrate (where necessary) */
899 if (w_specify() != OK && w_specify() != OK) {
900 return(ERR);
901 }
902
903 if (wn->irq == NO_IRQ) {
904 /* Everything looks OK; register IRQ so we can stop polling. */
905 wn->irq = w_drive < 2 ? AT_WINI_0_IRQ : AT_WINI_1_IRQ;
906 wn->irq_hook_id = wn->irq; /* id to be returned if interrupt occurs */
907 if ((s=sys_irqsetpolicy(wn->irq, IRQ_REENABLE, &wn->irq_hook_id)) != OK)
908 panic("couldn't set IRQ policy: %d", s);
909 if ((s=sys_irqenable(&wn->irq_hook_id)) != OK)
910 panic("couldn't enable IRQ line: %d", s);
911 }
912 wn->state |= IDENTIFIED;
913 return(OK);
914 }
915
916 /*===========================================================================*
917 * w_name *
918 *===========================================================================*/
919 static char *w_name(void)
920 {
921 /* Return a name for the current device. */
922 static char name[] = "AT0-D0";
923
924 name[2] = '0' + w_instance;
925 name[5] = '0' + w_drive;
926 return name;
927 }
928
929 /*===========================================================================*
930 * w_io_test *
931 *===========================================================================*/
932 static int w_io_test(void)
933 {
934 int save_dev;
935 int save_timeout, save_errors, save_wakeup;
936 iovec_t iov;
937 static char *buf;
938 ssize_t r;
939
940 #ifdef CD_SECTOR_SIZE
941 #define BUFSIZE CD_SECTOR_SIZE
942 #else
943 #define BUFSIZE SECTOR_SIZE
944 #endif
945 STATICINIT(buf, BUFSIZE);
946
947 iov.iov_addr = (vir_bytes) buf;
948 iov.iov_size = BUFSIZE;
949 save_dev = w_device;
950
951 /* Reduce timeout values for this test transaction. */
952 save_timeout = timeout_usecs;
953 save_errors = max_errors;
954 save_wakeup = wakeup_ticks;
955
956 if (!w_standard_timeouts) {
957 timeout_usecs = 4000000;
958 wakeup_ticks = system_hz * 6;
959 max_errors = 3;
960 }
961
962 w_testing = 1;
963
964 /* Try I/O on the actual drive (not any (sub)partition). */
965 r = w_transfer(w_drive * DEV_PER_DRIVE, FALSE /*do_write*/, cvu64(0),
966 SELF, &iov, 1, BDEV_NOFLAGS);
967
968 /* Switch back. */
969 if (w_prepare(save_dev) == NULL)
970 panic("Couldn't switch back devices");
971
972 /* Restore parameters. */
973 timeout_usecs = save_timeout;
974 max_errors = save_errors;
975 wakeup_ticks = save_wakeup;
976 w_testing = 0;
977
978 /* Test if everything worked. */
979 if (r != BUFSIZE) {
980 return ERR;
981 }
982
983 /* Everything worked. */
984 return OK;
985 }
986
987 /*===========================================================================*
988 * w_specify *
989 *===========================================================================*/
990 static int w_specify(void)
991 {
992 /* Routine to initialize the drive after boot or when a reset is needed. */
993
994 struct wini *wn = w_wn;
995 struct command cmd;
996
997 if ((wn->state & DEAF) && w_reset() != OK) {
998 return(ERR);
999 }
1000
1001 if (!(wn->state & ATAPI)) {
1002 /* Specify parameters: precompensation, number of heads and sectors. */
1003 cmd.precomp = wn->precomp;
1004 cmd.count = wn->psectors;
1005 cmd.ldh = w_wn->ldhpref | (wn->pheads - 1);
1006 cmd.command = CMD_SPECIFY; /* Specify some parameters */
1007
1008 /* Output command block and see if controller accepts the parameters. */
1009 if (com_simple(&cmd) != OK) return(ERR);
1010
1011 if (!(wn->state & SMART)) {
1012 /* Calibrate an old disk. */
1013 cmd.sector = 0;
1014 cmd.cyl_lo = 0;
1015 cmd.cyl_hi = 0;
1016 cmd.ldh = w_wn->ldhpref;
1017 cmd.command = CMD_RECALIBRATE;
1018
1019 if (com_simple(&cmd) != OK) return(ERR);
1020 }
1021 }
1022 wn->state |= INITIALIZED;
1023 return(OK);
1024 }
1025
1026 /*===========================================================================*
1027 * do_transfer *
1028 *===========================================================================*/
1029 static int do_transfer(const struct wini *wn, unsigned int precomp,
1030 unsigned int count, unsigned int sector,
1031 unsigned int do_write, int do_dma)
1032 {
1033 struct command cmd;
1034 unsigned int sector_high;
1035 unsigned secspcyl = wn->pheads * wn->psectors;
1036 int do_lba48;
1037
1038 sector_high= 0; /* For future extensions */
1039
1040 do_lba48= 0;
1041 if (sector >= LBA48_CHECK_SIZE || sector_high != 0)
1042 {
1043 if (wn->lba48)
1044 do_lba48= 1;
1045 else if (sector > LBA_MAX_SIZE || sector_high != 0)
1046 {
1047 /* Strange sector count for LBA device */
1048 return EIO;
1049 }
1050 }
1051
1052 cmd.precomp = precomp;
1053 cmd.count = count;
1054 if (do_dma)
1055 {
1056 cmd.command = do_write ? CMD_WRITE_DMA : CMD_READ_DMA;
1057 }
1058 else
1059 cmd.command = do_write ? CMD_WRITE : CMD_READ;
1060
1061 if (do_lba48) {
1062 if (do_dma)
1063 {
1064 cmd.command = (do_write ?
1065 CMD_WRITE_DMA_EXT : CMD_READ_DMA_EXT);
1066 }
1067 else
1068 {
1069 cmd.command = (do_write ?
1070 CMD_WRITE_EXT : CMD_READ_EXT);
1071 }
1072 cmd.count_prev= (count >> 8);
1073 cmd.sector = (sector >> 0) & 0xFF;
1074 cmd.cyl_lo = (sector >> 8) & 0xFF;
1075 cmd.cyl_hi = (sector >> 16) & 0xFF;
1076 cmd.sector_prev= (sector >> 24) & 0xFF;
1077 cmd.cyl_lo_prev= (sector_high) & 0xFF;
1078 cmd.cyl_hi_prev= (sector_high >> 8) & 0xFF;
1079 cmd.ldh = wn->ldhpref;
1080
1081 return com_out_ext(&cmd);
1082 } else if (wn->ldhpref & LDH_LBA) {
1083 cmd.sector = (sector >> 0) & 0xFF;
1084 cmd.cyl_lo = (sector >> 8) & 0xFF;
1085 cmd.cyl_hi = (sector >> 16) & 0xFF;
1086 cmd.ldh = wn->ldhpref | ((sector >> 24) & 0xF);
1087 } else {
1088 int cylinder, head, sec;
1089 cylinder = sector / secspcyl;
1090 head = (sector % secspcyl) / wn->psectors;
1091 sec = sector % wn->psectors;
1092 cmd.sector = sec + 1;
1093 cmd.cyl_lo = cylinder & BYTE;
1094 cmd.cyl_hi = (cylinder >> 8) & BYTE;
1095 cmd.ldh = wn->ldhpref | head;
1096 }
1097
1098 return com_out(&cmd);
1099 }
1100
1101 static void stop_dma(const struct wini *wn)
1102 {
1103 int r;
1104
1105 /* Stop bus master operation */
1106 r= sys_outb(wn->base_dma + DMA_COMMAND, 0);
1107 if (r != 0) panic("stop_dma: sys_outb failed: %d", r);
1108 }
1109
1110 static void start_dma(const struct wini *wn, int do_write)
1111 {
1112 u32_t v;
1113 int r;
1114
1115 /* Assume disk reads. Start DMA */
1116 v= DMA_CMD_START;
1117 if (!do_write)
1118 {
1119 /* Disk reads generate PCI write cycles. */
1120 v |= DMA_CMD_WRITE;
1121 }
1122 r= sys_outb(wn->base_dma + DMA_COMMAND, v);
1123 if (r != 0) panic("start_dma: sys_outb failed: %d", r);
1124 }
1125
1126 static int error_dma(const struct wini *wn)
1127 {
1128 int r;
1129 u32_t v;
1130
1131 #define DMAERR(msg) \
1132 printf("at_wini%ld: bad DMA: %s. Disabling DMA for drive %d.\n", \
1133 w_instance, msg, wn - wini); \
1134 printf("at_wini%ld: workaround: set %s=1 in boot monitor.\n", \
1135 w_instance, NO_DMA_VAR); \
1136 return 1; \
1137
1138 r= sys_inb(wn->base_dma + DMA_STATUS, &v);
1139 if (r != 0) panic("w_transfer: sys_inb failed: %d", r);
1140
1141 if (!wn->dma_intseen) {
1142 /* DMA did not complete successfully */
1143 if (v & DMA_ST_BM_ACTIVE) {
1144 DMAERR("DMA did not complete");
1145 } else if (v & DMA_ST_ERROR) {
1146 DMAERR("DMA error");
1147 } else {
1148 DMAERR("DMA buffer too small");
1149 }
1150 } else if ((v & DMA_ST_BM_ACTIVE)) {
1151 DMAERR("DMA buffer too large");
1152 }
1153
1154 return 0;
1155 }
1156
1157
1158 /*===========================================================================*
1159 * w_transfer *
1160 *===========================================================================*/
1161 static ssize_t w_transfer(
1162 dev_t minor, /* minor device to perform the transfer on */
1163 int do_write, /* read or write? */
1164 u64_t position, /* offset on device to read or write */
1165 endpoint_t proc_nr, /* process doing the request */
1166 iovec_t *iov, /* pointer to read or write request vector */
1167 unsigned int nr_req, /* length of request vector */
1168 int UNUSED(flags) /* transfer flags */
1169 )
1170 {
1171 struct wini *wn;
1172 iovec_t *iop, *iov_end = iov + nr_req;
1173 int n, r, s, errors, do_dma;
1174 unsigned long block;
1175 u32_t w_status;
1176 u64_t dv_size;
1177 unsigned nbytes;
1178 unsigned dma_buf_offset;
1179 ssize_t total = 0;
1180 size_t addr_offset = 0;
1181
1182 if (w_prepare(minor) == NULL) return(ENXIO);
1183
1184 wn = w_wn;
1185 dv_size = w_dv->dv_size;
1186
1187 #if ENABLE_ATAPI
1188 if (w_wn->state & ATAPI) {
1189 return atapi_transfer(do_write, position, proc_nr, iov, nr_req);
1190 }
1191 #endif
1192
1193 /* Check disk address. */
1194 if (rem64u(position, SECTOR_SIZE) != 0) return(EINVAL);
1195
1196 errors = 0;
1197
1198 while (nr_req > 0) {
1199 /* How many bytes to transfer? */
1200 nbytes = 0;
1201 for (iop = iov; iop < iov_end; iop++) nbytes += iop->iov_size;
1202 if ((nbytes & SECTOR_MASK) != 0) return(EINVAL);
1203
1204 /* Which block on disk and how close to EOF? */
1205 if (cmp64(position, dv_size) >= 0) return(total); /* At EOF */
1206 if (cmp64(add64ul(position, nbytes), dv_size) > 0)
1207 nbytes = diff64(dv_size, position);
1208 block = div64u(add64(w_dv->dv_base, position), SECTOR_SIZE);
1209
1210 do_dma= wn->dma;
1211
1212 if (nbytes >= wn->max_count) {
1213 /* The drive can't do more then max_count at once. */
1214 nbytes = wn->max_count;
1215 }
1216
1217 /* First check to see if a reinitialization is needed. */
1218 if (!(wn->state & INITIALIZED) && w_specify() != OK) return(EIO);
1219
1220 if (do_dma) {
1221 stop_dma(wn);
1222 if (!setup_dma(&nbytes, proc_nr, iov, addr_offset, do_write)) {
1223 do_dma = 0;
1224 }
1225 #if 0
1226 printf("nbytes = %d\n", nbytes);
1227 #endif
1228 }
1229
1230 /* Tell the controller to transfer nbytes bytes. */
1231 r = do_transfer(wn, wn->precomp, (nbytes >> SECTOR_SHIFT),
1232 block, do_write, do_dma);
1233
1234 if (do_dma)
1235 start_dma(wn, do_write);
1236
1237 if (do_write) {
1238 /* The specs call for a 400 ns wait after issuing the command.
1239 * Reading the alternate status register is the suggested
1240 * way to implement this wait.
1241 */
1242 if (sys_inb((wn->base_ctl+REG_CTL_ALTSTAT), &w_status) != OK)
1243 panic("couldn't get status");
1244 }
1245
1246 if (do_dma) {
1247 /* Wait for the interrupt, check DMA status and optionally
1248 * copy out.
1249 */
1250
1251 wn->dma_intseen = 0;
1252 if ((r = at_intr_wait()) != OK)
1253 {
1254 /* Don't retry if sector marked bad or too many
1255 * errors.
1256 */
1257 if (r == ERR_BAD_SECTOR || ++errors == max_errors) {
1258 w_command = CMD_IDLE;
1259 return(EIO);
1260 }
1261 continue;
1262 }
1263
1264 /* Wait for DMA_ST_INT to get set */
1265 if(!wn->dma_intseen) {
1266 if(w_waitfor_dma(DMA_ST_INT, DMA_ST_INT))
1267 wn->dma_intseen = 1;
1268 }
1269
1270 if(error_dma(wn)) {
1271 wn->dma = 0;
1272 continue;
1273 }
1274
1275 stop_dma(wn);
1276
1277 dma_buf_offset= 0;
1278 while (r == OK && nbytes > 0)
1279 {
1280 n= iov->iov_size;
1281 if (n > nbytes)
1282 n= nbytes;
1283
1284 /* Book the bytes successfully transferred. */
1285 nbytes -= n;
1286 position= add64ul(position, n);
1287 total += n;
1288 addr_offset += n;
1289 if ((iov->iov_size -= n) == 0) {
1290 iov++; nr_req--; addr_offset = 0;
1291 }
1292 dma_buf_offset += n;
1293 }
1294 }
1295
1296 while (r == OK && nbytes > 0) {
1297 /* For each sector, wait for an interrupt and fetch the data
1298 * (read), or supply data to the controller and wait for an
1299 * interrupt (write).
1300 */
1301
1302 if (!do_write) {
1303 /* First an interrupt, then data. */
1304 if ((r = at_intr_wait()) != OK) {
1305 /* An error, send data to the bit bucket. */
1306 if (w_wn->w_status & STATUS_DRQ) {
1307 if ((s=sys_insw(wn->base_cmd+REG_DATA,
1308 SELF, tmp_buf,
1309 SECTOR_SIZE)) != OK) {
1310 panic("Call to sys_insw() failed: %d", s);
1311 }
1312 }
1313 break;
1314 }
1315 }
1316
1317 /* Wait for busy to clear. */
1318 if (!w_waitfor(STATUS_BSY, 0)) { r = ERR; break; }
1319
1320 /* Wait for data transfer requested. */
1321 if (!w_waitfor(STATUS_DRQ, STATUS_DRQ)) { r = ERR; break; }
1322
1323 /* Copy bytes to or from the device's buffer. */
1324 if (!do_write) {
1325 if(proc_nr != SELF) {
1326 s=sys_safe_insw(wn->base_cmd + REG_DATA, proc_nr,
1327 (void *) (iov->iov_addr), addr_offset,
1328 SECTOR_SIZE);
1329 } else {
1330 s=sys_insw(wn->base_cmd + REG_DATA, proc_nr,
1331 (void *) (iov->iov_addr + addr_offset),
1332 SECTOR_SIZE);
1333 }
1334 if(s != OK) {
1335 panic("Call to sys_insw() failed: %d", s);
1336 }
1337 } else {
1338 if(proc_nr != SELF) {
1339 s=sys_safe_outsw(wn->base_cmd + REG_DATA, proc_nr,
1340 (void *) (iov->iov_addr), addr_offset,
1341 SECTOR_SIZE);
1342 } else {
1343 s=sys_outsw(wn->base_cmd + REG_DATA, proc_nr,
1344 (void *) (iov->iov_addr + addr_offset),
1345 SECTOR_SIZE);
1346 }
1347
1348 if(s != OK) {
1349 panic("Call to sys_outsw() failed: %d", s);
1350 }
1351
1352 /* Data sent, wait for an interrupt. */
1353 if ((r = at_intr_wait()) != OK) break;
1354 }
1355
1356 /* Book the bytes successfully transferred. */
1357 nbytes -= SECTOR_SIZE;
1358 position= add64u(position, SECTOR_SIZE);
1359 addr_offset += SECTOR_SIZE;
1360 total += SECTOR_SIZE;
1361 if ((iov->iov_size -= SECTOR_SIZE) == 0) {
1362 iov++;
1363 nr_req--;
1364 addr_offset = 0;
1365 }
1366 }
1367
1368 /* Any errors? */
1369 if (r != OK) {
1370 /* Don't retry if sector marked bad or too many errors. */
1371 if (r == ERR_BAD_SECTOR || ++errors == max_errors) {
1372 w_command = CMD_IDLE;
1373 return(EIO);
1374 }
1375 }
1376 }
1377
1378 w_command = CMD_IDLE;
1379 return(total);
1380 }
1381
1382 /*===========================================================================*
1383 * com_out *
1384 *===========================================================================*/
1385 static int com_out(cmd)
1386 struct command *cmd; /* Command block */
1387 {
1388 /* Output the command block to the winchester controller and return status */
1389
1390 struct wini *wn = w_wn;
1391 unsigned base_cmd = wn->base_cmd;
1392 unsigned base_ctl = wn->base_ctl;
1393 pvb_pair_t outbyte[7]; /* vector for sys_voutb() */
1394 int s; /* status for sys_(v)outb() */
1395
1396 if (w_wn->state & IGNORING) return ERR;
1397
1398 if (!w_waitfor(STATUS_BSY, 0)) {
1399 printf("%s: controller not ready\n", w_name());
1400 return(ERR);
1401 }
1402
1403 /* Select drive. */
1404 if ((s=sys_outb(base_cmd + REG_LDH, cmd->ldh)) != OK)
1405 panic("Couldn't write register to select drive: %d", s);
1406
1407 if (!w_waitfor(STATUS_BSY, 0)) {
1408 printf("%s: com_out: drive not ready\n", w_name());
1409 return(ERR);
1410 }
1411
1412 /* Schedule a wakeup call, some controllers are flaky. This is done with a
1413 * synchronous alarm. If a timeout occurs a notify from CLOCK is sent, so that
1414 * w_intr_wait() can call w_timeout() in case the controller was not able to
1415 * execute the command. Leftover timeouts are simply ignored by the main loop.
1416 */
1417 sys_setalarm(wakeup_ticks, 0);
1418
1419 wn->w_status = STATUS_ADMBSY;
1420 w_command = cmd->command;
1421 pv_set(outbyte[0], base_ctl + REG_CTL, wn->pheads >= 8 ? CTL_EIGHTHEADS : 0);
1422 pv_set(outbyte[1], base_cmd + REG_PRECOMP, cmd->precomp);
1423 pv_set(outbyte[2], base_cmd + REG_COUNT, cmd->count);
1424 pv_set(outbyte[3], base_cmd + REG_SECTOR, cmd->sector);
1425 pv_set(outbyte[4], base_cmd + REG_CYL_LO, cmd->cyl_lo);
1426 pv_set(outbyte[5], base_cmd + REG_CYL_HI, cmd->cyl_hi);
1427 pv_set(outbyte[6], base_cmd + REG_COMMAND, cmd->command);
1428 if ((s=sys_voutb(outbyte,7)) != OK)
1429 panic("Couldn't write registers with sys_voutb(): %d", s);
1430 return(OK);
1431 }
1432
1433 /*===========================================================================*
1434 * com_out_ext *
1435 *===========================================================================*/
1436 static int com_out_ext(cmd)
1437 struct command *cmd; /* Command block */
1438 {
1439 /* Output the command block to the winchester controller and return status */
1440
1441 struct wini *wn = w_wn;
1442 unsigned base_cmd = wn->base_cmd;
1443 unsigned base_ctl = wn->base_ctl;
1444 pvb_pair_t outbyte[11]; /* vector for sys_voutb() */
1445 int s; /* status for sys_(v)outb() */
1446
1447 if (w_wn->state & IGNORING) return ERR;
1448
1449 if (!w_waitfor(STATUS_BSY, 0)) {
1450 printf("%s: controller not ready\n", w_name());
1451 return(ERR);
1452 }
1453
1454 /* Select drive. */
1455 if ((s=sys_outb(base_cmd + REG_LDH, cmd->ldh)) != OK)
1456 panic("Couldn't write register to select drive: %d", s);
1457
1458 if (!w_waitfor(STATUS_BSY, 0)) {
1459 printf("%s: com_out: drive not ready\n", w_name());
1460 return(ERR);
1461 }
1462
1463 /* Schedule a wakeup call, some controllers are flaky. This is done with a
1464 * synchronous alarm. If a timeout occurs a notify from CLOCK is sent, so that
1465 * w_intr_wait() can call w_timeout() in case the controller was not able to
1466 * execute the command. Leftover timeouts are simply ignored by the main loop.
1467 */
1468 sys_setalarm(wakeup_ticks, 0);
1469
1470 wn->w_status = STATUS_ADMBSY;
1471 w_command = cmd->command;
1472 pv_set(outbyte[0], base_ctl + REG_CTL, 0);
1473 pv_set(outbyte[1], base_cmd + REG_COUNT, cmd->count_prev);
1474 pv_set(outbyte[2], base_cmd + REG_SECTOR, cmd->sector_prev);
1475 pv_set(outbyte[3], base_cmd + REG_CYL_LO, cmd->cyl_lo_prev);
1476 pv_set(outbyte[4], base_cmd + REG_CYL_HI, cmd->cyl_hi_prev);
1477 pv_set(outbyte[5], base_cmd + REG_COUNT, cmd->count);
1478 pv_set(outbyte[6], base_cmd + REG_SECTOR, cmd->sector);
1479 pv_set(outbyte[7], base_cmd + REG_CYL_LO, cmd->cyl_lo);
1480 pv_set(outbyte[8], base_cmd + REG_CYL_HI, cmd->cyl_hi);
1481 pv_set(outbyte[9], base_cmd + REG_COMMAND, cmd->command);
1482 if ((s=sys_voutb(outbyte, 10)) != OK)
1483 panic("Couldn't write registers with sys_voutb(): %d", s);
1484
1485 return(OK);
1486 }
1487 /*===========================================================================*
1488 * setup_dma *
1489 *===========================================================================*/
1490 static int setup_dma(
1491 unsigned *sizep,
1492 endpoint_t proc_nr,
1493 iovec_t *iov,
1494 size_t addr_offset,
1495 int UNUSED(do_write)
1496 )
1497 {
1498 phys_bytes user_phys;
1499 unsigned n, offset, size;
1500 int i, j, r;
1501 u32_t v;
1502 struct wini *wn = w_wn;
1503
1504 /* First try direct scatter/gather to the supplied buffers */
1505 size= *sizep;
1506 i= 0; /* iov index */
1507 j= 0; /* prdt index */
1508 offset= 0; /* Offset in current iov */
1509
1510 #if VERBOSE_DMA
1511 printf("at_wini: setup_dma: proc_nr %d\n", proc_nr);
1512 #endif
1513
1514 while (size > 0)
1515 {
1516 #if VERBOSE_DMA
1517 printf(
1518 "at_wini: setup_dma: iov[%d]: addr 0x%lx, size %ld offset %d, size %d\n",
1519 i, iov[i].iov_addr, iov[i].iov_size, offset, size);
1520 #endif
1521
1522 n= iov[i].iov_size-offset;
1523 if (n > size)
1524 n= size;
1525 if (n == 0 || (n & 1))
1526 panic("bad size in iov: %d", iov[i].iov_size);
1527 if(proc_nr != SELF) {
1528 r= sys_umap(proc_nr, VM_GRANT, iov[i].iov_addr, n,
1529 &user_phys);
1530 if (r != 0)
1531 panic("can't map user buffer (VM_GRANT): %d", r);
1532 user_phys += offset + addr_offset;
1533 } else {
1534 r= sys_umap(proc_nr, VM_D,
1535 iov[i].iov_addr+offset+addr_offset, n,
1536 &user_phys);
1537 if (r != 0)
1538 panic("can't map user buffer (VM_D): %d", r);
1539 }
1540 if (user_phys & 1)
1541 {
1542 /* Buffer is not aligned */
1543 printf("setup_dma: user buffer is not aligned\n");
1544 return 0;
1545 }
1546
1547 /* vector is not allowed to cross a 64K boundary */
1548 if (user_phys/0x10000 != (user_phys+n-1)/0x10000)
1549 n= ((user_phys/0x10000)+1)*0x10000 - user_phys;
1550
1551 /* vector is not allowed to be bigger than 64K, but we get that
1552 * for free.
1553 */
1554
1555 if (j >= N_PRDTE)
1556 {
1557 /* Too many entries */
1558 printf("setup_dma: user buffer has too many entries\n");
1559 return 0;
1560 }
1561
1562 prdt[j].prdte_base= user_phys;
1563 prdt[j].prdte_count= n;
1564 prdt[j].prdte_reserved= 0;
1565 prdt[j].prdte_flags= 0;
1566 j++;
1567
1568 offset += n;
1569 if (offset >= iov[i].iov_size)
1570 {
1571 i++;
1572 offset= 0;
1573 addr_offset= 0;
1574 }
1575
1576 size -= n;
1577 }
1578
1579 if (j <= 0 || j > N_PRDTE)
1580 panic("bad prdt index: %d", j);
1581 prdt[j-1].prdte_flags |= PRDTE_FL_EOT;
1582
1583 #if VERBOSE_DMA
1584 printf("dma not bad\n");
1585 for (i= 0; i<j; i++) {
1586 printf("prdt[%d]: base 0x%lx, size %d, flags 0x%x\n",
1587 i, prdt[i].prdte_base, prdt[i].prdte_count,
1588 prdt[i].prdte_flags);
1589 }
1590 #endif
1591
1592 /* Verify that the bus master is not active */
1593 r= sys_inb(wn->base_dma + DMA_STATUS, &v);
1594 if (r != 0) panic("setup_dma: sys_inb failed: %d", r);
1595 if (v & DMA_ST_BM_ACTIVE)
1596 panic("Bus master IDE active");
1597
1598 if (prdt_phys & 3)
1599 panic("prdt not aligned: %d", prdt_phys);
1600 r= sys_outl(wn->base_dma + DMA_PRDTP, prdt_phys);
1601 if (r != 0) panic("setup_dma: sys_outl failed: %d", r);
1602
1603 /* Clear interrupt and error flags */
1604 r= sys_outb(wn->base_dma + DMA_STATUS, DMA_ST_INT | DMA_ST_ERROR);
1605 if (r != 0) panic("setup_dma: sys_outb failed: %d", r);
1606
1607 return 1;
1608 }
1609
1610
1611 /*===========================================================================*
1612 * w_need_reset *
1613 *===========================================================================*/
1614 static void w_need_reset(void)
1615 {
1616 /* The controller needs to be reset. */
1617 struct wini *wn;
1618
1619 for (wn = wini; wn < &wini[MAX_DRIVES]; wn++) {
1620 if (wn->base_cmd == w_wn->base_cmd) {
1621 wn->state |= DEAF;
1622 wn->state &= ~INITIALIZED;
1623 }
1624 }
1625 }
1626
1627 /*===========================================================================*
1628 * w_do_close *
1629 *===========================================================================*/
1630 static int w_do_close(dev_t minor)
1631 {
1632 /* Device close: Release a device. */
1633 if (w_prepare(minor) == NULL)
1634 return(ENXIO);
1635 w_wn->open_ct--;
1636 #if ENABLE_ATAPI
1637 if (w_wn->open_ct == 0 && (w_wn->state & ATAPI)) atapi_close();
1638 #endif
1639 return(OK);
1640 }
1641
1642 /*===========================================================================*
1643 * com_simple *
1644 *===========================================================================*/
1645 static int com_simple(cmd)
1646 struct command *cmd; /* Command block */
1647 {
1648 /* A simple controller command, only one interrupt and no data-out phase. */
1649 int r;
1650
1651 if (w_wn->state & IGNORING) return ERR;
1652
1653 if ((r = com_out(cmd)) == OK) r = at_intr_wait();
1654 w_command = CMD_IDLE;
1655 return(r);
1656 }
1657
1658 /*===========================================================================*
1659 * w_timeout *
1660 *===========================================================================*/
1661 static void w_timeout(void)
1662 {
1663 struct wini *wn = w_wn;
1664
1665 switch (w_command) {
1666 case CMD_IDLE:
1667 break; /* fine */
1668 case CMD_READ:
1669 case CMD_READ_EXT:
1670 case CMD_WRITE:
1671 case CMD_WRITE_EXT:
1672 /* Impossible, but not on PC's: The controller does not respond. */
1673
1674 /* Limiting multisector I/O seems to help. */
1675 if (wn->max_count > 8 * SECTOR_SIZE) {
1676 wn->max_count = 8 * SECTOR_SIZE;
1677 } else {
1678 wn->max_count = SECTOR_SIZE;
1679 }
1680 /*FALL THROUGH*/
1681 default:
1682 /* Some other command. */
1683 if (w_testing) wn->state |= IGNORING; /* Kick out this drive. */
1684 else if (!w_silent) printf("%s: timeout on command 0x%02x\n",
1685 w_name(), w_command);
1686 w_need_reset();
1687 wn->w_status = 0;
1688 }
1689 }
1690
1691 /*===========================================================================*
1692 * w_reset *
1693 *===========================================================================*/
1694 static int w_reset(void)
1695 {
1696 /* Issue a reset to the controller. This is done after any catastrophe,
1697 * like the controller refusing to respond.
1698 */
1699 int s;
1700 struct wini *wn = w_wn;
1701
1702 /* Don't bother if this drive is forgotten. */
1703 if (w_wn->state & IGNORING) return ERR;
1704
1705 /* Wait for any internal drive recovery. */
1706 tickdelay(RECOVERY_TICKS);
1707
1708 /* Strobe reset bit */
1709 if ((s=sys_outb(wn->base_ctl + REG_CTL, CTL_RESET)) != OK)
1710 panic("Couldn't strobe reset bit: %d", s);
1711 tickdelay(DELAY_TICKS);
1712 if ((s=sys_outb(wn->base_ctl + REG_CTL, 0)) != OK)
1713 panic("Couldn't strobe reset bit: %d", s);
1714 tickdelay(DELAY_TICKS);
1715
1716 /* Wait for controller ready */
1717 if (!w_waitfor(STATUS_BSY, 0)) {
1718 printf("%s: reset failed, drive busy\n", w_name());
1719 return(ERR);
1720 }
1721
1722 /* The error register should be checked now, but some drives mess it up. */
1723
1724 for (wn = wini; wn < &wini[MAX_DRIVES]; wn++) {
1725 if (wn->base_cmd == w_wn->base_cmd) {
1726 wn->state &= ~DEAF;
1727 if (w_wn->irq_need_ack) {
1728 /* Make sure irq is actually enabled.. */
1729 sys_irqenable(&w_wn->irq_hook_id);
1730 }
1731 }
1732 }
1733
1734 return(OK);
1735 }
1736
1737 /*===========================================================================*
1738 * w_intr_wait *
1739 *===========================================================================*/
1740 static void w_intr_wait(void)
1741 {
1742 /* Wait for a task completion interrupt. */
1743
1744 int r;
1745 u32_t w_status;
1746 message m;
1747 int ipc_status;
1748
1749 if (w_wn->irq != NO_IRQ) {
1750 /* Wait for an interrupt that sets w_status to "not busy".
1751 * (w_timeout() also clears w_status.)
1752 */
1753 while (w_wn->w_status & (STATUS_ADMBSY|STATUS_BSY)) {
1754 int rr;
1755 if((rr=driver_receive(ANY, &m, &ipc_status)) != OK)
1756 panic("driver_receive failed: %d", rr);
1757 if (is_ipc_notify(ipc_status)) {
1758 switch (_ENDPOINT_P(m.m_source)) {
1759 case CLOCK:
1760 /* Timeout. */
1761 w_timeout(); /* a.o. set w_status */
1762 break;
1763 case HARDWARE:
1764 /* Interrupt. */
1765 r= sys_inb(w_wn->base_cmd +
1766 REG_STATUS, &w_status);
1767 if (r != 0)
1768 panic("sys_inb failed: %d", r);
1769 w_wn->w_status= w_status;
1770 ack_irqs(m.NOTIFY_ARG);
1771 break;
1772 default:
1773 /*
1774 * unhandled message. queue it and
1775 * handle it in the blockdriver loop.
1776 */
1777 blockdriver_mq_queue(&m, ipc_status);
1778 }
1779 }
1780 else {
1781 /*
1782 * unhandled message. queue it and handle it in the
1783 * blockdriver loop.
1784 */
1785 blockdriver_mq_queue(&m, ipc_status);
1786 }
1787 }
1788 } else {
1789 /* Interrupt not yet allocated; use polling. */
1790 (void) w_waitfor(STATUS_BSY, 0);
1791 }
1792 }
1793
1794 /*===========================================================================*
1795 * at_intr_wait *
1796 *===========================================================================*/
1797 static int at_intr_wait(void)
1798 {
1799 /* Wait for an interrupt, study the status bits and return error/success. */
1800 int r, s;
1801 u32_t inbval;
1802
1803 w_intr_wait();
1804 if ((w_wn->w_status & (STATUS_BSY | STATUS_WF | STATUS_ERR)) == 0) {
1805 r = OK;
1806 } else {
1807 if ((s=sys_inb(w_wn->base_cmd + REG_ERROR, &inbval)) != OK)
1808 panic("Couldn't read register: %d", s);
1809 if ((w_wn->w_status & STATUS_ERR) && (inbval & ERROR_BB)) {
1810 r = ERR_BAD_SECTOR; /* sector marked bad, retries won't help */
1811 } else {
1812 r = ERR; /* any other error */
1813 }
1814 }
1815 w_wn->w_status |= STATUS_ADMBSY; /* assume still busy with I/O */
1816 return(r);
1817 }
1818
1819 /*===========================================================================*
1820 * w_waitfor *
1821 *===========================================================================*/
1822 static int w_waitfor(mask, value)
1823 int mask; /* status mask */
1824 int value; /* required status */
1825 {
1826 /* Wait until controller is in the required state. Return zero on timeout.
1827 */
1828 u32_t w_status;
1829 spin_t spin;
1830 int s;
1831
1832 SPIN_FOR(&spin, timeout_usecs) {
1833 if ((s=sys_inb(w_wn->base_cmd + REG_STATUS, &w_status)) != OK)
1834 panic("Couldn't read register: %d", s);
1835 w_wn->w_status= w_status;
1836 if ((w_wn->w_status & mask) == value) {
1837 return 1;
1838 }
1839 }
1840
1841 w_need_reset(); /* controller gone deaf */
1842 return(0);
1843 }
1844
1845 /*===========================================================================*
1846 * w_waitfor_dma *
1847 *===========================================================================*/
1848 static int w_waitfor_dma(mask, value)
1849 int mask; /* status mask */
1850 int value; /* required status */
1851 {
1852 /* Wait until controller is in the required state. Return zero on timeout.
1853 */
1854 u32_t w_status;
1855 spin_t spin;
1856 int s;
1857
1858 SPIN_FOR(&spin, timeout_usecs) {
1859 if ((s=sys_inb(w_wn->base_dma + DMA_STATUS, &w_status)) != OK)
1860 panic("Couldn't read register: %d", s);
1861 if ((w_status & mask) == value) {
1862 return 1;
1863 }
1864 }
1865
1866 return(0);
1867 }
1868
1869 /*===========================================================================*
1870 * w_geometry *
1871 *===========================================================================*/
1872 static void w_geometry(dev_t minor, struct partition *entry)
1873 {
1874 struct wini *wn;
1875
1876 if (w_prepare(minor) == NULL) return;
1877
1878 wn = w_wn;
1879
1880 if (wn->state & ATAPI) { /* Make up some numbers. */
1881 entry->cylinders = div64u(wn->part[0].dv_size, SECTOR_SIZE) / (64*32);
1882 entry->heads = 64;
1883 entry->sectors = 32;
1884 } else { /* Return logical geometry. */
1885 entry->cylinders = wn->lcylinders;
1886 entry->heads = wn->lheads;
1887 entry->sectors = wn->lsectors;
1888 }
1889 }
1890
1891 #if ENABLE_ATAPI
1892 /*===========================================================================*
1893 * atapi_open *
1894 *===========================================================================*/
1895 static int atapi_open(void)
1896 {
1897 /* Should load and lock the device and obtain its size. For now just set the
1898 * size of the device to something big. What is really needed is a generic
1899 * SCSI layer that does all this stuff for ATAPI and SCSI devices (kjb). (XXX)
1900 */
1901 w_wn->part[0].dv_size = mul64u(800L*1024, 1024);
1902 return(OK);
1903 }
1904
1905 /*===========================================================================*
1906 * atapi_close *
1907 *===========================================================================*/
1908 static void atapi_close(void)
1909 {
1910 /* Should unlock the device. For now do nothing. (XXX) */
1911 }
1912
1913 static void sense_request(void)
1914 {
1915 int r, i;
1916 static u8_t sense[100], packet[ATAPI_PACKETSIZE];
1917
1918 packet[0] = SCSI_SENSE;
1919 packet[1] = 0;
1920 packet[2] = 0;
1921 packet[3] = 0;
1922 packet[4] = SENSE_PACKETSIZE;
1923 packet[5] = 0;
1924 packet[7] = 0;
1925 packet[8] = 0;
1926 packet[9] = 0;
1927 packet[10] = 0;
1928 packet[11] = 0;
1929
1930 for(i = 0; i < SENSE_PACKETSIZE; i++) sense[i] = 0xff;
1931 r = atapi_sendpacket(packet, SENSE_PACKETSIZE, 0);
1932 if (r != OK) { printf("request sense command failed\n"); return; }
1933 if (atapi_intr_wait(0, 0) <= 0) { printf("WARNING: request response failed\n"); }
1934
1935 if (sys_insw(w_wn->base_cmd + REG_DATA, SELF, (void *) sense, SENSE_PACKETSIZE) != OK)
1936 printf("WARNING: sense reading failed\n");
1937
1938 printf("sense data:");
1939 for(i = 0; i < SENSE_PACKETSIZE; i++) printf(" %02x", sense[i]);
1940 printf("\n");
1941 }
1942
1943 /*===========================================================================*
1944 * atapi_transfer *
1945 *===========================================================================*/
1946 static int atapi_transfer(
1947 int do_write, /* read or write? */
1948 u64_t position, /* offset on device to read or write */
1949 endpoint_t proc_nr, /* process doing the request */
1950 iovec_t *iov, /* pointer to read or write request vector */
1951 unsigned int nr_req /* length of request vector */
1952 )
1953 {
1954 struct wini *wn = w_wn;
1955 iovec_t *iop, *iov_end = iov + nr_req;
1956 int r, s, errors, fresh;
1957 u64_t pos;
1958 unsigned long block;
1959 u64_t dv_size = w_dv->dv_size;
1960 unsigned nbytes, nblocks, before, chunk;
1961 static u8_t packet[ATAPI_PACKETSIZE];
1962 size_t addr_offset = 0;
1963 int dmabytes = 0, piobytes = 0;
1964 ssize_t total = 0;
1965
1966 if (do_write) return(EINVAL);
1967
1968 errors = fresh = 0;
1969
1970 while (nr_req > 0 && !fresh) {
1971 int do_dma = wn->dma && w_atapi_dma;
1972 /* The Minix block size is smaller than the CD block size, so we
1973 * may have to read extra before or after the good data.
1974 */
1975 pos = add64(w_dv->dv_base, position);
1976 block = div64u(pos, CD_SECTOR_SIZE);
1977 before = rem64u(pos, CD_SECTOR_SIZE);
1978
1979 if(before)
1980 do_dma = 0;
1981
1982 /* How many bytes to transfer? */
1983 nbytes = 0;
1984 for (iop = iov; iop < iov_end; iop++) {
1985 nbytes += iop->iov_size;
1986 if(iop->iov_size % CD_SECTOR_SIZE)
1987 do_dma = 0;
1988 }
1989
1990 /* Data comes in as words, so we have to enforce even byte counts. */
1991 if ((before | nbytes) & 1) return(EINVAL);
1992
1993 /* Which block on disk and how close to EOF? */
1994 if (cmp64(position, dv_size) >= 0) return(total); /* At EOF */
1995 if (cmp64(add64ul(position, nbytes), dv_size) > 0)
1996 nbytes = diff64(dv_size, position);
1997
1998 nblocks = (before + nbytes + CD_SECTOR_SIZE - 1) / CD_SECTOR_SIZE;
1999
2000 /* First check to see if a reinitialization is needed. */
2001 if (!(wn->state & INITIALIZED) && w_specify() != OK) return(EIO);
2002
2003 /* Build an ATAPI command packet. */
2004 packet[0] = SCSI_READ10;
2005 packet[1] = 0;
2006 packet[2] = (block >> 24) & 0xFF;
2007 packet[3] = (block >> 16) & 0xFF;
2008 packet[4] = (block >> 8) & 0xFF;
2009 packet[5] = (block >> 0) & 0xFF;
2010 packet[6] = 0;
2011 packet[7] = (nblocks >> 8) & 0xFF;
2012 packet[8] = (nblocks >> 0) & 0xFF;
2013 packet[9] = 0;
2014 packet[10] = 0;
2015 packet[11] = 0;
2016
2017 if(do_dma) {
2018 stop_dma(wn);
2019 if (!setup_dma(&nbytes, proc_nr, iov, addr_offset, 0)) {
2020 do_dma = 0;
2021 } else if(nbytes != nblocks * CD_SECTOR_SIZE) {
2022 stop_dma(wn);
2023 do_dma = 0;
2024 }
2025 }
2026
2027 /* Tell the controller to execute the packet command. */
2028 r = atapi_sendpacket(packet, nblocks * CD_SECTOR_SIZE, do_dma);
2029 if (r != OK) goto err;
2030
2031 if(do_dma) {
2032 wn->dma_intseen = 0;
2033 start_dma(wn, 0);
2034 w_intr_wait();
2035 if(!wn->dma_intseen) {
2036 if(w_waitfor_dma(DMA_ST_INT, DMA_ST_INT)) {
2037 wn->dma_intseen = 1;
2038 }
2039 }
2040 if(error_dma(wn)) {
2041 printf("Disabling DMA (ATAPI)\n");
2042 wn->dma = 0;
2043 } else {
2044 dmabytes += nbytes;
2045 while (nbytes > 0) {
2046 vir_bytes chunk = nbytes;
2047
2048 if (chunk > iov->iov_size)
2049 chunk = iov->iov_size;
2050 position= add64ul(position, chunk);
2051 nbytes -= chunk;
2052 total += chunk;
2053 if ((iov->iov_size -= chunk) == 0) {
2054 iov++;
2055 nr_req--;
2056 }
2057 }
2058 }
2059 continue;
2060 }
2061
2062 /* Read chunks of data. */
2063 while ((r = atapi_intr_wait(do_dma, nblocks * CD_SECTOR_SIZE)) > 0) {
2064 size_t count;
2065 count = r;
2066
2067 while (before > 0 && count > 0) { /* Discard before. */
2068 chunk = before;
2069 if (chunk > count) chunk = count;
2070 if (chunk > DMA_BUF_SIZE) chunk = DMA_BUF_SIZE;
2071 if ((s=sys_insw(wn->base_cmd + REG_DATA,
2072 SELF, tmp_buf, chunk)) != OK)
2073 panic("Call to sys_insw() failed: %d", s);
2074 before -= chunk;
2075 count -= chunk;
2076 }
2077
2078 while (nbytes > 0 && count > 0) { /* Requested data. */
2079 chunk = nbytes;
2080 if (chunk > count) chunk = count;
2081 if (chunk > iov->iov_size) chunk = iov->iov_size;
2082 if(proc_nr != SELF) {
2083 s=sys_safe_insw(wn->base_cmd + REG_DATA,
2084 proc_nr, (void *) iov->iov_addr,
2085 addr_offset, chunk);
2086 } else {
2087 s=sys_insw(wn->base_cmd + REG_DATA, proc_nr,
2088 (void *) (iov->iov_addr + addr_offset),
2089 chunk);
2090 }
2091 if (s != OK)
2092 panic("Call to sys_insw() failed: %d", s);
2093 position= add64ul(position, chunk);
2094 nbytes -= chunk;
2095 count -= chunk;
2096 addr_offset += chunk;
2097 piobytes += chunk;
2098 fresh = 0;
2099 total += chunk;
2100 if ((iov->iov_size -= chunk) == 0) {
2101 iov++;
2102 nr_req--;
2103 fresh = 1; /* new element is optional */
2104 addr_offset = 0;
2105 }
2106
2107 }
2108
2109 while (count > 0) { /* Excess data. */
2110 chunk = count;
2111 if (chunk > DMA_BUF_SIZE) chunk = DMA_BUF_SIZE;
2112 if ((s=sys_insw(wn->base_cmd + REG_DATA,
2113 SELF, tmp_buf, chunk)) != OK)
2114 panic("Call to sys_insw() failed: %d", s);
2115 count -= chunk;
2116 }
2117 }
2118
2119 if (r < 0) {
2120 err: /* Don't retry if too many errors. */
2121 if (atapi_debug) sense_request();
2122 if (++errors == max_errors) {
2123 w_command = CMD_IDLE;
2124 if (atapi_debug) printf("giving up (%d)\n", errors);
2125 return(EIO);
2126 }
2127 if (atapi_debug) printf("retry (%d)\n", errors);
2128 }
2129 }
2130
2131 #if 0
2132 if(dmabytes) printf("dmabytes %d ", dmabytes);
2133 if(piobytes) printf("piobytes %d", piobytes);
2134 if(dmabytes || piobytes) printf("\n");
2135 #endif
2136
2137 w_command = CMD_IDLE;
2138 return(total);
2139 }
2140
2141 /*===========================================================================*
2142 * atapi_sendpacket *
2143 *===========================================================================*/
2144 static int atapi_sendpacket(packet, cnt, do_dma)
2145 u8_t *packet;
2146 unsigned cnt;
2147 int do_dma;
2148 {
2149 /* Send an Atapi Packet Command */
2150 struct wini *wn = w_wn;
2151 pvb_pair_t outbyte[6]; /* vector for sys_voutb() */
2152 int s;
2153
2154 if (wn->state & IGNORING) return ERR;
2155
2156 /* Select Master/Slave drive */
2157 if ((s=sys_outb(wn->base_cmd + REG_DRIVE, wn->ldhpref)) != OK)
2158 panic("Couldn't select master/ slave drive: %d", s);
2159
2160 if (!w_waitfor(STATUS_BSY | STATUS_DRQ, 0)) {
2161 printf("%s: atapi_sendpacket: drive not ready\n", w_name());
2162 return(ERR);
2163 }
2164
2165 /* Schedule a wakeup call, some controllers are flaky. This is done with
2166 * a synchronous alarm. If a timeout occurs a SYN_ALARM message is sent
2167 * from HARDWARE, so that w_intr_wait() can call w_timeout() in case the
2168 * controller was not able to execute the command. Leftover timeouts are
2169 * simply ignored by the main loop.
2170 */
2171 sys_setalarm(wakeup_ticks, 0);
2172
2173 if (cnt > 0xFFFE) cnt = 0xFFFE; /* Max data per interrupt. */
2174
2175 w_command = ATAPI_PACKETCMD;
2176 pv_set(outbyte[0], wn->base_cmd + REG_FEAT, do_dma ? FEAT_DMA : 0);
2177 pv_set(outbyte[1], wn->base_cmd + REG_IRR, 0);
2178 pv_set(outbyte[2], wn->base_cmd + REG_SAMTAG, 0);
2179 pv_set(outbyte[3], wn->base_cmd + REG_CNT_LO, (cnt >> 0) & 0xFF);
2180 pv_set(outbyte[4], wn->base_cmd + REG_CNT_HI, (cnt >> 8) & 0xFF);
2181 pv_set(outbyte[5], wn->base_cmd + REG_COMMAND, w_command);
2182 if (atapi_debug) printf("cmd: %x ", w_command);
2183 if ((s=sys_voutb(outbyte,6)) != OK)
2184 panic("Couldn't write registers with sys_voutb(): %d", s);
2185
2186 if (!w_waitfor(STATUS_BSY | STATUS_DRQ, STATUS_DRQ)) {
2187 printf("%s: timeout (BSY|DRQ -> DRQ)\n", w_name());
2188 return(ERR);
2189 }
2190 wn->w_status |= STATUS_ADMBSY; /* Command not at all done yet. */
2191
2192 /* Send the command packet to the device. */
2193 if ((s=sys_outsw(wn->base_cmd + REG_DATA, SELF, packet, ATAPI_PACKETSIZE)) != OK)
2194 panic("sys_outsw() failed: %d", s);
2195
2196 return(OK);
2197 }
2198
2199
2200 #endif /* ENABLE_ATAPI */
2201
2202 /*===========================================================================*
2203 * w_ioctl *
2204 *===========================================================================*/
2205 static int w_ioctl(dev_t minor, unsigned int request, endpoint_t endpt,
2206 cp_grant_id_t grant)
2207 {
2208 int r, timeout, prev, count;
2209 struct command cmd;
2210
2211 switch (request) {
2212 case DIOCTIMEOUT:
2213 r= sys_safecopyfrom(endpt, grant, 0, (vir_bytes)&timeout,
2214 sizeof(timeout));
2215
2216 if(r != OK)
2217 return r;
2218
2219 if (timeout == 0) {
2220 /* Restore defaults. */
2221 timeout_usecs = DEF_TIMEOUT_USECS;
2222 max_errors = MAX_ERRORS;
2223 wakeup_ticks = WAKEUP_TICKS;
2224 w_silent = 0;
2225 } else if (timeout < 0) {
2226 return EINVAL;
2227 } else {
2228 prev = wakeup_ticks;
2229
2230 if (!w_standard_timeouts) {
2231 /* Set (lower) timeout, lower error
2232 * tolerance and set silent mode.
2233 */
2234 wakeup_ticks = timeout;
2235 max_errors = 3;
2236 w_silent = 1;
2237
2238 timeout = timeout * 1000000 / sys_hz();
2239
2240 if (timeout_usecs > timeout)
2241 timeout_usecs = timeout;
2242 }
2243
2244 r= sys_safecopyto(endpt, grant, 0, (vir_bytes)&prev,
2245 sizeof(prev));
2246
2247 if(r != OK)
2248 return r;
2249 }
2250
2251 return OK;
2252
2253 case DIOCOPENCT:
2254 if (w_prepare(minor) == NULL) return ENXIO;
2255 count = w_wn->open_ct;
2256 r= sys_safecopyto(endpt, grant, 0, (vir_bytes)&count,
2257 sizeof(count));
2258
2259 if(r != OK)
2260 return r;
2261
2262 return OK;
2263
2264 case DIOCFLUSH:
2265 if (w_prepare(minor) == NULL) return ENXIO;
2266
2267 if (w_wn->state & ATAPI) return EINVAL;
2268
2269 if (!(w_wn->state & INITIALIZED) && w_specify() != OK)
2270 return EIO;
2271
2272 cmd.command = CMD_FLUSH_CACHE;
2273
2274 if (com_simple(&cmd) != OK || !w_waitfor(STATUS_BSY, 0))
2275 return EIO;
2276
2277 return (w_wn->w_status & (STATUS_ERR|STATUS_WF)) ? EIO : OK;
2278 }
2279
2280 return EINVAL;
2281 }
2282
2283 /*===========================================================================*
2284 * w_hw_int *
2285 *===========================================================================*/
2286 static void w_hw_int(unsigned int irqs)
2287 {
2288 /* Leftover interrupt(s) received; ack it/them. */
2289 ack_irqs(irqs);
2290 }
2291
2292
2293 /*===========================================================================*
2294 * ack_irqs *
2295 *===========================================================================*/
2296 static void ack_irqs(unsigned int irqs)
2297 {
2298 unsigned int drive;
2299 u32_t w_status;
2300
2301 for (drive = 0; drive < MAX_DRIVES; drive++) {
2302 if (!(wini[drive].state & IGNORING) && wini[drive].irq_need_ack &&
2303 ((1L << wini[drive].irq) & irqs)) {
2304 if (sys_inb((wini[drive].base_cmd + REG_STATUS),
2305 &w_status) != OK)
2306 {
2307 panic("couldn't ack irq on drive: %d", drive);
2308 }
2309 wini[drive].w_status= w_status;
2310 sys_inb(wini[drive].base_dma + DMA_STATUS, &w_status);
2311 if(w_status & DMA_ST_INT) {
2312 sys_outb(wini[drive].base_dma + DMA_STATUS, DMA_ST_INT);
2313 wini[drive].dma_intseen = 1;
2314 }
2315 if (sys_irqenable(&wini[drive].irq_hook_id) != OK)
2316 printf("couldn't re-enable drive %d\n", drive);
2317 }
2318 }
2319 }
2320
2321
2322 #define STSTR(a) if (status & STATUS_ ## a) strlcat(str, #a " ", sizeof(str));
2323 #define ERRSTR(a) if (e & ERROR_ ## a) strlcat(str, #a " ", sizeof(str));
2324 static char *strstatus(int status)
2325 {
2326 static char str[200];
2327 str[0] = '\0';
2328
2329 STSTR(BSY);
2330 STSTR(DRDY);
2331 STSTR(DMADF);
2332 STSTR(SRVCDSC);
2333 STSTR(DRQ);
2334 STSTR(CORR);
2335 STSTR(CHECK);
2336 return str;
2337 }
2338
2339 static char *strerr(int e)
2340 {
2341 static char str[200];
2342 str[0] = '\0';
2343
2344 ERRSTR(BB);
2345 ERRSTR(ECC);
2346 ERRSTR(ID);
2347 ERRSTR(AC);
2348 ERRSTR(TK);
2349 ERRSTR(DM);
2350
2351 return str;
2352 }
2353
2354 #if ENABLE_ATAPI
2355
2356 /*===========================================================================*
2357 * atapi_intr_wait *
2358 *===========================================================================*/
2359 static int atapi_intr_wait(int UNUSED(do_dma), size_t UNUSED(max))
2360 {
2361 /* Wait for an interrupt and study the results. Returns a number of bytes
2362 * that need to be transferred, or an error code.
2363 */
2364 struct wini *wn = w_wn;
2365 pvb_pair_t inbyte[4]; /* vector for sys_vinb() */
2366 int s; /* status for sys_vinb() */
2367 int e;
2368 int len;
2369 int irr;
2370 int r;
2371 int phase;
2372
2373 w_intr_wait();
2374
2375 /* Request series of device I/O. */
2376 inbyte[0].port = wn->base_cmd + REG_ERROR;
2377 inbyte[1].port = wn->base_cmd + REG_CNT_LO;
2378 inbyte[2].port = wn->base_cmd + REG_CNT_HI;
2379 inbyte[3].port = wn->base_cmd + REG_IRR;
2380 if ((s=sys_vinb(inbyte, 4)) != OK)
2381 panic("ATAPI failed sys_vinb(): %d", s);
2382 e = inbyte[0].value;
2383 len = inbyte[1].value;
2384 len |= inbyte[2].value << 8;
2385 irr = inbyte[3].value;
2386
2387 if (wn->w_status & (STATUS_BSY | STATUS_CHECK)) {
2388 if (atapi_debug) {
2389 printf("atapi fail: S=%x=%s E=%02x=%s L=%04x I=%02x\n", wn->w_status, strstatus(wn->w_status), e, strerr(e), len, irr);
2390 }
2391 return ERR;
2392 }
2393
2394 phase = (wn->w_status & STATUS_DRQ) | (irr & (IRR_COD | IRR_IO));
2395
2396 switch (phase) {
2397 case IRR_COD | IRR_IO:
2398 if (ATAPI_DEBUG) printf("ACD: Phase Command Complete\n");
2399 r = OK;
2400 break;
2401 case 0:
2402 if (ATAPI_DEBUG) printf("ACD: Phase Command Aborted\n");
2403 r = ERR;
2404 break;
2405 case STATUS_DRQ | IRR_COD:
2406 if (ATAPI_DEBUG) printf("ACD: Phase Command Out\n");
2407 r = ERR;
2408 break;
2409 case STATUS_DRQ:
2410 if (ATAPI_DEBUG) printf("ACD: Phase Data Out %d\n", len);
2411 r = len;
2412 break;
2413 case STATUS_DRQ | IRR_IO:
2414 if (ATAPI_DEBUG) printf("ACD: Phase Data In %d\n", len);
2415 r = len;
2416 break;
2417 default:
2418 if (ATAPI_DEBUG) printf("ACD: Phase Unknown\n");
2419 r = ERR;
2420 break;
2421 }
2422
2423 wn->w_status |= STATUS_ADMBSY; /* Assume not done yet. */
2424 return(r);
2425 }
2426
2427 #endif /* ENABLE_ATAPI */
2428
2429 #undef sys_voutb
2430 #undef sys_vinb
2431
2432 static int at_voutb(pvb_pair_t *pvb, int n)
2433 {
2434 int s, i;
2435 if ((s=sys_voutb(pvb,n)) == OK)
2436 return OK;
2437 printf("at_wini%ld: sys_voutb failed: %d pvb (%d):\n", w_instance, s, n);
2438 for(i = 0; i < n; i++)
2439 printf("%2d: %4x -> %4x\n", i, pvb[i].value, pvb[i].port);
2440 panic("sys_voutb failed");
2441 }
2442
2443 static int at_vinb(pvb_pair_t *pvb, int n)
2444 {
2445 int s, i;
2446 if ((s=sys_vinb(pvb,n)) == OK)
2447 return OK;
2448 printf("at_wini%ld: sys_vinb failed: %d pvb (%d):\n", w_instance, s, n);
2449 for(i = 0; i < n; i++)
2450 printf("%2d: %4x\n", i, pvb[i].port);
2451 panic("sys_vinb failed");
2452 }
2453
2454 static int at_out(int line, u32_t port, u32_t value, char *typename, int type)
2455 {
2456 int s;
2457 s = sys_out(port, value, type);
2458 if(s == OK)
2459 return OK;
2460 printf("at_wini%ld: line %d: %s failed: %d; %x -> %x\n",
2461 w_instance, line, typename, s, value, port);
2462 panic("sys_out failed");
2463 }
2464
2465
2466 static int at_in(int line, u32_t port, u32_t *value, char *typename, int type)
2467 {
2468 int s;
2469 s = sys_in(port, value, type);
2470 if(s == OK)
2471 return OK;
2472 printf("at_wini%ld: line %d: %s failed: %d; port %x\n",
2473 w_instance, line, typename, s, port);
2474 panic("sys_in failed");
2475 }
2476
2477
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