1 /* $NetBSD: cpufunc.h,v 1.18 2014/02/25 22:16:52 dsl Exp $ */
4 * Copyright (c) 1998, 2007 The NetBSD Foundation, Inc.
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Charles M. Hannum, and by Andrew Doran.
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
32 #ifndef _X86_CPUFUNC_H_
33 #define _X86_CPUFUNC_H_
36 * Functions to provide access to x86-specific instructions.
39 #include <sys/cdefs.h>
40 #include <sys/types.h>
42 #include <machine/segments.h>
43 #include <machine/specialreg.h>
48 void x86_lfence(void);
49 void x86_sfence(void);
50 void x86_mfence(void);
56 void lidt(struct region_descriptor
*);
71 void dr0(void *, uint32_t, uint32_t, uint32_t);
75 void breakpoint(void);
77 void x86_stihlt(void);
78 u_int
x86_getss(void);
80 /* fpu save, restore etc */
82 void fldcw(const uint16_t *);
85 void fnsave(union savefpu
*);
86 void fnstcw(uint16_t *);
87 uint16_t fngetsw(void);
88 void fnstsw(uint16_t *);
89 void frstor(const union savefpu
*);
93 void fxsave(union savefpu
*);
94 void fxrstor(const union savefpu
*);
95 void x86_ldmxcsr(const uint32_t *);
96 void x86_stmxcsr(uint32_t *);
99 void fp_divide_by_0(void);
101 /* Extended processor state functions (for AVX registers etc) */
103 uint64_t rdxcr(uint32_t); /* xgetbv */
104 void wrxcr(uint32_t, uint64_t); /* xsetgv */
106 void xrstor(const union savefpu
*, uint64_t);
107 void xsave(union savefpu
*, uint64_t);
108 void xsaveopt(union savefpu
*, uint64_t);
110 void x86_monitor(const void *, uint32_t, uint32_t);
111 void x86_mwait(uint32_t, uint32_t);
112 /* x86_cpuid2() writes four 32bit values, %eax, %ebx, %ecx and %edx */
113 #define x86_cpuid(a,b) x86_cpuid2((a),0,(b))
114 void x86_cpuid2(uint32_t, uint32_t, uint32_t *);
116 /* Use read_psl, write_psl when saving and restoring interrupt state. */
117 void x86_disable_intr(void);
118 void x86_enable_intr(void);
119 u_long
x86_read_psl(void);
120 void x86_write_psl(u_long
);
122 /* Use read_flags, write_flags to adjust other members of %eflags. */
123 u_long
x86_read_flags(void);
124 void x86_write_flags(u_long
);
126 void x86_reset(void);
129 * Some of the undocumented AMD64 MSRs need a 'passcode' to access.
131 * See LinuxBIOSv2: src/cpu/amd/model_fxx/model_fxx_init.c
134 #define OPTERON_MSR_PASSCODE 0x9c5a203aU
136 uint64_t rdmsr(u_int
);
137 uint64_t rdmsr_locked(u_int
, u_int
);
138 int rdmsr_safe(u_int
, uint64_t *);
139 uint64_t rdtsc(void);
140 uint64_t rdpmc(u_int
);
141 void wrmsr(u_int
, uint64_t);
142 void wrmsr_locked(u_int
, u_int
, uint64_t);
148 #endif /* !_X86_CPUFUNC_H_ */