2 /*******************************************************************************
4 * Module Name: hwregs - Read/write access functions for the various ACPI
5 * control and status registers.
7 ******************************************************************************/
9 /******************************************************************************
13 * Some or all of this work - Copyright (c) 1999 - 2010, Intel Corp.
14 * All rights reserved.
18 * 2.1. This is your license from Intel Corp. under its intellectual property
19 * rights. You may have additional license terms from the party that provided
20 * you this software, covering your right to use that party's intellectual
23 * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a
24 * copy of the source code appearing in this file ("Covered Code") an
25 * irrevocable, perpetual, worldwide license under Intel's copyrights in the
26 * base code distributed originally by Intel ("Original Intel Code") to copy,
27 * make derivatives, distribute, use and display any portion of the Covered
28 * Code in any form, with the right to sublicense such rights; and
30 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent
31 * license (with the right to sublicense), under only those claims of Intel
32 * patents that are infringed by the Original Intel Code, to make, use, sell,
33 * offer to sell, and import the Covered Code and derivative works thereof
34 * solely to the minimum extent necessary to exercise the above copyright
35 * license, and in no event shall the patent license extend to any additions
36 * to or modifications of the Original Intel Code. No other license or right
37 * is granted directly or by implication, estoppel or otherwise;
39 * The above copyright and patent license is granted only if the following
44 * 3.1. Redistribution of Source with Rights to Further Distribute Source.
45 * Redistribution of source code of any substantial portion of the Covered
46 * Code or modification with rights to further distribute source must include
47 * the above Copyright Notice, the above License, this list of Conditions,
48 * and the following Disclaimer and Export Compliance provision. In addition,
49 * Licensee must cause all Covered Code to which Licensee contributes to
50 * contain a file documenting the changes Licensee made to create that Covered
51 * Code and the date of any change. Licensee must include in that file the
52 * documentation of any changes made by any predecessor Licensee. Licensee
53 * must include a prominent statement that the modification is derived,
54 * directly or indirectly, from Original Intel Code.
56 * 3.2. Redistribution of Source with no Rights to Further Distribute Source.
57 * Redistribution of source code of any substantial portion of the Covered
58 * Code or modification without rights to further distribute source must
59 * include the following Disclaimer and Export Compliance provision in the
60 * documentation and/or other materials provided with distribution. In
61 * addition, Licensee may not authorize further sublicense of source of any
62 * portion of the Covered Code, and must include terms to the effect that the
63 * license from Licensee to its licensee is limited to the intellectual
64 * property embodied in the software Licensee provides to its licensee, and
65 * not to intellectual property embodied in modifications its licensee may
68 * 3.3. Redistribution of Executable. Redistribution in executable form of any
69 * substantial portion of the Covered Code or modification must reproduce the
70 * above Copyright Notice, and the following Disclaimer and Export Compliance
71 * provision in the documentation and/or other materials provided with the
74 * 3.4. Intel retains all right, title, and interest in and to the Original
77 * 3.5. Neither the name Intel nor any other trademark owned or controlled by
78 * Intel shall be used in advertising or otherwise to promote the sale, use or
79 * other dealings in products derived from or relating to the Covered Code
80 * without prior written authorization from Intel.
82 * 4. Disclaimer and Export Compliance
84 * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED
85 * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE
86 * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE,
87 * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY
88 * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY
89 * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A
92 * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES
93 * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR
94 * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT,
95 * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY
96 * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL
97 * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS
98 * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY
101 * 4.3. Licensee shall not export, either directly or indirectly, any of this
102 * software or system incorporating such software without first obtaining any
103 * required license or other approval from the U. S. Department of Commerce or
104 * any other agency or department of the United States Government. In the
105 * event Licensee exports any such software from the United States or
106 * re-exports any such software from a foreign destination, Licensee shall
107 * ensure that the distribution and export/re-export of the software is in
108 * compliance with all laws, regulations, orders, or other restrictions of the
109 * U.S. Export Administration Regulations. Licensee agrees that neither it nor
110 * any of its subsidiaries will export/re-export any technical data, process,
111 * software, or service, directly or indirectly, to any country for which the
112 * United States government or any agency thereof requires an export license,
113 * other governmental approval, or letter of assurance, without first obtaining
114 * such license, approval or letter.
116 *****************************************************************************/
121 #include "accommon.h"
122 #include "acevents.h"
124 #define _COMPONENT ACPI_HARDWARE
125 ACPI_MODULE_NAME ("hwregs")
128 /* Local Prototypes */
133 ACPI_GENERIC_ADDRESS
*RegisterA
,
134 ACPI_GENERIC_ADDRESS
*RegisterB
);
137 AcpiHwWriteMultiple (
139 ACPI_GENERIC_ADDRESS
*RegisterA
,
140 ACPI_GENERIC_ADDRESS
*RegisterB
);
143 /******************************************************************************
145 * FUNCTION: AcpiHwValidateRegister
147 * PARAMETERS: Reg - GAS register structure
148 * MaxBitWidth - Max BitWidth supported (32 or 64)
149 * Address - Pointer to where the gas->address
154 * DESCRIPTION: Validate the contents of a GAS register. Checks the GAS
155 * pointer, Address, SpaceId, BitWidth, and BitOffset.
157 ******************************************************************************/
160 AcpiHwValidateRegister (
161 ACPI_GENERIC_ADDRESS
*Reg
,
166 /* Must have a valid pointer to a GAS structure */
170 return (AE_BAD_PARAMETER
);
174 * Copy the target address. This handles possible alignment issues.
175 * Address must not be null. A null address also indicates an optional
176 * ACPI register that is not supported, so no error message.
178 ACPI_MOVE_64_TO_64 (Address
, &Reg
->Address
);
181 return (AE_BAD_ADDRESS
);
184 /* Validate the SpaceID */
186 if ((Reg
->SpaceId
!= ACPI_ADR_SPACE_SYSTEM_MEMORY
) &&
187 (Reg
->SpaceId
!= ACPI_ADR_SPACE_SYSTEM_IO
))
189 ACPI_ERROR ((AE_INFO
,
190 "Unsupported address space: 0x%X", Reg
->SpaceId
));
194 /* Validate the BitWidth */
196 if ((Reg
->BitWidth
!= 8) &&
197 (Reg
->BitWidth
!= 16) &&
198 (Reg
->BitWidth
!= 32) &&
199 (Reg
->BitWidth
!= MaxBitWidth
))
201 ACPI_ERROR ((AE_INFO
,
202 "Unsupported register bit width: 0x%X", Reg
->BitWidth
));
206 /* Validate the BitOffset. Just a warning for now. */
208 if (Reg
->BitOffset
!= 0)
210 ACPI_WARNING ((AE_INFO
,
211 "Unsupported register bit offset: 0x%X", Reg
->BitOffset
));
218 /******************************************************************************
220 * FUNCTION: AcpiHwRead
222 * PARAMETERS: Value - Where the value is returned
223 * Reg - GAS register structure
227 * DESCRIPTION: Read from either memory or IO space. This is a 32-bit max
228 * version of AcpiRead, used internally since the overhead of
229 * 64-bit values is not needed.
231 * LIMITATIONS: <These limitations also apply to AcpiHwWrite>
232 * BitWidth must be exactly 8, 16, or 32.
233 * SpaceID must be SystemMemory or SystemIO.
234 * BitOffset and AccessWidth are currently ignored, as there has
235 * not been a need to implement these.
237 ******************************************************************************/
242 ACPI_GENERIC_ADDRESS
*Reg
)
248 ACPI_FUNCTION_NAME (HwRead
);
251 /* Validate contents of the GAS register */
253 Status
= AcpiHwValidateRegister (Reg
, 32, &Address
);
254 if (ACPI_FAILURE (Status
))
259 /* Initialize entire 32-bit return value to zero */
264 * Two address spaces supported: Memory or IO. PCI_Config is
265 * not supported here because the GAS structure is insufficient
267 if (Reg
->SpaceId
== ACPI_ADR_SPACE_SYSTEM_MEMORY
)
269 Status
= AcpiOsReadMemory ((ACPI_PHYSICAL_ADDRESS
)
270 Address
, Value
, Reg
->BitWidth
);
272 else /* ACPI_ADR_SPACE_SYSTEM_IO, validated earlier */
274 Status
= AcpiHwReadPort ((ACPI_IO_ADDRESS
)
275 Address
, Value
, Reg
->BitWidth
);
278 ACPI_DEBUG_PRINT ((ACPI_DB_IO
,
279 "Read: %8.8X width %2d from %8.8X%8.8X (%s)\n",
280 *Value
, Reg
->BitWidth
, ACPI_FORMAT_UINT64 (Address
),
281 AcpiUtGetRegionName (Reg
->SpaceId
)));
287 /******************************************************************************
289 * FUNCTION: AcpiHwWrite
291 * PARAMETERS: Value - Value to be written
292 * Reg - GAS register structure
296 * DESCRIPTION: Write to either memory or IO space. This is a 32-bit max
297 * version of AcpiWrite, used internally since the overhead of
298 * 64-bit values is not needed.
300 ******************************************************************************/
305 ACPI_GENERIC_ADDRESS
*Reg
)
311 ACPI_FUNCTION_NAME (HwWrite
);
314 /* Validate contents of the GAS register */
316 Status
= AcpiHwValidateRegister (Reg
, 32, &Address
);
317 if (ACPI_FAILURE (Status
))
323 * Two address spaces supported: Memory or IO. PCI_Config is
324 * not supported here because the GAS structure is insufficient
326 if (Reg
->SpaceId
== ACPI_ADR_SPACE_SYSTEM_MEMORY
)
328 Status
= AcpiOsWriteMemory ((ACPI_PHYSICAL_ADDRESS
)
329 Address
, Value
, Reg
->BitWidth
);
331 else /* ACPI_ADR_SPACE_SYSTEM_IO, validated earlier */
333 Status
= AcpiHwWritePort ((ACPI_IO_ADDRESS
)
334 Address
, Value
, Reg
->BitWidth
);
337 ACPI_DEBUG_PRINT ((ACPI_DB_IO
,
338 "Wrote: %8.8X width %2d to %8.8X%8.8X (%s)\n",
339 Value
, Reg
->BitWidth
, ACPI_FORMAT_UINT64 (Address
),
340 AcpiUtGetRegionName (Reg
->SpaceId
)));
346 /*******************************************************************************
348 * FUNCTION: AcpiHwClearAcpiStatus
354 * DESCRIPTION: Clears all fixed and general purpose status bits
356 ******************************************************************************/
359 AcpiHwClearAcpiStatus (
363 ACPI_CPU_FLAGS LockFlags
= 0;
366 ACPI_FUNCTION_TRACE (HwClearAcpiStatus
);
369 ACPI_DEBUG_PRINT ((ACPI_DB_IO
, "About to write %04X to %8.8X%8.8X\n",
370 ACPI_BITMASK_ALL_FIXED_STATUS
,
371 ACPI_FORMAT_UINT64 (AcpiGbl_XPm1aStatus
.Address
)));
373 LockFlags
= AcpiOsAcquireLock (AcpiGbl_HardwareLock
);
375 /* Clear the fixed events in PM1 A/B */
377 Status
= AcpiHwRegisterWrite (ACPI_REGISTER_PM1_STATUS
,
378 ACPI_BITMASK_ALL_FIXED_STATUS
);
379 if (ACPI_FAILURE (Status
))
384 /* Clear the GPE Bits in all GPE registers in all GPE blocks */
386 Status
= AcpiEvWalkGpeList (AcpiHwClearGpeBlock
, NULL
);
389 AcpiOsReleaseLock (AcpiGbl_HardwareLock
, LockFlags
);
390 return_ACPI_STATUS (Status
);
394 /*******************************************************************************
396 * FUNCTION: AcpiHwGetRegisterBitMask
398 * PARAMETERS: RegisterId - Index of ACPI Register to access
400 * RETURN: The bitmask to be used when accessing the register
402 * DESCRIPTION: Map RegisterId into a register bitmask.
404 ******************************************************************************/
406 ACPI_BIT_REGISTER_INFO
*
407 AcpiHwGetBitRegisterInfo (
410 ACPI_FUNCTION_ENTRY ();
413 if (RegisterId
> ACPI_BITREG_MAX
)
415 ACPI_ERROR ((AE_INFO
, "Invalid BitRegister ID: 0x%X", RegisterId
));
419 return (&AcpiGbl_BitRegisterInfo
[RegisterId
]);
423 /******************************************************************************
425 * FUNCTION: AcpiHwWritePm1Control
427 * PARAMETERS: Pm1aControl - Value to be written to PM1A control
428 * Pm1bControl - Value to be written to PM1B control
432 * DESCRIPTION: Write the PM1 A/B control registers. These registers are
433 * different than than the PM1 A/B status and enable registers
434 * in that different values can be written to the A/B registers.
435 * Most notably, the SLP_TYP bits can be different, as per the
436 * values returned from the _Sx predefined methods.
438 ******************************************************************************/
441 AcpiHwWritePm1Control (
448 ACPI_FUNCTION_TRACE (HwWritePm1Control
);
451 Status
= AcpiHwWrite (Pm1aControl
, &AcpiGbl_FADT
.XPm1aControlBlock
);
452 if (ACPI_FAILURE (Status
))
454 return_ACPI_STATUS (Status
);
457 if (AcpiGbl_FADT
.XPm1bControlBlock
.Address
)
459 Status
= AcpiHwWrite (Pm1bControl
, &AcpiGbl_FADT
.XPm1bControlBlock
);
461 return_ACPI_STATUS (Status
);
465 /******************************************************************************
467 * FUNCTION: AcpiHwRegisterRead
469 * PARAMETERS: RegisterId - ACPI Register ID
470 * ReturnValue - Where the register value is returned
472 * RETURN: Status and the value read.
474 * DESCRIPTION: Read from the specified ACPI register
476 ******************************************************************************/
487 ACPI_FUNCTION_TRACE (HwRegisterRead
);
492 case ACPI_REGISTER_PM1_STATUS
: /* PM1 A/B: 16-bit access each */
494 Status
= AcpiHwReadMultiple (&Value
,
495 &AcpiGbl_XPm1aStatus
,
496 &AcpiGbl_XPm1bStatus
);
500 case ACPI_REGISTER_PM1_ENABLE
: /* PM1 A/B: 16-bit access each */
502 Status
= AcpiHwReadMultiple (&Value
,
503 &AcpiGbl_XPm1aEnable
,
504 &AcpiGbl_XPm1bEnable
);
508 case ACPI_REGISTER_PM1_CONTROL
: /* PM1 A/B: 16-bit access each */
510 Status
= AcpiHwReadMultiple (&Value
,
511 &AcpiGbl_FADT
.XPm1aControlBlock
,
512 &AcpiGbl_FADT
.XPm1bControlBlock
);
515 * Zero the write-only bits. From the ACPI specification, "Hardware
516 * Write-Only Bits": "Upon reads to registers with write-only bits,
517 * software masks out all write-only bits."
519 Value
&= ~ACPI_PM1_CONTROL_WRITEONLY_BITS
;
523 case ACPI_REGISTER_PM2_CONTROL
: /* 8-bit access */
525 Status
= AcpiHwRead (&Value
, &AcpiGbl_FADT
.XPm2ControlBlock
);
529 case ACPI_REGISTER_PM_TIMER
: /* 32-bit access */
531 Status
= AcpiHwRead (&Value
, &AcpiGbl_FADT
.XPmTimerBlock
);
535 case ACPI_REGISTER_SMI_COMMAND_BLOCK
: /* 8-bit access */
537 Status
= AcpiHwReadPort (AcpiGbl_FADT
.SmiCommand
, &Value
, 8);
542 ACPI_ERROR ((AE_INFO
, "Unknown Register ID: 0x%X",
544 Status
= AE_BAD_PARAMETER
;
548 if (ACPI_SUCCESS (Status
))
550 *ReturnValue
= Value
;
553 return_ACPI_STATUS (Status
);
557 /******************************************************************************
559 * FUNCTION: AcpiHwRegisterWrite
561 * PARAMETERS: RegisterId - ACPI Register ID
562 * Value - The value to write
566 * DESCRIPTION: Write to the specified ACPI register
568 * NOTE: In accordance with the ACPI specification, this function automatically
569 * preserves the value of the following bits, meaning that these bits cannot be
570 * changed via this interface:
572 * PM1_CONTROL[0] = SCI_EN
577 * 1) Hardware Ignored Bits: When software writes to a register with ignored
578 * bit fields, it preserves the ignored bit fields
579 * 2) SCI_EN: OSPM always preserves this bit position
581 ******************************************************************************/
584 AcpiHwRegisterWrite (
592 ACPI_FUNCTION_TRACE (HwRegisterWrite
);
597 case ACPI_REGISTER_PM1_STATUS
: /* PM1 A/B: 16-bit access each */
599 * Handle the "ignored" bit in PM1 Status. According to the ACPI
600 * specification, ignored bits are to be preserved when writing.
601 * Normally, this would mean a read/modify/write sequence. However,
602 * preserving a bit in the status register is different. Writing a
603 * one clears the status, and writing a zero preserves the status.
604 * Therefore, we must always write zero to the ignored bit.
606 * This behavior is clarified in the ACPI 4.0 specification.
608 Value
&= ~ACPI_PM1_STATUS_PRESERVED_BITS
;
610 Status
= AcpiHwWriteMultiple (Value
,
611 &AcpiGbl_XPm1aStatus
,
612 &AcpiGbl_XPm1bStatus
);
616 case ACPI_REGISTER_PM1_ENABLE
: /* PM1 A/B: 16-bit access each */
618 Status
= AcpiHwWriteMultiple (Value
,
619 &AcpiGbl_XPm1aEnable
,
620 &AcpiGbl_XPm1bEnable
);
624 case ACPI_REGISTER_PM1_CONTROL
: /* PM1 A/B: 16-bit access each */
627 * Perform a read first to preserve certain bits (per ACPI spec)
628 * Note: This includes SCI_EN, we never want to change this bit
630 Status
= AcpiHwReadMultiple (&ReadValue
,
631 &AcpiGbl_FADT
.XPm1aControlBlock
,
632 &AcpiGbl_FADT
.XPm1bControlBlock
);
633 if (ACPI_FAILURE (Status
))
638 /* Insert the bits to be preserved */
640 ACPI_INSERT_BITS (Value
, ACPI_PM1_CONTROL_PRESERVED_BITS
, ReadValue
);
642 /* Now we can write the data */
644 Status
= AcpiHwWriteMultiple (Value
,
645 &AcpiGbl_FADT
.XPm1aControlBlock
,
646 &AcpiGbl_FADT
.XPm1bControlBlock
);
650 case ACPI_REGISTER_PM2_CONTROL
: /* 8-bit access */
653 * For control registers, all reserved bits must be preserved,
654 * as per the ACPI spec.
656 Status
= AcpiHwRead (&ReadValue
, &AcpiGbl_FADT
.XPm2ControlBlock
);
657 if (ACPI_FAILURE (Status
))
662 /* Insert the bits to be preserved */
664 ACPI_INSERT_BITS (Value
, ACPI_PM2_CONTROL_PRESERVED_BITS
, ReadValue
);
666 Status
= AcpiHwWrite (Value
, &AcpiGbl_FADT
.XPm2ControlBlock
);
670 case ACPI_REGISTER_PM_TIMER
: /* 32-bit access */
672 Status
= AcpiHwWrite (Value
, &AcpiGbl_FADT
.XPmTimerBlock
);
676 case ACPI_REGISTER_SMI_COMMAND_BLOCK
: /* 8-bit access */
678 /* SMI_CMD is currently always in IO space */
680 Status
= AcpiHwWritePort (AcpiGbl_FADT
.SmiCommand
, Value
, 8);
685 ACPI_ERROR ((AE_INFO
, "Unknown Register ID: 0x%X",
687 Status
= AE_BAD_PARAMETER
;
692 return_ACPI_STATUS (Status
);
696 /******************************************************************************
698 * FUNCTION: AcpiHwReadMultiple
700 * PARAMETERS: Value - Where the register value is returned
701 * RegisterA - First ACPI register (required)
702 * RegisterB - Second ACPI register (optional)
706 * DESCRIPTION: Read from the specified two-part ACPI register (such as PM1 A/B)
708 ******************************************************************************/
713 ACPI_GENERIC_ADDRESS
*RegisterA
,
714 ACPI_GENERIC_ADDRESS
*RegisterB
)
721 /* The first register is always required */
723 Status
= AcpiHwRead (&ValueA
, RegisterA
);
724 if (ACPI_FAILURE (Status
))
729 /* Second register is optional */
731 if (RegisterB
->Address
)
733 Status
= AcpiHwRead (&ValueB
, RegisterB
);
734 if (ACPI_FAILURE (Status
))
741 * OR the two return values together. No shifting or masking is necessary,
742 * because of how the PM1 registers are defined in the ACPI specification:
744 * "Although the bits can be split between the two register blocks (each
745 * register block has a unique pointer within the FADT), the bit positions
746 * are maintained. The register block with unimplemented bits (that is,
747 * those implemented in the other register block) always returns zeros,
748 * and writes have no side effects"
750 *Value
= (ValueA
| ValueB
);
755 /******************************************************************************
757 * FUNCTION: AcpiHwWriteMultiple
759 * PARAMETERS: Value - The value to write
760 * RegisterA - First ACPI register (required)
761 * RegisterB - Second ACPI register (optional)
765 * DESCRIPTION: Write to the specified two-part ACPI register (such as PM1 A/B)
767 ******************************************************************************/
770 AcpiHwWriteMultiple (
772 ACPI_GENERIC_ADDRESS
*RegisterA
,
773 ACPI_GENERIC_ADDRESS
*RegisterB
)
778 /* The first register is always required */
780 Status
= AcpiHwWrite (Value
, RegisterA
);
781 if (ACPI_FAILURE (Status
))
787 * Second register is optional
789 * No bit shifting or clearing is necessary, because of how the PM1
790 * registers are defined in the ACPI specification:
792 * "Although the bits can be split between the two register blocks (each
793 * register block has a unique pointer within the FADT), the bit positions
794 * are maintained. The register block with unimplemented bits (that is,
795 * those implemented in the other register block) always returns zeros,
796 * and writes have no side effects"
798 if (RegisterB
->Address
)
800 Status
= AcpiHwWrite (Value
, RegisterB
);