| blob | ef154105363149f8ec7e08129778124717e24ab3 |
1 #include <machine/asm.h>
2 .text
3 .globl OPENSSL_ia32_cpuid
4 .type OPENSSL_ia32_cpuid,@function
5 .align 16
6 OPENSSL_ia32_cpuid:
7 .L_OPENSSL_ia32_cpuid_begin:
8 pushl %ebp
9 pushl %ebx
10 pushl %esi
11 pushl %edi
12 xorl %edx,%edx
13 pushfl
14 popl %eax
15 movl %eax,%ecx
16 xorl $2097152,%eax
17 pushl %eax
18 popfl
19 pushfl
20 popl %eax
21 xorl %eax,%ecx
22 xorl %eax,%eax
23 btl $21,%ecx
24 jnc .L000nocpuid
25 .byte 0x0f,0xa2
26 movl %eax,%edi
27 xorl %eax,%eax
28 cmpl $1970169159,%ebx
29 setne %al
30 movl %eax,%ebp
31 cmpl $1231384169,%edx
32 setne %al
33 orl %eax,%ebp
34 cmpl $1818588270,%ecx
35 setne %al
36 orl %eax,%ebp
37 jz .L001intel
38 cmpl $1752462657,%ebx
39 setne %al
40 movl %eax,%esi
41 cmpl $1769238117,%edx
42 setne %al
43 orl %eax,%esi
44 cmpl $1145913699,%ecx
45 setne %al
46 orl %eax,%esi
47 jnz .L001intel
48 movl $2147483648,%eax
49 .byte 0x0f,0xa2
50 cmpl $2147483649,%eax
51 jb .L001intel
52 movl %eax,%esi
53 movl $2147483649,%eax
54 .byte 0x0f,0xa2
55 orl %ecx,%ebp
56 andl $2049,%ebp
57 cmpl $2147483656,%esi
58 jb .L001intel
59 movl $2147483656,%eax
60 .byte 0x0f,0xa2
61 movzbl %cl,%esi
62 incl %esi
63 movl $1,%eax
64 xorl %ecx,%ecx
65 .byte 0x0f,0xa2
66 btl $28,%edx
67 jnc .L002generic
68 shrl $16,%ebx
69 andl $255,%ebx
70 cmpl %esi,%ebx
71 ja .L002generic
72 andl $4026531839,%edx
73 jmp .L002generic
74 .L001intel:
75 cmpl $4,%edi
76 movl $-1,%edi
77 jb .L003nocacheinfo
78 movl $4,%eax
79 movl $0,%ecx
80 .byte 0x0f,0xa2
81 movl %eax,%edi
82 shrl $14,%edi
83 andl $4095,%edi
84 .L003nocacheinfo:
85 movl $1,%eax
86 xorl %ecx,%ecx
87 .byte 0x0f,0xa2
88 andl $3220176895,%edx
89 cmpl $0,%ebp
90 jne .L004notintel
91 orl $1073741824,%edx
92 andb $15,%ah
93 cmpb $15,%ah
94 jne .L004notintel
95 orl $1048576,%edx
96 .L004notintel:
97 btl $28,%edx
98 jnc .L002generic
99 andl $4026531839,%edx
100 cmpl $0,%edi
101 je .L002generic
102 orl $268435456,%edx
103 shrl $16,%ebx
104 cmpb $1,%bl
105 ja .L002generic
106 andl $4026531839,%edx
107 .L002generic:
108 andl $2048,%ebp
109 andl $4294965247,%ecx
110 movl %edx,%esi
111 orl %ecx,%ebp
112 btl $27,%ecx
113 jnc .L005clear_avx
114 xorl %ecx,%ecx
115 .byte 15,1,208
116 andl $6,%eax
117 cmpl $6,%eax
118 je .L006done
119 cmpl $2,%eax
120 je .L005clear_avx
121 .L007clear_xmm:
122 andl $4261412861,%ebp
123 andl $4278190079,%esi
124 .L005clear_avx:
125 andl $4026525695,%ebp
126 .L006done:
127 movl %esi,%eax
128 movl %ebp,%edx
129 .L000nocpuid:
130 popl %edi
131 popl %esi
132 popl %ebx
133 popl %ebp
134 ret
135 .size OPENSSL_ia32_cpuid,.-.L_OPENSSL_ia32_cpuid_begin
136 .globl OPENSSL_rdtsc
137 .type OPENSSL_rdtsc,@function
138 .align 16
139 OPENSSL_rdtsc:
140 .L_OPENSSL_rdtsc_begin:
141 xorl %eax,%eax
142 xorl %edx,%edx
143 call .L008PIC_me_up
144 .L008PIC_me_up:
145 popl %ecx
146 leal _GLOBAL_OFFSET_TABLE_+[.-.L008PIC_me_up](%ecx),%ecx
147 movl OPENSSL_ia32cap_P@GOT(%ecx),%ecx
148 btl $4,(%ecx)
149 jnc .L009notsc
150 .byte 0x0f,0x31
151 .L009notsc:
152 ret
153 .size OPENSSL_rdtsc,.-.L_OPENSSL_rdtsc_begin
154 .globl OPENSSL_instrument_halt
155 .type OPENSSL_instrument_halt,@function
156 .align 16
157 OPENSSL_instrument_halt:
158 .L_OPENSSL_instrument_halt_begin:
159 call .L010PIC_me_up
160 .L010PIC_me_up:
161 popl %ecx
162 leal _GLOBAL_OFFSET_TABLE_+[.-.L010PIC_me_up](%ecx),%ecx
163 movl OPENSSL_ia32cap_P@GOT(%ecx),%ecx
164 btl $4,(%ecx)
165 jnc .L011nohalt
166 .long 2421723150
167 andl $3,%eax
168 jnz .L011nohalt
169 pushfl
170 popl %eax
171 btl $9,%eax
172 jnc .L011nohalt
173 .byte 0x0f,0x31
174 pushl %edx
175 pushl %eax
176 hlt
177 .byte 0x0f,0x31
178 subl (%esp),%eax
179 sbbl 4(%esp),%edx
180 addl $8,%esp
181 ret
182 .L011nohalt:
183 xorl %eax,%eax
184 xorl %edx,%edx
185 ret
186 .size OPENSSL_instrument_halt,.-.L_OPENSSL_instrument_halt_begin
187 .globl OPENSSL_far_spin
188 .type OPENSSL_far_spin,@function
189 .align 16
190 OPENSSL_far_spin:
191 .L_OPENSSL_far_spin_begin:
192 pushfl
193 popl %eax
194 btl $9,%eax
195 jnc .L012nospin
196 movl 4(%esp),%eax
197 movl 8(%esp),%ecx
198 .long 2430111262
199 xorl %eax,%eax
200 movl (%ecx),%edx
201 jmp .L013spin
202 .align 16
203 .L013spin:
204 incl %eax
205 cmpl (%ecx),%edx
206 je .L013spin
207 .long 529567888
208 ret
209 .L012nospin:
210 xorl %eax,%eax
211 xorl %edx,%edx
212 ret
213 .size OPENSSL_far_spin,.-.L_OPENSSL_far_spin_begin
214 .globl OPENSSL_wipe_cpu
215 .type OPENSSL_wipe_cpu,@function
216 .align 16
217 OPENSSL_wipe_cpu:
218 .L_OPENSSL_wipe_cpu_begin:
219 xorl %eax,%eax
220 xorl %edx,%edx
221 call .L014PIC_me_up
222 .L014PIC_me_up:
223 popl %ecx
224 leal _GLOBAL_OFFSET_TABLE_+[.-.L014PIC_me_up](%ecx),%ecx
225 movl OPENSSL_ia32cap_P@GOT(%ecx),%ecx
226 movl (%ecx),%ecx
227 btl $1,(%ecx)
228 jnc .L015no_x87
229 andl $83886080,%ecx
230 cmpl $83886080,%ecx
231 jne .L016no_sse2
232 pxor %xmm0,%xmm0
233 pxor %xmm1,%xmm1
234 pxor %xmm2,%xmm2
235 pxor %xmm3,%xmm3
236 pxor %xmm4,%xmm4
237 pxor %xmm5,%xmm5
238 pxor %xmm6,%xmm6
239 pxor %xmm7,%xmm7
240 .L016no_sse2:
241 .long 4007259865,4007259865,4007259865,4007259865,2430851995
242 .L015no_x87:
243 leal 4(%esp),%eax
244 ret
245 .size OPENSSL_wipe_cpu,.-.L_OPENSSL_wipe_cpu_begin
246 .globl OPENSSL_atomic_add
247 .type OPENSSL_atomic_add,@function
248 .align 16
249 OPENSSL_atomic_add:
250 .L_OPENSSL_atomic_add_begin:
251 movl 4(%esp),%edx
252 movl 8(%esp),%ecx
253 pushl %ebx
254 nop
255 movl (%edx),%eax
256 .L017spin:
257 leal (%eax,%ecx,1),%ebx
258 nop
259 .long 447811568
260 jne .L017spin
261 movl %ebx,%eax
262 popl %ebx
263 ret
264 .size OPENSSL_atomic_add,.-.L_OPENSSL_atomic_add_begin
265 .globl OPENSSL_indirect_call
266 .type OPENSSL_indirect_call,@function
267 .align 16
268 OPENSSL_indirect_call:
269 .L_OPENSSL_indirect_call_begin:
270 pushl %ebp
271 movl %esp,%ebp
272 subl $28,%esp
273 movl 12(%ebp),%ecx
274 movl %ecx,(%esp)
275 movl 16(%ebp),%edx
276 movl %edx,4(%esp)
277 movl 20(%ebp),%eax
278 movl %eax,8(%esp)
279 movl 24(%ebp),%eax
280 movl %eax,12(%esp)
281 movl 28(%ebp),%eax
282 movl %eax,16(%esp)
283 movl 32(%ebp),%eax
284 movl %eax,20(%esp)
285 movl 36(%ebp),%eax
286 movl %eax,24(%esp)
287 call *8(%ebp)
288 movl %ebp,%esp
289 popl %ebp
290 ret
291 .size OPENSSL_indirect_call,.-.L_OPENSSL_indirect_call_begin
292 .globl OPENSSL_cleanse
293 .type OPENSSL_cleanse,@function
294 .align 16
295 OPENSSL_cleanse:
296 .L_OPENSSL_cleanse_begin:
297 movl 4(%esp),%edx
298 movl 8(%esp),%ecx
299 xorl %eax,%eax
300 cmpl $7,%ecx
301 jae .L018lot
302 cmpl $0,%ecx
303 je .L019ret
304 .L020little:
305 movb %al,(%edx)
306 subl $1,%ecx
307 leal 1(%edx),%edx
308 jnz .L020little
309 .L019ret:
310 ret
311 .align 16
312 .L018lot:
313 testl $3,%edx
314 jz .L021aligned
315 movb %al,(%edx)
316 leal -1(%ecx),%ecx
317 leal 1(%edx),%edx
318 jmp .L018lot
319 .L021aligned:
320 movl %eax,(%edx)
321 leal -4(%ecx),%ecx
322 testl $-4,%ecx
323 leal 4(%edx),%edx
324 jnz .L021aligned
325 cmpl $0,%ecx
326 jne .L020little
327 ret
328 .size OPENSSL_cleanse,.-.L_OPENSSL_cleanse_begin
329 .globl OPENSSL_ia32_rdrand
330 .type OPENSSL_ia32_rdrand,@function
331 .align 16
332 OPENSSL_ia32_rdrand:
333 .L_OPENSSL_ia32_rdrand_begin:
334 movl $8,%ecx
335 .L022loop:
336 .byte 15,199,240
337 jc .L023break
338 loop .L022loop
339 .L023break:
340 cmpl $0,%eax
341 cmovel %ecx,%eax
342 ret
343 .size OPENSSL_ia32_rdrand,.-.L_OPENSSL_ia32_rdrand_begin
344 .comm OPENSSL_ia32cap_P,8,4
345 .section .init
346 PIC_PROLOGUE
347 call PIC_PLT(OPENSSL_cpuid_setup)
348 PIC_EPILOGUE