1 /* cpu.h,v 1.45.4.7 2008/01/28 18:20:39 matt Exp */
4 * Copyright (c) 1994-1996 Mark Brinicombe.
5 * Copyright (c) 1994 Brini.
8 * This code is derived from software written for Brini by Mark Brinicombe
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by Brini.
21 * 4. The name of the company nor the name of the author may be used to
22 * endorse or promote products derived from this software without specific
23 * prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
26 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
27 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
28 * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
29 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
30 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * RiscBSD kernel project
41 * CPU specific symbols
45 * Based on kate/katelib/arm6.h
52 * User-visible definitions
55 /* CTL_MACHDEP definitions. */
56 #define CPU_DEBUG 1 /* int: misc kernel debug control */
57 #define CPU_BOOTED_DEVICE 2 /* string: device we booted from */
58 #define CPU_BOOTED_KERNEL 3 /* string: kernel we booted */
59 #define CPU_CONSDEV 4 /* struct: dev_t of our console */
60 #define CPU_POWERSAVE 5 /* int: use CPU powersave mode */
61 #define CPU_MAXID 6 /* number of valid machdep ids */
63 #if defined(_KERNEL) || defined(_KMEMUSER)
66 * Kernel-only definitions
69 #if !defined(_MODULE) && defined(_KERNEL_OPT)
70 #include "opt_multiprocessor.h"
71 #include "opt_cpuoptions.h"
72 #include "opt_lockdebug.h"
73 #include "opt_cputypes.h"
74 #endif /* !_MODULE && _KERNEL_OPT */
77 #if defined(TPIDRPRW_IS_CURLWP) || defined(TPIDRPRW_IS_CURCPU)
78 #include <arm/armreg.h>
81 /* 1 == use cpu_sleep(), 0 == don't */
82 extern int cpu_do_powersave
;
83 extern int cpu_fpu_present
;
85 /* All the CLKF_* macros take a struct clockframe * as an argument. */
88 * CLKF_USERMODE: Return TRUE/FALSE (1/0) depending on whether the
89 * frame came from USR mode or not.
92 #define CLKF_USERMODE(cf) (((cf)->cf_tf.tf_spsr & PSR_MODE) == PSR_USR32_MODE)
94 #define CLKF_USERMODE(cf) (((cf)->cf_if.if_r15 & R15_MODE) == R15_MODE_USR)
98 * CLKF_INTR: True if we took the interrupt from inside another
101 #if defined(__PROG32) && !defined(__ARM_EABI__)
102 /* Hack to treat FPE time as interrupt time so we can measure it */
103 #define CLKF_INTR(cf) \
104 ((curcpu()->ci_intr_depth > 1) || \
105 ((cf)->cf_tf.tf_spsr & PSR_MODE) == PSR_UND32_MODE)
107 #define CLKF_INTR(cf) ((void)(cf), curcpu()->ci_intr_depth > 1)
111 * CLKF_PC: Extract the program counter from a clockframe
114 #define CLKF_PC(frame) (frame->cf_tf.tf_pc)
116 #define CLKF_PC(frame) (frame->cf_if.if_r15 & R15_PC)
120 * LWP_PC: Find out the program counter for the given lwp.
123 #define LWP_PC(l) (lwp_trapframe(l)->tf_pc)
125 #define LWP_PC(l) (lwp_trapframe(l)->tf_r15 & R15_PC)
129 * Per-CPU information. For now we assume one CPU.
132 static inline int curcpl(void);
133 static inline void set_curcpl(int);
134 static inline void cpu_dosoftints(void);
138 #include <sys/intr.h>
140 #include <sys/atomic.h>
141 #include <sys/cpu_data.h>
142 #include <sys/device_if.h>
143 #include <sys/evcnt.h>
146 struct cpu_data ci_data
; /* MI per-cpu data */
147 device_t ci_dev
; /* Device corresponding to this CPU */
149 uint32_t ci_arm_cpuid
; /* aggregate CPU id */
150 uint32_t ci_arm_cputype
; /* CPU type */
151 uint32_t ci_arm_cpurev
; /* CPU revision */
152 uint32_t ci_ctrl
; /* The CPU control register */
153 int ci_cpl
; /* current processor level (spl) */
154 volatile int ci_astpending
; /* */
155 int ci_want_resched
; /* resched() was called */
156 int ci_intr_depth
; /* */
157 struct cpu_softc
*ci_softc
; /* platform softc */
158 lwp_t
*ci_softlwps
[SOFTINT_COUNT
];
159 volatile uint32_t ci_softints
;
160 lwp_t
*ci_curlwp
; /* current lwp */
161 lwp_t
*ci_lastlwp
; /* last lwp */
162 struct evcnt ci_arm700bugcount
;
163 int32_t ci_mtx_count
;
165 register_t ci_undefsave
[3];
167 uint64_t ci_lastintr
;
168 struct pmap_tlb_info
*ci_tlb_info
;
169 struct pmap
*ci_pmap_lastuser
;
170 struct pmap
*ci_pmap_cur
;
171 tlb_asid_t ci_pmap_asid_cur
;
172 struct trapframe
*ci_ddb_regs
;
173 struct evcnt ci_abt_evs
[16];
174 struct evcnt ci_und_ev
;
175 struct evcnt ci_und_cp15_ev
;
176 struct evcnt ci_vfp_evs
[3];
177 #if defined(MP_CPU_INFO_MEMBERS)
182 extern struct cpu_info cpu_info_store
;
184 struct lwp
*arm_curlwp(void);
185 struct cpu_info
*arm_curcpu(void);
189 #define curlwp arm_curlwp()
190 #define curcpu() arm_curcpu()
192 #elif defined(TPIDRPRW_IS_CURLWP)
193 static inline struct lwp
*
196 return (struct lwp
*) armreg_tpidrprw_read();
200 _curlwp_set(struct lwp
*l
)
202 armreg_tpidrprw_write((uintptr_t)l
);
205 // Also in <sys/lwp.h> but also here if this was included before <sys/lwp.h>
206 static inline struct cpu_info
*lwp_getcpu(struct lwp
*);
208 #define curlwp _curlwp()
209 // curcpu() expands into two instructions: a mrc and a ldr
210 #define curcpu() lwp_getcpu(_curlwp())
211 #elif defined(TPIDRPRW_IS_CURCPU)
212 #ifdef __HAVE_PREEMPTION
213 #error __HAVE_PREEMPTION requires TPIDRPRW_IS_CURLWP
215 static inline struct cpu_info
*
218 return (struct cpu_info
*) armreg_tpidrprw_read();
220 #elif !defined(MULTIPROCESSOR)
221 #define curcpu() (&cpu_info_store)
222 #elif !defined(__HAVE_PREEMPTION)
223 #error MULTIPROCESSOR && !__HAVE_PREEMPTION requires TPIDRPRW_IS_CURCPU or TPIDRPRW_IS_CURLWP
225 #error MULTIPROCESSOR && __HAVE_PREEMPTION requires TPIDRPRW_IS_CURLWP
226 #endif /* !TPIDRPRW_IS_CURCPU && !TPIDRPRW_IS_CURLWP */
229 #define curlwp (curcpu()->ci_curlwp)
232 #define CPU_INFO_ITERATOR int
233 #if defined(MULTIPROCESSOR)
234 extern struct cpu_info
*cpu_info
[];
235 #define cpu_number() (curcpu()->ci_index)
236 void cpu_boot_secondary_processors(void);
237 #define CPU_IS_PRIMARY(ci) ((ci)->ci_index == 0)
238 #define CPU_INFO_FOREACH(cii, ci) \
239 cii = 0, ci = cpu_info[0]; cii < ncpu && (ci = cpu_info[cii]) != NULL; cii++
241 #define cpu_number() 0
243 #define CPU_IS_PRIMARY(ci) true
244 #define CPU_INFO_FOREACH(cii, ci) \
245 cii = 0, __USE(cii), ci = curcpu(); ci != NULL; ci = NULL
248 #define LWP0_CPU_INFO (&cpu_info_store)
253 return curcpu()->ci_cpl
;
259 curcpu()->ci_cpl
= pri
;
265 #ifdef __HAVE_FAST_SOFTINTS
266 void dosoftints(void);
267 #ifndef __HAVE_PIC_FAST_SOFTINTS
268 struct cpu_info
* const ci
= curcpu();
269 if (ci
->ci_intr_depth
== 0 && (ci
->ci_softints
>> ci
->ci_cpl
) > 0)
276 void cpu_proc_fork(struct proc
*, struct proc
*);
278 #define cpu_proc_fork(p1, p2)
285 #ifdef __HAVE_PREEMPTION
286 #define setsoftast(ci) atomic_or_uint(&(ci)->ci_astpending, __BIT(0))
288 #define setsoftast(ci) ((ci)->ci_astpending = __BIT(0))
292 * Notify the current process (p) that it has a signal pending,
293 * process as soon as possible.
296 #define cpu_signotify(l) setsoftast((l)->l_cpu)
299 * Give a profiling tick to the current process when the user profiling
300 * buffer pages are invalid. On the i386, request an ast to send us
301 * through trap(), marking the proc as needing a profiling tick.
303 #define cpu_need_proftick(l) ((l)->l_pflag |= LP_OWEUPC, \
304 setsoftast((l)->l_cpu))
306 /* for preeemption. */
307 void cpu_set_curpri(int);
310 * We've already preallocated the stack for the idlelwps for additional CPUs.
311 * This hook allows to return them.
313 vaddr_t
cpu_uarea_alloc_idlelwp(struct cpu_info
*);
317 * cpu device glue (belongs in cpuvar.h)
319 void cpu_attach(device_t
, cpuid_t
);
322 #endif /* !_LOCORE */
326 #endif /* !_ARM_CPU_H_ */