sys/arch/arm/include/mcontext.h

   1 /*      $NetBSD: mcontext.h,v 1.18 2015/03/24 08:38:29 matt Exp $       */
   2
   3 /*-
   4  * Copyright (c) 2001, 2002 The NetBSD Foundation, Inc.
   5  * All rights reserved.
   6  *
   7  * This code is derived from software contributed to The NetBSD Foundation
   8  * by Klaus Klein and by Jason R. Thorpe of Wasabi Systems, Inc.
   9  *
  10  * Redistribution and use in source and binary forms, with or without
  11  * modification, are permitted provided that the following conditions
  12  * are met:
  13  * 1. Redistributions of source code must retain the above copyright
  14  *    notice, this list of conditions and the following disclaimer.
  15  * 2. Redistributions in binary form must reproduce the above copyright
  16  *    notice, this list of conditions and the following disclaimer in the
  17  *    documentation and/or other materials provided with the distribution.
  18  *
  19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  29  * POSSIBILITY OF SUCH DAMAGE.
  30  */
  31
  32 #ifndef _ARM_MCONTEXT_H_
  33 #define _ARM_MCONTEXT_H_
  34
  35 #include <sys/stdint.h>
  36 /*
  37  * General register state
  38  */
  39 #define _NGREG          17
  40 typedef unsigned int    __greg_t;
  41 typedef __greg_t        __gregset_t[_NGREG];
  42
  43 #define _REG_R0         0
  44 #define _REG_R1         1
  45 #define _REG_R2         2
  46 #define _REG_R3         3
  47 #define _REG_R4         4
  48 #define _REG_R5         5
  49 #define _REG_R6         6
  50 #define _REG_R7         7
  51 #define _REG_R8         8
  52 #define _REG_R9         9
  53 #define _REG_R10        10
  54 #define _REG_R11        11
  55 #define _REG_R12        12
  56 #define _REG_R13        13
  57 #define _REG_R14        14
  58 #define _REG_R15        15
  59 #define _REG_CPSR       16
  60 /* Convenience synonyms */
  61 #define _REG_FP         _REG_R11
  62 #define _REG_SP         _REG_R13
  63 #define _REG_LR         _REG_R14
  64 #define _REG_PC         _REG_R15
  65
  66 /*
  67  * Floating point register state
  68  */
  69 /* Note: the storage layout of this structure must be identical to ARMFPE! */
  70 typedef struct {
  71         unsigned int    __fp_fpsr;
  72         struct {
  73                 unsigned int    __fp_exponent;
  74                 unsigned int    __fp_mantissa_hi;
  75                 unsigned int    __fp_mantissa_lo;
  76         }               __fp_fr[8];
  77 } __fpregset_t;
  78
  79 typedef struct {
  80 #ifdef __ARM_EABI__
  81         unsigned int    __vfp_fpscr;
  82         uint64_t        __vfp_fstmx[32];
  83         unsigned int    __vfp_fpsid;
  84 #else
  85         unsigned int    __vfp_fpscr;
  86         unsigned int    __vfp_fstmx[33];
  87         unsigned int    __vfp_fpsid;
  88 #endif
  89 } __vfpregset_t;
  90
  91 typedef struct {
  92         __gregset_t     __gregs;
  93         union {
  94                 __fpregset_t __fpregs;
  95                 __vfpregset_t __vfpregs;
  96         } __fpu;
  97 #if defined(__minix)
  98         int mc_flags;
  99         int mc_magic;
 100 #else
 101         __greg_t        _mc_tlsbase;
 102         __greg_t        _mc_user_tpid;
 103 #endif /* defined(__minix) */
 104 } mcontext_t, mcontext32_t;
 105
 106 /* Machine-dependent uc_flags */
 107 #define _UC_ARM_VFP     0x00010000      /* FPU field is VFP */
 108
 109 /* used by signal delivery to indicate status of signal stack */
 110 #define _UC_SETSTACK    0x00020000
 111 #define _UC_CLRSTACK    0x00040000
 112
 113 #define _UC_TLSBASE     0x00080000
 114
 115 #define _UC_MACHINE_PAD 1               /* Padding appended to ucontext_t */
 116
 117 #define _UC_MACHINE_SP(uc)      ((uc)->uc_mcontext.__gregs[_REG_SP])
 118 #define _UC_MACHINE_PC(uc)      ((uc)->uc_mcontext.__gregs[_REG_PC])
 119 #define _UC_MACHINE_INTRV(uc)   ((uc)->uc_mcontext.__gregs[_REG_R0])
 120
 121 #define _UC_MACHINE_SET_PC(uc, pc)      _UC_MACHINE_PC(uc) = (pc)
 122
 123 #if defined(__minix)
 124 #define _UC_MACHINE_STACK(uc)   ((uc)->uc_mcontext.__gregs[_REG_SP])
 125 #define _UC_MACHINE_SET_STACK(uc, sp)   _UC_MACHINE_STACK(uc) = (sp)
 126
 127 #define _UC_MACHINE_FP(uc)      ((uc)->uc_mcontext.__gregs[_REG_FP])
 128 #define _UC_MACHINE_SET_FP(uc, fp)      _UC_MACHINE_FP(uc) = (fp)
 129
 130 #define _UC_MACHINE_LR(uc)      ((uc)->uc_mcontext.__gregs[_REG_LR])
 131 #define _UC_MACHINE_SET_LR(uc, lr)      _UC_MACHINE_LR(uc) = (lr)
 132
 133 #define _UC_MACHINE_R0(uc)      ((uc)->uc_mcontext.__gregs[_REG_R0])
 134 #define _UC_MACHINE_SET_R0(uc, setreg)  _UC_MACHINE_R0(uc) = (setreg)
 135
 136 #define _UC_MACHINE_R1(uc)      ((uc)->uc_mcontext.__gregs[_REG_R1])
 137 #define _UC_MACHINE_SET_R1(uc, setreg)  _UC_MACHINE_R1(uc) = (setreg)
 138
 139 #define _UC_MACHINE_R2(uc)      ((uc)->uc_mcontext.__gregs[_REG_R2])
 140 #define _UC_MACHINE_SET_R2(uc, setreg)  _UC_MACHINE_R2(uc) = (setreg)
 141
 142 #define _UC_MACHINE_R3(uc)      ((uc)->uc_mcontext.__gregs[_REG_R3])
 143 #define _UC_MACHINE_SET_R3(uc, setreg)  _UC_MACHINE_R3(uc) = (setreg)
 144
 145 #define _UC_MACHINE_R4(uc)      ((uc)->uc_mcontext.__gregs[_REG_R4])
 146 #define _UC_MACHINE_SET_R4(uc, setreg)  _UC_MACHINE_R4(uc) = (setreg)
 147 #endif /* defined(__minix) */
 148
 149 #ifdef __ARM_EABI__
 150 #define __UCONTEXT_SIZE (256 + 144)
 151 #else
 152 #define __UCONTEXT_SIZE 256
 153 #endif
 154
 155 __BEGIN_DECLS
 156 static __inline void *
 157 __lwp_getprivate_fast(void)
 158 {
 159 #if !defined(__thumb__) || defined(_ARM_ARCH_T2)
 160         extern void *_lwp_getprivate(void);
 161         void *rv;
 162         __asm("mrc p15, 0, %0, c13, c0, 3" : "=r"(rv));
 163         if (__predict_true(rv))
 164                 return rv;
 165         /*
 166          * Some ARM cores are broken and don't raise an undefined fault when an
 167          * unrecogized mrc instruction is encountered, but just return zero.
 168          * To do deal with that, if we get a zero we (re-)fetch the value using
 169          * syscall.
 170          */
 171         return _lwp_getprivate();
 172 #else
 173         extern void *__aeabi_read_tp(void);
 174         return __aeabi_read_tp();
 175 #endif /* !__thumb__ || _ARM_ARCH_T2 */
 176 }
 177
 178 #if defined(_KERNEL)
 179 void vfp_getcontext(struct lwp *, mcontext_t *, int *);
 180 void vfp_setcontext(struct lwp *, const mcontext_t *);
 181 #endif
 182
 183 #if defined(__minix)
 184 int setmcontext(const mcontext_t *mcp);
 185 int getmcontext(mcontext_t *mcp);
 186 #define MCF_MAGIC 0xc0ffee
 187 #endif /* defined(__minix) */
 188 __END_DECLS
 189
 190 #endif  /* !_ARM_MCONTEXT_H_ */