tests/lib/libc/sys/t_lwp_create.c

   1 /* $NetBSD: t_lwp_create.c,v 1.2 2012/05/22 09:23:39 martin Exp $ */
   2
   3 /*-
   4  * Copyright (c) 2012 The NetBSD Foundation, Inc.
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions and the following disclaimer.
  12  * 2. Redistributions in binary form must reproduce the above copyright
  13  *    notice, this list of conditions and the following disclaimer in the
  14  *    documentation and/or other materials provided with the distribution.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  17  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  18  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  19  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  20  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  21  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  22  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  23  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  24  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  25  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  26  * POSSIBILITY OF SUCH DAMAGE.
  27  */
  28
  29 /*
  30  * This code is partly based on code by Joel Sing <joel at sing.id.au>
  31  */
  32
  33 #include <atf-c.h>
  34 #include <lwp.h>
  35 #include <stdio.h>
  36 #include <stdlib.h>
  37 #include <ucontext.h>
  38 #include <inttypes.h>
  39 #include <errno.h>
  40
  41 #ifdef __alpha__
  42 #include <machine/alpha_cpu.h>
  43 #endif
  44 #ifdef __amd64__
  45 #include <machine/vmparam.h>
  46 #include <machine/psl.h>
  47 #endif
  48 #ifdef __hppa__
  49 #include <machine/psl.h>
  50 #endif
  51 #ifdef __i386__
  52 #include <machine/segments.h>
  53 #include <machine/psl.h>
  54 #endif
  55 #if defined(__m68k__) || defined(__sh3__) || defined __vax__
  56 #include <machine/psl.h>
  57 #endif
  58
  59 volatile lwpid_t the_lwp_id = 0;
  60
  61 static void lwp_main_func(void* arg)
  62 {
  63         the_lwp_id = _lwp_self();
  64         _lwp_exit();
  65 }
  66
  67 /*
  68  * Hard to document - see usage examples below.
  69  */
  70 #define INVALID_UCONTEXT(ARCH,NAME,DESC)        \
  71 static void ARCH##_##NAME(ucontext_t *);        \
  72 ATF_TC(lwp_create_##ARCH##_fail_##NAME);        \
  73 ATF_TC_HEAD(lwp_create_##ARCH##_fail_##NAME, tc)        \
  74 {       \
  75         atf_tc_set_md_var(tc, "descr", "verify rejection of invalid ucontext " \
  76                 "on " #ARCH " due to " DESC);   \
  77 }       \
  78         \
  79 ATF_TC_BODY(lwp_create_##ARCH##_fail_##NAME, tc)        \
  80 {       \
  81         ucontext_t uc;          \
  82         lwpid_t lid;            \
  83         int error;              \
  84                                 \
  85         getcontext(&uc);        \
  86         uc.uc_flags = _UC_CPU;  \
  87         ARCH##_##NAME(&uc);     \
  88                                 \
  89         error = _lwp_create(&uc, 0, &lid);      \
  90         ATF_REQUIRE(error != 0 && errno == EINVAL);     \
  91 }       \
  92 static void ARCH##_##NAME(ucontext_t *uc)       \
  93 {
  94
  95
  96 ATF_TC(lwp_create_works);
  97 ATF_TC_HEAD(lwp_create_works, tc)
  98 {
  99         atf_tc_set_md_var(tc, "descr", "Verify creation of a lwp and waiting"
 100             " for it to finish");
 101 }
 102
 103 ATF_TC_BODY(lwp_create_works, tc)
 104 {
 105         ucontext_t uc;
 106         lwpid_t lid;
 107         int error;
 108         void *stack;
 109         static const size_t ssize = 16*1024;
 110
 111         stack = malloc(ssize);
 112         _lwp_makecontext(&uc, lwp_main_func, NULL, NULL, stack, ssize);
 113
 114         error = _lwp_create(&uc, 0, &lid);
 115         ATF_REQUIRE(error == 0);
 116
 117         error = _lwp_wait(lid, NULL);
 118         ATF_REQUIRE(error == 0);
 119         ATF_REQUIRE(lid == the_lwp_id);
 120 }
 121
 122 INVALID_UCONTEXT(generic, no_uc_cpu, "not setting cpu registers")
 123         uc->uc_flags &= ~_UC_CPU;
 124 }
 125
 126 #ifdef __alpha__
 127 INVALID_UCONTEXT(alpha, pslset, "trying to clear the USERMODE flag")
 128         uc->uc_mcontext.__gregs[_REG_PS] &= ~ALPHA_PSL_USERMODE;
 129 }
 130 INVALID_UCONTEXT(alpha, pslclr, "trying to set a 'must be zero' flag")
 131         uc->uc_mcontext.__gregs[_REG_PS] |= ALPHA_PSL_IPL_HIGH;
 132 }
 133 #endif
 134 #ifdef __amd64__
 135 INVALID_UCONTEXT(amd64, untouchable_rflags, "forbidden rflags changed")
 136         uc->uc_mcontext.__gregs[_REG_RFLAGS] |= PSL_MBZ;
 137 }
 138 /*
 139  * XXX: add invalid GS/DS selector tests
 140  */
 141 INVALID_UCONTEXT(amd64, pc_too_high,
 142      "instruction pointer outside userland address space")
 143         uc->uc_mcontext.__gregs[_REG_RIP] = VM_MAXUSER_ADDRESS;
 144 }
 145 #endif
 146 #ifdef __arm__
 147 INVALID_UCONTEXT(arm, invalid_mode, "psr or r15 set to non-user-mode")
 148         uc->uc_mcontext.__gregs[_REG_PC] |= 0x1f /*PSR_SYS32_MODE*/;
 149         uc->uc_mcontext.__gregs[_REG_CPSR] |= 0x03 /*R15_MODE_SVC*/;
 150 }
 151 #endif
 152 #ifdef __hppa__
 153 INVALID_UCONTEXT(hppa, invalid_1, "set illegal bits in psw")
 154         uc->uc_mcontext.__gregs[_REG_PSW] |= PSW_MBZ;
 155 }
 156 INVALID_UCONTEXT(hppa, invalid_0, "clear illegal bits in psw")
 157         uc->uc_mcontext.__gregs[_REG_PSW] &= ~PSW_MBS;
 158 }
 159 #endif
 160 #ifdef __i386__
 161 INVALID_UCONTEXT(i386, untouchable_eflags, "changing forbidden eflags")
 162         uc->uc_mcontext.__gregs[_REG_EFL] |= PSL_IOPL;
 163 }
 164 INVALID_UCONTEXT(i386, priv_escalation, "modifying priviledge level")
 165         uc->uc_mcontext.__gregs[_REG_CS] &= ~SEL_RPL;
 166 }
 167 #endif
 168 #ifdef __m68k__
 169 INVALID_UCONTEXT(m68k, invalid_ps_bits,
 170     "setting forbidden bits in the ps register")
 171         uc->uc_mcontext.__gregs[_REG_PS] |= (PSL_MBZ|PSL_IPL|PSL_S);
 172 }
 173 #endif
 174 #ifdef __sh3__
 175 INVALID_UCONTEXT(sh3, modify_userstatic,
 176     "modifying illegal bits in the status register")
 177         uc->uc_mcontext.__gregs[_REG_SR] |= PSL_MD;
 178 }
 179 #endif
 180 #ifdef __sparc__
 181 INVALID_UCONTEXT(sparc, pc_odd, "mis-aligned instruction pointer")
 182         uc->uc_mcontext.__gregs[_REG_PC] = 0x100002;
 183 }
 184 INVALID_UCONTEXT(sparc, npc_odd, "mis-aligned next instruction pointer")
 185         uc->uc_mcontext.__gregs[_REG_nPC] = 0x100002;
 186 }
 187 INVALID_UCONTEXT(sparc, pc_null, "NULL instruction pointer")
 188         uc->uc_mcontext.__gregs[_REG_PC] = 0;
 189 }
 190 INVALID_UCONTEXT(sparc, npc_null, "NULL next instruction pointer")
 191         uc->uc_mcontext.__gregs[_REG_nPC] = 0;
 192 }
 193 #endif
 194 #ifdef __vax__
 195 INVALID_UCONTEXT(vax, psl_0, "clearing forbidden bits in psl")
 196         uc->uc_mcontext.__gregs[_REG_PSL] &= ~(PSL_U | PSL_PREVU);
 197 }
 198 INVALID_UCONTEXT(vax, psl_1, "setting forbidden bits in psl")
 199         uc->uc_mcontext.__gregs[_REG_PSL] |= PSL_IPL | PSL_IS;
 200 }
 201 INVALID_UCONTEXT(vax, psl_cm, "setting CM bit in psl")
 202         uc->uc_mcontext.__gregs[_REG_PSL] |= PSL_CM;
 203 }
 204 #endif
 205
 206 ATF_TP_ADD_TCS(tp)
 207 {
 208         ATF_TP_ADD_TC(tp, lwp_create_works);
 209         ATF_TP_ADD_TC(tp, lwp_create_generic_fail_no_uc_cpu);
 210 #ifdef __alpha__
 211         ATF_TP_ADD_TC(tp, lwp_create_alpha_fail_pslset);
 212         ATF_TP_ADD_TC(tp, lwp_create_alpha_fail_pslclr);
 213 #endif
 214 #ifdef __amd64__
 215         ATF_TP_ADD_TC(tp, lwp_create_amd64_fail_untouchable_rflags);
 216         ATF_TP_ADD_TC(tp, lwp_create_amd64_fail_pc_too_high);
 217 #endif
 218 #ifdef __arm__
 219         ATF_TP_ADD_TC(tp, lwp_create_arm_fail_invalid_mode);
 220 #endif
 221 #ifdef __hppa__
 222         ATF_TP_ADD_TC(tp, lwp_create_hppa_fail_invalid_1);
 223         ATF_TP_ADD_TC(tp, lwp_create_hppa_fail_invalid_0);
 224 #endif
 225 #ifdef __i386__
 226         ATF_TP_ADD_TC(tp, lwp_create_i386_fail_untouchable_eflags);
 227         ATF_TP_ADD_TC(tp, lwp_create_i386_fail_priv_escalation);
 228 #endif
 229 #ifdef __m68k__
 230         ATF_TP_ADD_TC(tp, lwp_create_m68k_fail_invalid_ps_bits);
 231 #endif
 232 #ifdef __sh3__
 233         ATF_TP_ADD_TC(tp, lwp_create_sh3_fail_modify_userstatic);
 234 #endif
 235 #ifdef __sparc__
 236         ATF_TP_ADD_TC(tp, lwp_create_sparc_fail_pc_odd);
 237         ATF_TP_ADD_TC(tp, lwp_create_sparc_fail_npc_odd);
 238         ATF_TP_ADD_TC(tp, lwp_create_sparc_fail_pc_null);
 239         ATF_TP_ADD_TC(tp, lwp_create_sparc_fail_npc_null);
 240 #endif
 241 #ifdef __vax__
 242         ATF_TP_ADD_TC(tp, lwp_create_vax_fail_psl_0);
 243         ATF_TP_ADD_TC(tp, lwp_create_vax_fail_psl_1);
 244         ATF_TP_ADD_TC(tp, lwp_create_vax_fail_psl_cm);
 245 #endif
 246         return atf_no_error();
 247 }