crypto/external/bsd/openssl/lib/libcrypto/arch/arm/armv4cpuid.S

   1 #include "arm_arch.h"
   2 #include "arm_asm.h"
   3
   4 .text
   5 .code   32
   6
   7 .align  5
   8 .global OPENSSL_atomic_add
   9 .type   OPENSSL_atomic_add,%function
  10 OPENSSL_atomic_add:
  11 #if __ARM_ARCH__>=6
  12 .Ladd:  ldrex   r2,[r0]
  13         add     r3,r2,r1
  14         strex   r2,r3,[r0]
  15         cmp     r2,#0
  16         bne     .Ladd
  17         mov     r0,r3
  18         RET
  19 #else
  20         stmdb   sp!,{r4-r6,lr}
  21         ldr     r2,.Lspinlock
  22         adr     r3,.Lspinlock
  23         mov     r4,r0
  24         mov     r5,r1
  25         add     r6,r3,r2        @ &spinlock
  26         b       .+8
  27 .Lspin: bl      sched_yield
  28         mov     r0,#-1
  29         swp     r0,r0,[r6]
  30         cmp     r0,#0
  31         bne     .Lspin
  32
  33         ldr     r2,[r4]
  34         add     r2,r2,r5
  35         str     r2,[r4]
  36         str     r0,[r6]         @ release spinlock
  37         ldmia   sp!,{r4-r6,lr}
  38         tst     lr,#1
  39         moveq   pc,lr
  40         .word   0xe12fff1e      @ bx    lr
  41 #endif
  42 .size   OPENSSL_atomic_add,.-OPENSSL_atomic_add
  43
  44 .global OPENSSL_cleanse
  45 .type   OPENSSL_cleanse,%function
  46 OPENSSL_cleanse:
  47         eor     ip,ip,ip
  48         cmp     r1,#7
  49         subhs   r1,r1,#4
  50         bhs     .Lot
  51         cmp     r1,#0
  52         beq     .Lcleanse_done
  53 .Little:
  54         strb    ip,[r0],#1
  55         subs    r1,r1,#1
  56         bhi     .Little
  57         b       .Lcleanse_done
  58
  59 .Lot:   tst     r0,#3
  60         beq     .Laligned
  61         strb    ip,[r0],#1
  62         sub     r1,r1,#1
  63         b       .Lot
  64 .Laligned:
  65         str     ip,[r0],#4
  66         subs    r1,r1,#4
  67         bhs     .Laligned
  68         adds    r1,r1,#4
  69         bne     .Little
  70 .Lcleanse_done:
  71 #if __ARM_ARCH__>=5
  72         RET
  73 #else
  74         tst     lr,#1
  75         moveq   pc,lr
  76         .word   0xe12fff1e      @ bx    lr
  77 #endif
  78 .size   OPENSSL_cleanse,.-OPENSSL_cleanse
  79
  80 #if __ARM_MAX_ARCH__>=7
  81 .arch   armv7-a
  82 .fpu    neon
  83
  84 .align  5
  85 .global _armv7_neon_probe
  86 .type   _armv7_neon_probe,%function
  87 _armv7_neon_probe:
  88         vorr    q0,q0,q0
  89         RET
  90 .size   _armv7_neon_probe,.-_armv7_neon_probe
  91
  92 .global _armv7_tick
  93 .type   _armv7_tick,%function
  94 _armv7_tick:
  95         mrrc    p15,1,r0,r1,c14         @ CNTVCT
  96         RET
  97 .size   _armv7_tick,.-_armv7_tick
  98
  99 .global _armv8_aes_probe
 100 .type   _armv8_aes_probe,%function
 101 _armv8_aes_probe:
 102         .inst   0xf3b00300      @ aese.8        q0,q0
 103         RET
 104 .size   _armv8_aes_probe,.-_armv8_aes_probe
 105
 106 .global _armv8_sha1_probe
 107 .type   _armv8_sha1_probe,%function
 108 _armv8_sha1_probe:
 109         .inst   0xf2000c40      @ sha1c.32      q0,q0,q0
 110         RET
 111 .size   _armv8_sha1_probe,.-_armv8_sha1_probe
 112
 113 .global _armv8_sha256_probe
 114 .type   _armv8_sha256_probe,%function
 115 _armv8_sha256_probe:
 116         .inst   0xf3000c40      @ sha256h.32    q0,q0,q0
 117         RET
 118 .size   _armv8_sha256_probe,.-_armv8_sha256_probe
 119 .global _armv8_pmull_probe
 120 .type   _armv8_pmull_probe,%function
 121 _armv8_pmull_probe:
 122         .inst   0xf2a00e00      @ vmull.p64     q0,d0,d0
 123         RET
 124 .size   _armv8_pmull_probe,.-_armv8_pmull_probe
 125 #endif
 126
 127 .global OPENSSL_wipe_cpu
 128 .type   OPENSSL_wipe_cpu,%function
 129 OPENSSL_wipe_cpu:
 130 #if __ARM_MAX_ARCH__>=7
 131         ldr     r0,.LOPENSSL_armcap
 132         adr     r1,.LOPENSSL_armcap
 133         ldr     r0,[r1,r0]
 134 #endif
 135         eor     r2,r2,r2
 136         eor     r3,r3,r3
 137         eor     ip,ip,ip
 138 #if __ARM_MAX_ARCH__>=7
 139         tst     r0,#1
 140         beq     .Lwipe_done
 141         veor    q0, q0, q0
 142         veor    q1, q1, q1
 143         veor    q2, q2, q2
 144         veor    q3, q3, q3
 145         veor    q8, q8, q8
 146         veor    q9, q9, q9
 147         veor    q10, q10, q10
 148         veor    q11, q11, q11
 149         veor    q12, q12, q12
 150         veor    q13, q13, q13
 151         veor    q14, q14, q14
 152         veor    q15, q15, q15
 153 .Lwipe_done:
 154 #endif
 155         mov     r0,sp
 156 #if __ARM_ARCH__>=5
 157         RET
 158 #else
 159         tst     lr,#1
 160         moveq   pc,lr
 161         .word   0xe12fff1e      @ bx    lr
 162 #endif
 163 .size   OPENSSL_wipe_cpu,.-OPENSSL_wipe_cpu
 164
 165 .global OPENSSL_instrument_bus
 166 .type   OPENSSL_instrument_bus,%function
 167 OPENSSL_instrument_bus:
 168         eor     r0,r0,r0
 169 #if __ARM_ARCH__>=5
 170         RET
 171 #else
 172         tst     lr,#1
 173         moveq   pc,lr
 174         .word   0xe12fff1e      @ bx    lr
 175 #endif
 176 .size   OPENSSL_instrument_bus,.-OPENSSL_instrument_bus
 177
 178 .global OPENSSL_instrument_bus2
 179 .type   OPENSSL_instrument_bus2,%function
 180 OPENSSL_instrument_bus2:
 181         eor     r0,r0,r0
 182 #if __ARM_ARCH__>=5
 183         RET
 184 #else
 185         tst     lr,#1
 186         moveq   pc,lr
 187         .word   0xe12fff1e      @ bx    lr
 188 #endif
 189 .size   OPENSSL_instrument_bus2,.-OPENSSL_instrument_bus2
 190
 191 .align  5
 192 #if __ARM_MAX_ARCH__>=7
 193 .LOPENSSL_armcap:
 194 .word   OPENSSL_armcap_P-.LOPENSSL_armcap
 195 #endif
 196 #if __ARM_ARCH__>=6
 197 .align  5
 198 #else
 199 .Lspinlock:
 200 .word   atomic_add_spinlock-.Lspinlock
 201 .align  5
 202
 203 .data
 204 .align  2
 205 atomic_add_spinlock:
 206 .word   0
 207 #endif
 208
 209 .comm   OPENSSL_armcap_P,4,4
 210 .hidden OPENSSL_armcap_P