1 # $NetBSD: Makefile,v 1.14 2015/01/29 20:41:35 joerg Exp $
7 .PATH
: ${LLVM_SRCDIR}/lib
/Target
/ARM
9 SRCS
+= ARMAsmPrinter.
cpp \
10 ARMBaseInstrInfo.
cpp \
11 ARMBaseRegisterInfo.
cpp \
12 ARMConstantIslandPass.
cpp \
13 ARMConstantPoolValue.
cpp \
14 ARMExpandPseudoInsts.
cpp \
16 ARMFrameLowering.
cpp \
17 ARMHazardRecognizer.
cpp \
21 ARMLoadStoreOptimizer.
cpp \
23 ARMMachineFunctionInfo.
cpp \
24 ARMOptimizeBarriersPass.
cpp \
26 ARMSelectionDAGInfo.
cpp \
28 ARMTargetMachine.
cpp \
29 ARMTargetObjectFile.
cpp \
30 ARMTargetTransformInfo.
cpp \
32 MLxExpansionPass.
cpp \
34 Thumb1FrameLowering.
cpp \
35 Thumb1RegisterInfo.
cpp \
36 Thumb2ITBlockPass.
cpp \
38 Thumb2RegisterInfo.
cpp \
39 Thumb2SizeReduction.
cpp
42 TABLEGEN_INCLUDES
= -I
${LLVM_SRCDIR}/lib
/Target
/ARM
44 ARMGenRegisterInfo.inc|
-gen-register-info \
45 ARMGenInstrInfo.inc|
-gen-instr-info \
46 ARMGenCodeEmitter.inc|
-gen-emitter \
47 ARMGenMCCodeEmitter.inc|
-gen-emitter \
48 ARMGenMCPseudoLowering.inc|
-gen-pseudo-lowering \
49 ARMGenAsmWriter.inc|
-gen-asm-writer \
50 ARMGenAsmMatcher.inc|
-gen-asm-matcher \
51 ARMGenDAGISel.inc|
-gen-dag-isel \
52 ARMGenFastISel.inc|
-gen-fast-isel \
53 ARMGenCallingConv.inc|
-gen-callingconv \
54 ARMGenSubtargetInfo.inc|
-gen-subtarget \
55 ARMGenDisassemblerTables.inc|
-gen-disassembler
57 .
include "${.PARSEDIR}/../../tablegen.mk"
60 .
include <bsd.hostlib.mk
>