minix/drivers/audio/als4000/als4000.h

   1 #ifndef _SDR_H
   2 #define _SDR_H
   3 /* ======= General Parameter ======= */
   4 /* Global configure */
   5 #define MIXER_SB16
   6
   7 #include <minix/audio_fw.h>
   8 #include <sys/types.h>
   9 #include <sys/ioc_sound.h>
  10 #include <minix/sound.h>
  11 #include <machine/pci.h>
  12 #include <sys/mman.h>
  13 #include "io.h"
  14
  15 /* Subdevice type */
  16 #define DAC             0
  17 #define ADC             1
  18 #define MIX             2
  19
  20 /* PCI number and driver name */
  21 #define VENDOR_ID               0x4005
  22 #define DEVICE_ID               0x4000
  23 #define DRIVER_NAME             "ALS4000"
  24
  25 /* Volume option */
  26 #define GET_VOL                 0
  27 #define SET_VOL                 1
  28
  29 /* Interrupt control */
  30 #define INTR_ENABLE             1
  31 #define INTR_DISABLE    0
  32
  33 /* Interrupt status */
  34 #define INTR_STS_DAC            0x80
  35 #define INTR_STS_ADC            0x40
  36
  37 /* ======= Self-defined Parameter ======= */
  38 #define REG_MIXER_ADDR          0x04
  39 #define REG_MIXER_DATA          0x05
  40 #define REG_GCR_DATA            0x08
  41 #define REG_GCR_INDEX           0x0c
  42 #define REG_INTR_STS            0x0e
  43 #define REG_INTR_CTRL           0x8c
  44 #define REG_DMA_EM_CTRL         0x99
  45
  46 #define REG_DAC_DMA_ADDR        0x91
  47 #define REG_DAC_DMA_LEN         0x92
  48 #define REG_DAC_CUR_ADDR        0xa0
  49 #define REG_ADC_DMA_ADDR        0xa2
  50 #define REG_ADC_DMA_LEN         0xa3
  51 #define REG_ADC_CUR_ADDR        0xa4
  52
  53 #define REG_SB_CONFIG           0x00
  54 #define REG_SB_RESET            0x06
  55 #define REG_SB_READ                     0x0a
  56 #define REG_SB_CMD                      0x0c
  57 #define REG_SB_DATA                     0x0e
  58 #define REG_SB_BASE                     0x10
  59 #define REG_SB_FIFO_LEN_LO      0x1c
  60 #define REG_SB_FIFO_LEN_HI      0x1d
  61 #define REG_SB_FIFO_CTRL        0x1e
  62 #define REG_SB_DMA_SETUP        0x81
  63 #define REG_SB_IRQ_STATUS       0x82
  64 #define REG_SB_CTRL                     0xc0
  65
  66 #define CMD_MIXER_WRITE_ENABLE  0x80
  67 #define CMD_SOUND_ON                    0xd1
  68 #define CMD_INTR_ENABLE                 0x28000
  69 #define CMD_SAMPLE_RATE_OUT             0x41
  70 #define CMD_SIGN_MONO                   0x10
  71 #define CMD_SIGN_STEREO                 0x30
  72 #define CMD_UNSIGN_MONO                 0x00
  73 #define CMD_UNSIGN_STEREO               0x20
  74 #define CMD_BIT16_AI                    0xb6
  75 #define CMD_BIT16_DMA_OFF               0xd5
  76 #define CMD_BIT16_DMA_ON                0xd6
  77 #define CMD_BIT8_AI                             0xc6
  78 #define CMD_BIT8_DMA_OFF                0xd0
  79 #define CMD_BIT8_DMA_ON                 0xd4
  80
  81 #define CMD_REC_WIDTH8                  0x04
  82 #define CMD_REC_STEREO                  0x20
  83 #define CMD_REC_SIGN                    0x10
  84
  85 static u32_t g_sample_rate[] = {
  86         5512, 11025, 22050, 44100, 8000, 16000, 32000, 48000
  87 };
  88
  89 /* Driver Data Structure */
  90 typedef struct aud_sub_dev_conf_t {
  91         u32_t stereo;
  92         u16_t sample_rate;
  93         u32_t nr_of_bits;
  94         u32_t sign;
  95         u32_t busy;
  96         u32_t fragment_size;
  97         u8_t format;
  98 } aud_sub_dev_conf_t;
  99
 100 typedef struct DEV_STRUCT {
 101         char *name;
 102         u16_t vid;
 103         u16_t did;
 104         u32_t devind;
 105         u32_t base[6];
 106         char irq;
 107         char revision;
 108         u32_t intr_status;
 109 } DEV_STRUCT;
 110
 111 void dev_mixer_write(u32_t *base, u32_t reg, u32_t val);
 112 u32_t dev_mixer_read(u32_t *base, u32_t reg);
 113
 114 #endif