minix/drivers/video/tda19988/tda19988.c

   1 #include <minix/blockdriver.h>
   2 #include <minix/drivers.h>
   3 #include <minix/ds.h>
   4 #include <minix/i2c.h>
   5 #include <minix/i2cdriver.h>
   6 #include <minix/log.h>
   7
   8 #include <ctype.h>
   9 #include <stdio.h>
  10 #include <stdlib.h>
  11
  12 /* constants */
  13 #define NR_DEVS 1               /* number of devices this driver handles */
  14 #define TDA19988_DEV 0          /* index of TDA19988 device */
  15 #define EDID_LEN 128            /* length of standard EDID block */
  16
  17 /* When passing data over a grant one needs to pass
  18  * a buffer to sys_safecopy copybuff is used for that*/
  19 #define COPYBUF_SIZE 0x1000     /* 4k buf */
  20 static unsigned char copybuf[COPYBUF_SIZE];
  21
  22 /* The device has two I2C interfaces CEC (0x34) and HDMI (0x70). This driver
  23  * needs access to both.
  24  */
  25
  26 /*
  27  * CEC - Register and Bit Definitions
  28  */
  29
  30 #define CEC_STATUS_REG 0xfe
  31 #define CEC_STATUS_CONNECTED_MASK 0x02
  32
  33 #define CEC_ENABLE_REG 0xff
  34 #define CEC_ENABLE_ALL_MASK 0x87
  35
  36 /*
  37  * HDMI - Pages
  38  *
  39  * The HDMI part is much bigger than the CEC part. Memory is accessed according
  40  * to page and address. Once the page is set, only the address needs to be
  41  * sent if accessing memory locations within the same page (you don't need to
  42  * send the page number every time).
  43  */
  44
  45 #define HDMI_CTRL_PAGE 0x00
  46 #define HDMI_PPL_PAGE 0x02
  47 #define HDMI_EDID_PAGE 0x09
  48 #define HDMI_INFO_PAGE 0x10
  49 #define HDMI_AUDIO_PAGE 0x11
  50 #define HDMI_HDCP_OTP_PAGE 0x12
  51 #define HDMI_GAMUT_PAGE 0x13
  52
  53 /*
  54  * The page select register isn't part of a page. A dummy value of 0xff is
  55  * used to signfiy this in the code.
  56  */
  57 #define HDMI_PAGELESS 0xff
  58
  59 /*
  60  * Control Page Registers and Bit Definitions
  61  */
  62
  63 #define HDMI_CTRL_REV_LO_REG 0x00
  64 #define HDMI_CTRL_REV_HI_REG 0x02
  65
  66 #define HDMI_CTRL_RESET_REG 0x0a
  67 #define HDMI_CTRL_RESET_DDC_MASK 0x02
  68
  69 #define HDMI_CTRL_DDC_CTRL_REG 0x0b
  70 #define HDMI_CTRL_DDC_EN_MASK 0x00
  71
  72 #define HDMI_CTRL_DDC_CLK_REG 0x0c
  73 #define HDMI_CTRL_DDC_CLK_EN_MASK 0x01
  74
  75 #define HDMI_CTRL_INTR_CTRL_REG 0x0f
  76 #define HDMI_CTRL_INTR_EN_GLO_MASK 0x04
  77
  78 #define HDMI_CTRL_INT_REG 0x11
  79 #define HDMI_CTRL_INT_EDID_MASK 0x02
  80
  81 /*
  82  * EDID Page Registers and Bit Definitions
  83  */
  84
  85 #define HDMI_EDID_DATA_REG 0x00
  86
  87 #define HDMI_EDID_DEV_ADDR_REG 0xfb
  88 #define HDMI_EDID_DEV_ADDR 0xa0
  89
  90 #define HDMI_EDID_OFFSET_REG 0xfc
  91 #define HDMI_EDID_OFFSET 0x00
  92
  93 #define HDMI_EDID_SEG_PTR_ADDR_REG 0xfc
  94 #define HDMI_EDID_SEG_PTR_ADDR 0x00
  95
  96 #define HDMI_EDID_SEG_ADDR_REG 0xfe
  97 #define HDMI_EDID_SEG_ADDR 0x00
  98
  99 #define HDMI_EDID_REQ_REG 0xfa
 100 #define HDMI_EDID_REQ_READ_MASK 0x01
 101
 102 /*
 103  * HDCP and OTP
 104  */
 105 #define HDMI_HDCP_OTP_DDC_CLK_REG 0x9a
 106 #define HDMI_HDCP_OTP_DDC_CLK_MASK 0x27
 107
 108 /* this register/mask isn't documented but it has to be cleared/set */
 109 #define HDMI_HDCP_OTP_SOME_REG 0x9b
 110 #define HDMI_HDCP_OTP_SOME_MASK 0x02
 111
 112 /*
 113  * Pageless Registers
 114  */
 115
 116 #define HDMI_PAGE_SELECT_REG 0xff
 117
 118 /*
 119  * Constants
 120  */
 121
 122 /* Revision of the TDA19988. */
 123 #define HDMI_REV_TDA19988 0x0331
 124
 125 /* the bus that this device is on (counting starting at 1) */
 126 static uint32_t cec_bus;
 127 static uint32_t hdmi_bus;
 128
 129 /* slave address of the device */
 130 static i2c_addr_t cec_address;
 131 static i2c_addr_t hdmi_address;
 132
 133 /* endpoint for the driver for the bus itself. */
 134 static endpoint_t cec_bus_endpoint;
 135 static endpoint_t hdmi_bus_endpoint;
 136
 137 /* logging - use with log_warn(), log_info(), log_debug(), log_trace(), etc */
 138 static struct log log = {
 139         .name = "tda19988",
 140         .log_level = LEVEL_INFO,
 141         .log_func = default_log
 142 };
 143
 144 /* CEC Module */
 145 static int is_display_connected(void);
 146 static int enable_hdmi_module(void);
 147
 148 /* HDMI Module */
 149 static int set_page(uint8_t page);
 150 static int hdmi_read(uint8_t page, uint8_t reg, uint8_t * val);
 151 static int hdmi_write(uint8_t page, uint8_t reg, uint8_t val);
 152 static int hdmi_set(uint8_t page, uint8_t reg, uint8_t mask);
 153 static int hdmi_clear(uint8_t page, uint8_t reg, uint8_t mask);
 154
 155 static int hdmi_ddc_enable(void);
 156 static int hdmi_init(void);
 157 static int check_revision(void);
 158 static int read_edid(uint8_t * data, size_t count);
 159
 160 /* libblockdriver callbacks */
 161 static int tda19988_blk_open(devminor_t minor, int access);
 162 static int tda19988_blk_close(devminor_t minor);
 163 static ssize_t tda19988_blk_transfer(devminor_t minor, int do_write, u64_t pos,
 164     endpoint_t endpt, iovec_t * iov, unsigned int count, int flags);
 165 static int tda19988_blk_ioctl(devminor_t minor, unsigned long request,
 166     endpoint_t endpt, cp_grant_id_t grant, endpoint_t user_endpt);
 167 static struct device *tda19988_blk_part(devminor_t minor);
 168 static void tda19988_blk_other(message * m, int ipc_status);
 169
 170 /* Entry points into the device dependent code of block drivers. */
 171 struct blockdriver tda19988_tab = {
 172         .bdr_type = BLOCKDRIVER_TYPE_OTHER,
 173         .bdr_open = tda19988_blk_open,
 174         .bdr_close = tda19988_blk_close,
 175         .bdr_transfer = tda19988_blk_transfer,
 176         .bdr_ioctl = tda19988_blk_ioctl,        /* always returns ENOTTY */
 177         .bdr_part = tda19988_blk_part,
 178         .bdr_other = tda19988_blk_other         /* for notify events from DS */
 179 };
 180
 181 /* counts the number of times a device file is open */
 182 static int openct[NR_DEVS];
 183
 184 /* base and size of each device */
 185 static struct device geom[NR_DEVS];
 186
 187 static int
 188 tda19988_blk_open(devminor_t minor, int access)
 189 {
 190         log_trace(&log, "tda19988_blk_open(%d,%d)\n", minor, access);
 191         if (tda19988_blk_part(minor) == NULL) {
 192                 return ENXIO;
 193         }
 194
 195         openct[minor]++;
 196
 197         return OK;
 198 }
 199
 200 static int
 201 tda19988_blk_close(devminor_t minor)
 202 {
 203         log_trace(&log, "tda19988_blk_close(%d)\n", minor);
 204         if (tda19988_blk_part(minor) == NULL) {
 205                 return ENXIO;
 206         }
 207
 208         if (openct[minor] < 1) {
 209                 log_warn(&log, "closing unopened device %d\n", minor);
 210                 return EINVAL;
 211         }
 212         openct[minor]--;
 213
 214         return OK;
 215 }
 216
 217 static ssize_t
 218 tda19988_blk_transfer(devminor_t minor, int do_write, u64_t pos64,
 219     endpoint_t endpt, iovec_t * iov, unsigned int nr_req, int flags)
 220 {
 221         unsigned count;
 222         struct device *dv;
 223         u64_t dv_size;
 224         int r;
 225         cp_grant_id_t grant;
 226
 227         log_trace(&log, "tda19988_blk_transfer()\n");
 228
 229         /* Get minor device information. */
 230         dv = tda19988_blk_part(minor);
 231         if (dv == NULL) {
 232                 return ENXIO;
 233         }
 234
 235         if (nr_req > NR_IOREQS) {
 236                 return EINVAL;
 237         }
 238
 239         dv_size = dv->dv_size;
 240         if (pos64 >= dv_size) {
 241                 return OK;      /* Beyond EOF */
 242         }
 243
 244         if (nr_req > 0) {
 245
 246                 /* How much to transfer and where to / from. */
 247                 count = iov->iov_size;
 248                 grant = (cp_grant_id_t) iov->iov_addr;
 249
 250                 /* check for EOF */
 251                 if (pos64 >= dv_size) {
 252                         return 0;
 253                 }
 254
 255                 /* don't go past the end of the device */
 256                 if (pos64 + count > dv_size) {
 257                         count = dv_size - pos64;
 258                 }
 259
 260                 /* don't overflow copybuf */
 261                 if (count > COPYBUF_SIZE) {
 262                         count = COPYBUF_SIZE;
 263                 }
 264
 265                 log_debug(&log, "transfering 0x%x bytes\n", count);
 266
 267                 if (do_write) {
 268
 269                         log_warn(&log, "Error: writing to read-only device\n");
 270                         return EACCES;
 271
 272                 } else {
 273
 274                         if (is_display_connected() == 1) {
 275
 276                                 r = hdmi_init();
 277                                 if (r != OK) {
 278                                         log_warn(&log,
 279                                             "Failed to enable HDMI module\n");
 280                                         return EIO;
 281                                 }
 282
 283                                 memset(copybuf, '\0', COPYBUF_SIZE);
 284                                 r = read_edid(copybuf, count);
 285                                 if (r != OK) {
 286                                         log_warn(&log,
 287                                             "read_edid() failed (r=%d)\n", r);
 288                                         return r;
 289                                 }
 290
 291                                 r = sys_safecopyto(endpt, grant, (vir_bytes)
 292                                     0, (vir_bytes) copybuf, count);
 293                                 if (r != OK) {
 294                                         log_warn(&log, "safecopyto failed\n");
 295                                         return EINVAL;
 296                                 }
 297
 298                                 return iov->iov_size;
 299                         } else {
 300                                 log_warn(&log, "Display not connected.\n");
 301                                 return ENODEV;
 302                         }
 303                 }
 304         } else {
 305
 306                 /* empty request */
 307                 return 0;
 308         }
 309 }
 310
 311 static int
 312 tda19988_blk_ioctl(devminor_t minor, unsigned long request, endpoint_t endpt,
 313     cp_grant_id_t grant, endpoint_t UNUSED(user_endpt))
 314 {
 315         log_trace(&log, "tda19988_blk_ioctl(%d)\n", minor);
 316         /* no supported ioctls for this device */
 317         return ENOTTY;
 318 }
 319
 320 static struct device *
 321 tda19988_blk_part(devminor_t minor)
 322 {
 323         log_trace(&log, "tda19988_blk_part(%d)\n", minor);
 324
 325         if (minor < 0 || minor >= NR_DEVS) {
 326                 return NULL;
 327         }
 328
 329         return &geom[minor];
 330 }
 331
 332 static void
 333 tda19988_blk_other(message * m, int ipc_status)
 334 {
 335         log_trace(&log, "tda19988_blk_other(0x%x)\n", m->m_type);
 336
 337         if (is_ipc_notify(ipc_status)) {
 338                 if (m->m_source == DS_PROC_NR) {
 339                         log_debug(&log,
 340                             "bus driver changed state, update endpoint\n");
 341                         i2cdriver_handle_bus_update(&cec_bus_endpoint, cec_bus,
 342                             cec_address);
 343                         i2cdriver_handle_bus_update(&hdmi_bus_endpoint,
 344                             hdmi_bus, hdmi_address);
 345                 }
 346         } else {
 347                 log_warn(&log, "Invalid message type (0x%x)\n", m->m_type);
 348         }
 349 }
 350
 351 /*
 352  * Check to see if a display is connected.
 353  * Returns 1 for yes, 0 for no, -1 for error.
 354  */
 355 static int
 356 is_display_connected(void)
 357 {
 358         int r;
 359         uint8_t val;
 360
 361         r = i2creg_read8(cec_bus_endpoint, cec_address, CEC_STATUS_REG, &val);
 362         if (r != OK) {
 363                 log_warn(&log, "Reading connection status failed (r=%d)\n", r);
 364                 return -1;
 365         }
 366
 367         if ((CEC_STATUS_CONNECTED_MASK & val) == 0) {
 368                 log_debug(&log, "No Display Detected\n");
 369                 return 0;
 370         } else {
 371                 log_debug(&log, "Display Detected\n");
 372                 return 1;
 373         }
 374 }
 375
 376 /*
 377  * Enable all the modules and clocks.
 378  */
 379 static int
 380 enable_hdmi_module(void)
 381 {
 382         int r;
 383
 384         r = i2creg_write8(cec_bus_endpoint, cec_address, CEC_ENABLE_REG,
 385             CEC_ENABLE_ALL_MASK);
 386         if (r != OK) {
 387                 log_warn(&log, "Writing enable bits failed (r=%d)\n", r);
 388                 return -1;
 389         }
 390
 391         log_debug(&log, "HDMI module enabled\n");
 392
 393         return OK;
 394 }
 395
 396 static int
 397 set_page(uint8_t page)
 398 {
 399         int r;
 400         static int current_page = HDMI_PAGELESS;
 401
 402         if (page != current_page) {
 403
 404                 r = i2creg_write8(hdmi_bus_endpoint, hdmi_address,
 405                     HDMI_PAGE_SELECT_REG, page);
 406                 if (r != OK) {
 407                         return r;
 408                 }
 409
 410                 current_page = page;
 411         }
 412
 413         return OK;
 414 }
 415
 416 static int
 417 hdmi_read_block(uint8_t page, uint8_t reg, uint8_t * buf, size_t buflen)
 418 {
 419
 420         int r;
 421         minix_i2c_ioctl_exec_t ioctl_exec;
 422
 423         if (buf == NULL || buflen > I2C_EXEC_MAX_BUFLEN) {
 424                 log_warn(&log,
 425                     "Read block called with NULL pointer or invalid buflen.\n");
 426                 return EINVAL;
 427         }
 428
 429         if (page != HDMI_PAGELESS) {
 430                 r = set_page(page);
 431                 if (r != OK) {
 432                         log_warn(&log, "Unable to set page to 0x%x\n", page);
 433                         return r;
 434                 }
 435         }
 436
 437         memset(&ioctl_exec, '\0', sizeof(minix_i2c_ioctl_exec_t));
 438
 439         /* Read from HDMI */
 440         ioctl_exec.iie_op = I2C_OP_READ_WITH_STOP;
 441         ioctl_exec.iie_addr = hdmi_address;
 442
 443         /* write the register address */
 444         ioctl_exec.iie_cmd[0] = reg;
 445         ioctl_exec.iie_cmdlen = 1;
 446
 447         /* read bytes */
 448         ioctl_exec.iie_buflen = buflen;
 449
 450         r = i2cdriver_exec(hdmi_bus_endpoint, &ioctl_exec);
 451         if (r != OK) {
 452                 log_warn(&log, "hdmi_read() failed (r=%d)\n", r);
 453                 return -1;
 454         }
 455
 456         memcpy(buf, ioctl_exec.iie_buf, buflen);
 457
 458         log_trace(&log, "Read %d bytes from reg 0x%x in page 0x%x\n", buflen,
 459             reg, page);
 460
 461         return OK;
 462 }
 463
 464 static int
 465 hdmi_read(uint8_t page, uint8_t reg, uint8_t * val)
 466 {
 467
 468         int r;
 469
 470         if (val == NULL) {
 471                 log_warn(&log, "Read called with NULL pointer\n");
 472                 return EINVAL;
 473         }
 474
 475         if (page != HDMI_PAGELESS) {
 476                 r = set_page(page);
 477                 if (r != OK) {
 478                         log_warn(&log, "Unable to set page to 0x%x\n", page);
 479                         return r;
 480                 }
 481         }
 482
 483         r = i2creg_read8(hdmi_bus_endpoint, hdmi_address, reg, val);
 484         if (r != OK) {
 485                 log_warn(&log, "hdmi_read() failed (r=%d)\n", r);
 486                 return -1;
 487         }
 488
 489         log_trace(&log, "Read 0x%x from reg 0x%x in page 0x%x\n", *val, reg,
 490             page);
 491
 492         return OK;
 493 }
 494
 495 static int
 496 hdmi_write(uint8_t page, uint8_t reg, uint8_t val)
 497 {
 498         int r;
 499
 500         if (page != HDMI_PAGELESS) {
 501                 r = set_page(page);
 502                 if (r != OK) {
 503                         log_warn(&log, "Unable to set page to 0x%x\n", page);
 504                         return r;
 505                 }
 506         }
 507
 508         r = i2creg_write8(hdmi_bus_endpoint, hdmi_address, reg, val);
 509         if (r != OK) {
 510                 log_warn(&log, "hdmi_write() failed (r=%d)\n", r);
 511                 return -1;
 512         }
 513
 514         log_trace(&log, "Successfully wrote 0x%x to reg 0x%x in page 0x%x\n",
 515             val, reg, page);
 516
 517         return OK;
 518 }
 519
 520 static int
 521 hdmi_set(uint8_t page, uint8_t reg, uint8_t mask)
 522 {
 523
 524         int r;
 525         uint8_t val;
 526
 527         val = 0x00;
 528
 529         r = hdmi_read(page, reg, &val);
 530         if (r != OK) {
 531                 return r;
 532         }
 533
 534         val |= mask;
 535
 536         r = hdmi_write(page, reg, val);
 537         if (r != OK) {
 538                 return r;
 539         }
 540
 541         return OK;
 542 }
 543
 544 static int
 545 hdmi_clear(uint8_t page, uint8_t reg, uint8_t mask)
 546 {
 547
 548         int r;
 549         uint8_t val;
 550
 551         val = 0x00;
 552
 553         r = hdmi_read(page, reg, &val);
 554         if (r != OK) {
 555                 return r;
 556         }
 557
 558         val &= ~mask;
 559
 560         r = hdmi_write(page, reg, val);
 561         if (r != OK) {
 562                 return r;
 563         }
 564
 565         return OK;
 566 }
 567
 568 static int
 569 check_revision(void)
 570 {
 571         int r;
 572         uint8_t rev_lo;
 573         uint8_t rev_hi;
 574         uint16_t revision;
 575
 576         r = hdmi_read(HDMI_CTRL_PAGE, HDMI_CTRL_REV_LO_REG, &rev_lo);
 577         if (r != OK) {
 578                 log_warn(&log, "Failed to read rev_lo (r=%d)\n", r);
 579                 return -1;
 580         }
 581
 582         r = hdmi_read(HDMI_CTRL_PAGE, HDMI_CTRL_REV_HI_REG, &rev_hi);
 583         if (r != OK) {
 584                 log_warn(&log, "Failed to read rev_hi (r=%d)\n", r);
 585                 return -1;
 586         }
 587
 588         revision = ((rev_hi << 8) | rev_lo);
 589         if (revision != HDMI_REV_TDA19988) {
 590
 591                 log_warn(&log, "Unrecognized value in revision registers.\n");
 592                 log_warn(&log, "Read: 0x%x | Expected: 0x%x\n", revision,
 593                     HDMI_REV_TDA19988);
 594                 return -1;
 595         }
 596
 597         log_debug(&log, "Device Revision: 0x%x\n", revision);
 598
 599         return OK;
 600 }
 601
 602 static int
 603 hdmi_ddc_enable(void)
 604 {
 605         int r;
 606
 607         /* Soft Reset DDC Bus */
 608         r = hdmi_set(HDMI_CTRL_PAGE, HDMI_CTRL_RESET_REG,
 609             HDMI_CTRL_RESET_DDC_MASK);
 610         if (r != OK) {
 611                 return r;
 612         }
 613         micro_delay(100000);
 614         r = hdmi_clear(HDMI_CTRL_PAGE, HDMI_CTRL_RESET_REG,
 615             HDMI_CTRL_RESET_DDC_MASK);
 616         if (r != OK) {
 617                 return r;
 618         }
 619         micro_delay(100000);
 620
 621         /* Enable DDC */
 622         r = hdmi_write(HDMI_CTRL_PAGE, HDMI_CTRL_DDC_CTRL_REG,
 623             HDMI_CTRL_DDC_EN_MASK);
 624         if (r != OK) {
 625                 return r;
 626         }
 627
 628         /* Setup the clock (I think) */
 629         r = hdmi_write(HDMI_CTRL_PAGE, HDMI_CTRL_DDC_CLK_REG,
 630             HDMI_CTRL_DDC_CLK_EN_MASK);
 631         if (r != OK) {
 632                 return r;
 633         }
 634
 635         r = hdmi_write(HDMI_HDCP_OTP_PAGE, HDMI_HDCP_OTP_DDC_CLK_REG,
 636             HDMI_HDCP_OTP_DDC_CLK_MASK);
 637         if (r != OK) {
 638                 return r;
 639         }
 640         log_debug(&log, "DDC Enabled\n");
 641
 642         return OK;
 643 }
 644
 645 static int
 646 hdmi_init(void)
 647 {
 648         int r;
 649
 650         /* Turn on HDMI module (slave 0x70) */
 651         r = enable_hdmi_module();
 652         if (r != OK) {
 653                 log_warn(&log, "HDMI Module Init Failed\n");
 654                 return -1;
 655         }
 656
 657         /* Read chip version to ensure compatibility */
 658         r = check_revision();
 659         if (r != OK) {
 660                 log_warn(&log, "Couldn't find expected TDA19988 revision\n");
 661                 return -1;
 662         }
 663
 664         /* Turn on DDC interface between TDA19988 and display */
 665         r = hdmi_ddc_enable();
 666         if (r != OK) {
 667                 log_warn(&log, "Failed to enable DDC\n");
 668                 return -1;
 669         }
 670
 671         return OK;
 672 }
 673
 674 static int
 675 read_edid(uint8_t * buf, size_t count)
 676 {
 677         int r;
 678         int i, j;
 679         int tries;
 680         int edid_ready;
 681         uint8_t val;
 682
 683         log_debug(&log, "Reading edid...\n");
 684
 685         if (buf == NULL || count < EDID_LEN) {
 686                 log_warn(&log, "Expected 128 byte data buffer\n");
 687                 return -1;
 688         }
 689
 690         r = hdmi_clear(HDMI_HDCP_OTP_PAGE, HDMI_HDCP_OTP_SOME_REG,
 691             HDMI_HDCP_OTP_SOME_MASK);
 692         if (r != OK) {
 693                 log_warn(&log, "Failed to clear bit in HDCP OTP reg\n");
 694                 return -1;
 695         }
 696
 697         /* Enable EDID Block Read Interrupt */
 698         r = hdmi_set(HDMI_CTRL_PAGE, HDMI_CTRL_INT_REG,
 699             HDMI_CTRL_INT_EDID_MASK);
 700         if (r != OK) {
 701                 log_warn(&log, "Failed to enable EDID Block Read interrupt\n");
 702                 return -1;
 703         }
 704
 705         /* enable global interrupts */
 706         r = hdmi_write(HDMI_CTRL_PAGE, HDMI_CTRL_INTR_CTRL_REG,
 707             HDMI_CTRL_INTR_EN_GLO_MASK);
 708         if (r != OK) {
 709                 log_warn(&log, "Failed to enable interrupts\n");
 710                 return -1;
 711         }
 712
 713         /* Set Device Address */
 714         r = hdmi_write(HDMI_EDID_PAGE, HDMI_EDID_DEV_ADDR_REG,
 715             HDMI_EDID_DEV_ADDR);
 716         if (r != OK) {
 717                 log_warn(&log, "Couldn't set device address\n");
 718                 return -1;
 719         }
 720
 721         /* Set Offset */
 722         r = hdmi_write(HDMI_EDID_PAGE, HDMI_EDID_OFFSET_REG, HDMI_EDID_OFFSET);
 723         if (r != OK) {
 724                 log_warn(&log, "Couldn't set offset\n");
 725                 return -1;
 726         }
 727
 728         /* Set Segment Pointer Address */
 729         r = hdmi_write(HDMI_EDID_PAGE, HDMI_EDID_SEG_PTR_ADDR_REG,
 730             HDMI_EDID_SEG_PTR_ADDR);
 731         if (r != OK) {
 732                 log_warn(&log, "Couldn't set segment pointer address\n");
 733                 return -1;
 734         }
 735
 736         /* Set Segment Address */
 737         r = hdmi_write(HDMI_EDID_PAGE, HDMI_EDID_SEG_ADDR_REG,
 738             HDMI_EDID_SEG_ADDR);
 739         if (r != OK) {
 740                 log_warn(&log, "Couldn't set segment address\n");
 741                 return -1;
 742         }
 743
 744         /*
 745          * Toggle EDID Read Request Bit to request a read.
 746          */
 747
 748         r = hdmi_write(HDMI_EDID_PAGE, HDMI_EDID_REQ_REG,
 749             HDMI_EDID_REQ_READ_MASK);
 750         if (r != OK) {
 751                 log_warn(&log, "Couldn't set Read Request bit\n");
 752                 return -1;
 753         }
 754
 755         r = hdmi_write(HDMI_EDID_PAGE, HDMI_EDID_REQ_REG, 0x00);
 756         if (r != OK) {
 757                 log_warn(&log, "Couldn't clear Read Request bit\n");
 758                 return -1;
 759         }
 760
 761         log_debug(&log, "Starting polling\n");
 762
 763         /* poll interrupt status flag */
 764         edid_ready = 0;
 765         for (tries = 0; tries < 100; tries++) {
 766
 767                 r = hdmi_read(HDMI_CTRL_PAGE, HDMI_CTRL_INT_REG, &val);
 768                 if (r != OK) {
 769                         log_warn(&log, "Read failed while polling int flag\n");
 770                         return -1;
 771                 }
 772
 773                 if (val & HDMI_CTRL_INT_EDID_MASK) {
 774                         log_debug(&log, "Mask Set\n");
 775                         edid_ready = 1;
 776                         break;
 777                 }
 778
 779                 micro_delay(1000);
 780         }
 781
 782         if (!edid_ready) {
 783                 log_warn(&log, "Data Ready interrupt never fired.\n");
 784                 return EBUSY;
 785         }
 786
 787         log_debug(&log, "Ready to read\n");
 788
 789         /* Finally, perform the read. */
 790         memset(buf, '\0', count);
 791         r = hdmi_read_block(HDMI_EDID_PAGE, HDMI_EDID_DATA_REG, buf, EDID_LEN);
 792         if (r != OK) {
 793                 log_warn(&log, "Failed to read EDID data\n");
 794                 return -1;
 795         }
 796
 797         /* Disable EDID Block Read Interrupt */
 798         r = hdmi_clear(HDMI_CTRL_PAGE, HDMI_CTRL_INT_REG,
 799             HDMI_CTRL_INT_EDID_MASK);
 800         if (r != OK) {
 801                 log_warn(&log,
 802                     "Failed to disable EDID Block Read interrupt\n");
 803                 return -1;
 804         }
 805
 806         r = hdmi_set(HDMI_HDCP_OTP_PAGE, HDMI_HDCP_OTP_SOME_REG,
 807             HDMI_HDCP_OTP_SOME_MASK);
 808         if (r != OK) {
 809                 log_warn(&log, "Failed to set bit in HDCP/OTP reg\n");
 810                 return -1;
 811         }
 812
 813         log_debug(&log, "Done EDID Reading\n");
 814
 815         return OK;
 816 }
 817
 818 static int
 819 sef_cb_lu_state_save(int UNUSED(result), int UNUSED(flags))
 820 {
 821         ds_publish_u32("cec_bus", cec_bus, DSF_OVERWRITE);
 822         ds_publish_u32("hdmi_bus", hdmi_bus, DSF_OVERWRITE);
 823         ds_publish_u32("cec_address", cec_address, DSF_OVERWRITE);
 824         ds_publish_u32("hdmi_address", hdmi_address, DSF_OVERWRITE);
 825         return OK;
 826 }
 827
 828 static int
 829 lu_state_restore(void)
 830 {
 831         /* Restore the state. */
 832         u32_t value;
 833
 834         ds_retrieve_u32("cec_bus", &value);
 835         ds_delete_u32("cec_bus");
 836         cec_bus = (int) value;
 837
 838         ds_retrieve_u32("hdmi_bus", &value);
 839         ds_delete_u32("hdmi_bus");
 840         hdmi_bus = (int) value;
 841
 842         ds_retrieve_u32("cec_address", &value);
 843         ds_delete_u32("cec_address");
 844         cec_address = (int) value;
 845
 846         ds_retrieve_u32("hdmi_address", &value);
 847         ds_delete_u32("hdmi_address");
 848         hdmi_address = (int) value;
 849
 850         return OK;
 851 }
 852
 853 static int
 854 sef_cb_init(int type, sef_init_info_t * UNUSED(info))
 855 {
 856         int r;
 857
 858         if (type == SEF_INIT_LU) {
 859                 /* Restore the state. */
 860                 lu_state_restore();
 861         }
 862
 863         geom[TDA19988_DEV].dv_base = ((u64_t) (0));
 864         geom[TDA19988_DEV].dv_size = ((u64_t) (128));
 865
 866         /*
 867          * CEC Module
 868          */
 869
 870         /* look-up the endpoint for the bus driver */
 871         cec_bus_endpoint = i2cdriver_bus_endpoint(cec_bus);
 872         if (cec_bus_endpoint == 0) {
 873                 log_warn(&log, "Couldn't find bus driver.\n");
 874                 return EXIT_FAILURE;
 875         }
 876
 877         /* claim the device */
 878         r = i2cdriver_reserve_device(cec_bus_endpoint, cec_address);
 879         if (r != OK) {
 880                 log_warn(&log, "Couldn't reserve device 0x%x (r=%d)\n",
 881                     cec_address, r);
 882                 return EXIT_FAILURE;
 883         }
 884
 885         /*
 886          * HDMI Module
 887          */
 888
 889         /* look-up the endpoint for the bus driver */
 890         hdmi_bus_endpoint = i2cdriver_bus_endpoint(hdmi_bus);
 891         if (hdmi_bus_endpoint == 0) {
 892                 log_warn(&log, "Couldn't find bus driver.\n");
 893                 return EXIT_FAILURE;
 894         }
 895
 896         /* claim the device */
 897         r = i2cdriver_reserve_device(hdmi_bus_endpoint, hdmi_address);
 898         if (r != OK) {
 899                 log_warn(&log, "Couldn't reserve device 0x%x (r=%d)\n",
 900                     hdmi_address, r);
 901                 return EXIT_FAILURE;
 902         }
 903
 904         if (type != SEF_INIT_LU) {
 905
 906                 /* sign up for updates about the i2c bus going down/up */
 907                 r = i2cdriver_subscribe_bus_updates(cec_bus);
 908                 if (r != OK) {
 909                         log_warn(&log, "Couldn't subscribe to bus updates\n");
 910                         return EXIT_FAILURE;
 911                 }
 912
 913                 /* sign up for updates about the i2c bus going down/up */
 914                 r = i2cdriver_subscribe_bus_updates(hdmi_bus);
 915                 if (r != OK) {
 916                         log_warn(&log, "Couldn't subscribe to bus updates\n");
 917                         return EXIT_FAILURE;
 918                 }
 919
 920                 i2cdriver_announce(cec_bus);
 921                 if (cec_bus != hdmi_bus) {
 922                         i2cdriver_announce(hdmi_bus);
 923                 }
 924
 925                 blockdriver_announce(type);
 926                 log_trace(&log, "announced\n");
 927         }
 928
 929         return OK;
 930 }
 931
 932 static void
 933 sef_local_startup(void)
 934 {
 935         /*
 936          * Register init callbacks. Use the same function for all event types
 937          */
 938         sef_setcb_init_fresh(sef_cb_init);
 939         sef_setcb_init_lu(sef_cb_init);
 940         sef_setcb_init_restart(sef_cb_init);
 941
 942         /*
 943          * Register live update callbacks.
 944          */
 945         sef_setcb_lu_state_save(sef_cb_lu_state_save);
 946
 947         /* Let SEF perform startup. */
 948         sef_startup();
 949 }
 950
 951 static int
 952 tda19988_env_parse()
 953 {
 954         int r;
 955         long int cec_busl;
 956         long int cec_addressl;
 957         long int hdmi_busl;
 958         long int hdmi_addressl;
 959
 960         r = env_parse("cec_bus", "d", 0, &cec_busl, 1, 3);
 961         if (r != EP_SET) {
 962                 return -1;
 963         }
 964         cec_bus = (uint32_t) cec_busl;
 965
 966         r = env_parse("cec_address", "x", 0, &cec_addressl, 0x34, 0x37);
 967         if (r != EP_SET) {
 968                 return -1;
 969         }
 970         cec_address = (i2c_addr_t) cec_addressl;
 971
 972         r = env_parse("hdmi_bus", "d", 0, &hdmi_busl, 1, 3);
 973         if (r != EP_SET) {
 974                 return -1;
 975         }
 976         hdmi_bus = (uint32_t) hdmi_busl;
 977
 978         r = env_parse("hdmi_address", "x", 0, &hdmi_addressl, 0x70, 0x73);
 979         if (r != EP_SET) {
 980                 return -1;
 981         }
 982         hdmi_address = (i2c_addr_t) hdmi_addressl;
 983
 984         return OK;
 985 }
 986
 987 int
 988 main(int argc, char *argv[])
 989 {
 990         int r;
 991
 992         env_setargs(argc, argv);
 993
 994         r = tda19988_env_parse();
 995         if (r < 0) {
 996                 log_warn(&log,
 997                     "Expecting -args 'cec_bus=X cec_address=0xAA hdmi_bus=Y hdmi_address=0xBB'\n");
 998                 log_warn(&log,
 999                     "Example -args 'cec_bus=1 cec_address=0x34 hdmi_bus=1 hdmi_address=0x70'\n");
1000                 return EXIT_FAILURE;
1001         }
1002
1003         sef_local_startup();
1004
1005         log_debug(&log, "Startup Complete\n");
1006         blockdriver_task(&tda19988_tab);
1007         log_debug(&log, "Shutting down\n");
1008
1009         return OK;
1010 }