arm: make signal handlers work
[minix.git] / sys / arch / i386 / include / npx.h
blob08b9c43cc740cda6de4ef085a54273cbd98ae78d
1 /* $NetBSD: npx.h,v 1.25 2010/07/31 21:47:54 joerg Exp $ */
3 /*-
4 * Copyright (c) 1990 The Regents of the University of California.
5 * All rights reserved.
7 * This code is derived from software contributed to Berkeley by
8 * William Jolitz.
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. Neither the name of the University nor the names of its contributors
19 * may be used to endorse or promote products derived from this software
20 * without specific prior written permission.
22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * SUCH DAMAGE.
34 * @(#)npx.h 5.3 (Berkeley) 1/18/91
38 * 287/387 NPX Coprocessor Data Structures and Constants
39 * W. Jolitz 1/90
42 #ifndef _I386_NPX_H_
43 #define _I386_NPX_H_
45 #ifndef __minix
46 /* Environment information of floating point unit */
47 struct env87 {
48 long en_cw; /* control word (16bits) */
49 long en_sw; /* status word (16bits) */
50 long en_tw; /* tag word (16bits) */
51 long en_fip; /* floating point instruction pointer */
52 uint16_t en_fcs; /* floating code segment selector */
53 uint16_t en_opcode; /* opcode last executed (11 bits ) */
54 long en_foo; /* floating operand offset */
55 long en_fos; /* floating operand segment selector */
58 /* Contents of each floating point accumulator */
59 struct fpacc87 {
60 #ifdef dontdef /* too unportable */
61 uint32_t fp_mantlo; /* mantissa low (31:0) */
62 uint32_t fp_manthi; /* mantissa high (63:32) */
63 int fp_exp:15; /* exponent */
64 int fp_sgn:1; /* mantissa sign */
65 #else
66 uint8_t fp_bytes[10];
67 #endif
70 /* Floating point context */
71 struct save87 {
72 struct env87 sv_env; /* floating point control/status */
73 struct fpacc87 sv_ac[8]; /* accumulator contents, 0-7 */
74 #ifndef dontdef
75 uint32_t sv_ex_sw; /* status word for last exception (was pad) */
76 uint32_t sv_ex_tw; /* tag word for last exception (was pad) */
77 uint8_t sv_pad[8 * 2 - 2 * 4]; /* bogus historical padding */
78 #endif
81 /* Environment of FPU/MMX/SSE/SSE2. */
82 struct envxmm {
83 /*0*/ uint16_t en_cw; /* FPU Control Word */
84 uint16_t en_sw; /* FPU Status Word */
85 uint8_t en_tw; /* FPU Tag Word (abridged) */
86 uint8_t en_rsvd0;
87 uint16_t en_opcode; /* FPU Opcode */
88 uint32_t en_fip; /* FPU Instruction Pointer */
89 uint16_t en_fcs; /* FPU IP selector */
90 uint16_t en_rsvd1;
91 /*16*/ uint32_t en_foo; /* FPU Data pointer */
92 uint16_t en_fos; /* FPU Data pointer selector */
93 uint16_t en_rsvd2;
94 uint32_t en_mxcsr; /* MXCSR Register State */
95 uint32_t en_rsvd3;
98 /* FPU regsters in the extended save format. */
99 struct fpaccxmm {
100 uint8_t fp_bytes[10];
101 uint8_t fp_rsvd[6];
104 /* SSE/SSE2 registers. */
105 struct xmmreg {
106 uint8_t sse_bytes[16];
109 /* FPU/MMX/SSE/SSE2 context */
110 struct savexmm {
111 struct envxmm sv_env; /* control/status context */
112 struct fpaccxmm sv_ac[8]; /* ST/MM regs */
113 struct xmmreg sv_xmmregs[8]; /* XMM regs */
114 uint8_t sv_rsvd[16 * 14];
115 /* 512-bytes --- end of hardware portion of save area */
116 uint32_t sv_ex_sw; /* saved SW from last exception */
117 uint32_t sv_ex_tw; /* saved TW from last exception */
118 } __aligned(16);
120 union savefpu {
121 struct save87 sv_87;
122 struct savexmm sv_xmm;
124 #endif /* !__minix */
127 * The i387 defaults to Intel extended precision mode and round to nearest,
128 * with all exceptions masked.
130 #define __INITIAL_NPXCW__ 0x037f
131 /* NetBSD uses IEEE double precision. */
132 #define __NetBSD_NPXCW__ 0x127f
133 /* FreeBSD leaves some exceptions unmasked as well. */
134 #define __FreeBSD_NPXCW__ 0x1272
135 /* iBCS2 goes a bit further and leaves the underflow exception unmasked. */
136 #define __iBCS2_NPXCW__ 0x0262
137 /* Linux just uses the default control word. */
138 #define __Linux_NPXCW__ 0x037f
139 /* SVR4 uses the same control word as iBCS2. */
140 #define __SVR4_NPXCW__ 0x0262
143 * The default MXCSR value at reset is 0x1f80, IA-32 Instruction
144 * Set Reference, pg. 3-369.
146 #define __INITIAL_MXCSR__ 0x1f80
150 * 80387 control word bits
152 #define EN_SW_INVOP 0x0001 /* Invalid operation */
153 #define EN_SW_DENORM 0x0002 /* Denormalized operand */
154 #define EN_SW_ZERODIV 0x0004 /* Divide by zero */
155 #define EN_SW_OVERFLOW 0x0008 /* Overflow */
156 #define EN_SW_UNDERFLOW 0x0010 /* Underflow */
157 #define EN_SW_PRECLOSS 0x0020 /* Loss of precision */
158 #define EN_SW_DATACHAIN 0x0080 /* Data chain exception */
159 #define EN_SW_CTL_PREC 0x0300 /* Precision control */
160 #define EN_SW_CTL_ROUND 0x0c00 /* Rounding control */
161 #define EN_SW_CTL_INF 0x1000 /* Infinity control */
164 * The standard control word from finit is 0x37F, giving:
165 * round to nearest
166 * 64-bit precision
167 * all exceptions masked.
169 * Now we want:
170 * affine mode (if we decide to support 287's)
171 * round to nearest
172 * 53-bit precision
173 * all exceptions masked.
175 * 64-bit precision often gives bad results with high level languages
176 * because it makes the results of calculations depend on whether
177 * intermediate values are stored in memory or in FPU registers.
179 * The iBCS control word has underflow, overflow, zero divide, and invalid
180 * operation exceptions unmasked. But that causes an unexpected exception
181 * in the test program 'paranoia' and makes denormals useless (DBL_MIN / 2
182 * underflows). It doesn't make a lot of sense to trap underflow without
183 * trapping denormals.
186 #ifdef _KERNEL
188 void probeintr(void);
189 void probetrap(void);
190 int npx586bug1(int, int);
191 void npxinit(struct cpu_info *);
192 void process_xmm_to_s87(const struct savexmm *, struct save87 *);
193 void process_s87_to_xmm(const struct save87 *, struct savexmm *);
194 struct lwp;
195 int npxtrap(struct lwp *);
197 #endif
199 #endif /* !_I386_NPX_H_ */