arm: make signal handlers work
[minix.git] / sys / arch / x86 / include / cputypes.h
blobf97ac554701d3ab788c048b6c621cdc8e4508384
1 /* $NetBSD: cputypes.h,v 1.3 2011/01/27 18:44:40 bouyer Exp $ */
3 /*
4 * Copyright (c) 1993 Christopher G. Demetriou
5 * All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 * Classes of Processor. CPU identification code depends on
32 * this starting at 0, and having an increment of one.
35 #define CPUCLASS_386 0
36 #define CPUCLASS_486 1
37 #define CPUCLASS_586 2
38 #define CPUCLASS_686 3
41 * Kinds of Processor. Only the first 7 are used, as they are processors
42 * that might not have a cpuid instruction.
45 #define CPU_386SX 0 /* Intel 80386SX */
46 #define CPU_386 1 /* Intel 80386DX */
47 #define CPU_486SX 2 /* Intel 80486SX */
48 #define CPU_486 3 /* Intel 80486DX */
49 #define CPU_486DLC 4 /* Cyrix 486DLC */
50 #define CPU_6x86 5 /* Cyrix/IBM 6x86 */
51 #define CPU_NX586 6 /* NexGen 586 */
52 #define CPU_586 7 /* Intel P.....m (I hate lawyers; it's TM) */
53 #define CPU_AM586 8 /* AMD Am486 and Am5x86 */
54 #define CPU_K5 9 /* AMD K5 */
55 #define CPU_K6 10 /* NexGen 686 aka AMD K6 */
56 #define CPU_686 11 /* Intel Pentium Pro */
57 #define CPU_C6 12 /* IDT WinChip C6 */
58 #define CPU_TMX86 13 /* Transmeta TMx86 */
61 * CPU vendors
64 #define CPUVENDOR_UNKNOWN 0
65 #define CPUVENDOR_INTEL 1
66 #define CPUVENDOR_CYRIX 2
67 #define CPUVENDOR_NEXGEN 3
68 #define CPUVENDOR_AMD 4
69 #define CPUVENDOR_IDT 5
70 #define CPUVENDOR_TRANSMETA 6
71 #define CPUVENDOR_VORTEX86 7
74 * Some other defines, dealing with values returned by cpuid.
77 #define CPU_MAXMODEL 15 /* Models within family range 0-15 */
78 #define CPU_DEFMODEL 16 /* Value for unknown model -> default */
79 #define CPU_MINFAMILY 4 /* Lowest that cpuid can return (486) */
80 #define CPU_MAXFAMILY 7 /* Highest consecutive # we know (fake P4) */
81 #define CPU_FAMILY_P4 15 /* Family number for Pentium 4 */