arm: make signal handlers work
[minix.git] / sys / arch / x86 / include / i82093var.h
bloba3ae23b51e0c584b9d51eef5cd8ff275c7c0231c
1 /* $NetBSD: i82093var.h,v 1.12 2012/06/15 13:55:22 yamt Exp $ */
3 /*-
4 * Copyright (c) 2000 The NetBSD Foundation, Inc.
5 * All rights reserved.
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by RedBack Networks Inc.
10 * Author: Bill Sommerfeld
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
34 #ifndef _X86_I82093VAR_H_
35 #define _X86_I82093VAR_H_
37 #include <sys/device.h>
38 #include <machine/apicvar.h>
40 struct ioapic_pin
42 struct ioapic_pin *ip_next; /* next pin on this vector */
43 struct mp_intr_map *ip_map;
44 int ip_vector; /* IDT vector */
45 int ip_type;
46 struct cpu_info *ip_cpu; /* target CPU */
49 struct ioapic_softc {
50 device_t sc_dev;
51 struct pic sc_pic;
52 struct ioapic_softc *sc_next;
53 int sc_apicid;
54 int sc_apic_vers;
55 int sc_apic_vecbase; /* global int base if ACPI */
56 int sc_apic_sz; /* apic size*/
57 int sc_flags;
58 paddr_t sc_pa; /* PA of ioapic */
59 volatile uint32_t *sc_reg; /* KVA of ioapic addr */
60 volatile uint32_t *sc_data; /* KVA of ioapic data */
61 struct ioapic_pin *sc_pins; /* sc_apic_sz entries */
62 };
65 * MP: intr_handle_t is bitfielded.
66 * ih&0xff -> legacy irq number.
67 * ih&0x10000000 -> if 0, old-style isa irq; if 1, routed via ioapic.
68 * (ih&0xff0000)>>16 -> ioapic id.
69 * (ih&0x00ff00)>>8 -> ioapic pin.
71 * 0x80000000 is used by pci_intr_machdep.c for MPSAFE_MASK
74 #define APIC_INT_VIA_APIC 0x10000000
75 #define APIC_INT_APIC_MASK 0x00ff0000
76 #define APIC_INT_APIC_SHIFT 16
77 #define APIC_INT_PIN_MASK 0x0000ff00
78 #define APIC_INT_PIN_SHIFT 8
80 #define APIC_IRQ_APIC(x) ((x & APIC_INT_APIC_MASK) >> APIC_INT_APIC_SHIFT)
81 #define APIC_IRQ_PIN(x) ((x & APIC_INT_PIN_MASK) >> APIC_INT_PIN_SHIFT)
82 #define APIC_IRQ_ISLEGACY(x) (!((x) & APIC_INT_VIA_APIC))
83 #define APIC_IRQ_LEGACY_IRQ(x) ((x) & 0xff)
85 void ioapic_print_redir(struct ioapic_softc *, const char *, int);
86 void ioapic_format_redir(char *, const char *, int, uint32_t, uint32_t);
87 struct ioapic_softc *ioapic_find(int);
88 struct ioapic_softc *ioapic_find_bybase(int);
90 void ioapic_enable(void);
91 void ioapic_reenable(void);
93 extern int nioapics;
94 extern struct ioapic_softc *ioapics;
96 #endif /* !_X86_I82093VAR_H_ */