include/minix/padconf.h

   1 #ifndef __PADCONF_H__
   2 #define __PADCONF_H__
   3
   4 #define PADCONF_REGISTERS_BASE 0x48002030
   5
   6 #define PADCONF_MUXMODE(X)  (X & 0x7)   /* mode 1 til 7 [2:0] */
   7 #define PADCONF_PULL_MODE(X)  ((X & 0x3) << 3)  /* 2 bits[4:3] */
   8 #define PADCONF_PULL_MODE_PD_DIS PADCONF_PULL_MODE(0)   /* pull down disabled */
   9 #define PADCONF_PULL_MODE_PD_EN PADCONF_PULL_MODE(1)    /* pull down enabled */
  10 #define PADCONF_PULL_MODE_PU_DIS PADCONF_PULL_MODE(2)   /* pull up enabled */
  11 #define PADCONF_PULL_MODE_PU_EN PADCONF_PULL_MODE(3)    /* pull up enabled */
  12 #define PADCONF_INPUT_ENABLE(X)  ((X & 0x1) << 8)       /* 1 bits[8] */
  13 #define PADCONF_OFF_MODE(X)  ((X & 0xFE) << 9)  /* 5 bits[13:9] */
  14
  15 /* padconf pin definitions */
  16 #define CONTROL_PADCONF_SDRC_D0 (0x00000000)
  17 #define CONTROL_PADCONF_SDRC_D2 (0x00000004)
  18 #define CONTROL_PADCONF_SDRC_D4 (0x00000008)
  19 #define CONTROL_PADCONF_SDRC_D6 (0x0000000C)
  20 #define CONTROL_PADCONF_SDRC_D8 (0x00000010)
  21 #define CONTROL_PADCONF_SDRC_D10 (0x00000014)
  22 #define CONTROL_PADCONF_SDRC_D12 (0x00000018)
  23 #define CONTROL_PADCONF_SDRC_D14 (0x0000001C)
  24 #define CONTROL_PADCONF_SDRC_D16 (0x00000020)
  25 #define CONTROL_PADCONF_SDRC_D18 (0x00000024)
  26 #define CONTROL_PADCONF_SDRC_D20 (0x00000028)
  27 #define CONTROL_PADCONF_SDRC_D22 (0x0000002C)
  28 #define CONTROL_PADCONF_SDRC_D24 (0x00000030)
  29 #define CONTROL_PADCONF_SDRC_D26 (0x00000034)
  30 #define CONTROL_PADCONF_SDRC_D28 (0x00000038)
  31 #define CONTROL_PADCONF_SDRC_D30 (0x0000003C)
  32 #define CONTROL_PADCONF_SDRC_CLK (0x00000040)
  33 #define CONTROL_PADCONF_SDRC_DQS1 (0x00000044)
  34 #define CONTROL_PADCONF_SDRC_DQS3 (0x00000048)
  35 #define CONTROL_PADCONF_GPMC_A2 (0x0000004C)
  36 #define CONTROL_PADCONF_GPMC_A4 (0x00000050)
  37 #define CONTROL_PADCONF_GPMC_A6 (0x00000054)
  38 #define CONTROL_PADCONF_GPMC_A8 (0x00000058)
  39 #define CONTROL_PADCONF_GPMC_A10 (0x0000005C)
  40 #define CONTROL_PADCONF_GPMC_D1 (0x00000060)
  41 #define CONTROL_PADCONF_GPMC_D3 (0x00000064)
  42 #define CONTROL_PADCONF_GPMC_D5 (0x00000068)
  43 #define CONTROL_PADCONF_GPMC_D7 (0x0000006C)
  44 #define CONTROL_PADCONF_GPMC_D9 (0x00000070)
  45 #define CONTROL_PADCONF_GPMC_D11 (0x00000074)
  46 #define CONTROL_PADCONF_GPMC_D13 (0x00000078)
  47 #define CONTROL_PADCONF_GPMC_D15 (0x0000007C)
  48 #define CONTROL_PADCONF_GPMC_NCS1 (0x00000080)
  49 #define CONTROL_PADCONF_GPMC_NCS3 (0x00000084)
  50 #define CONTROL_PADCONF_GPMC_NCS5 (0x00000088)
  51 #define CONTROL_PADCONF_GPMC_NCS7 (0x0000008C)
  52 #define CONTROL_PADCONF_GPMC_NADV_ALE (0x00000090)
  53 #define CONTROL_PADCONF_GPMC_NWE (0x00000094)
  54 #define CONTROL_PADCONF_GPMC_NBE1 (0x00000098)
  55 #define CONTROL_PADCONF_GPMC_WAIT0 (0x0000009C)
  56 #define CONTROL_PADCONF_GPMC_WAIT2 (0x000000A0)
  57 #define CONTROL_PADCONF_DSS_PCLK (0x000000A4)
  58 #define CONTROL_PADCONF_DSS_VSYNC (0x000000A8)
  59 #define CONTROL_PADCONF_DSS_DATA0 (0x000000AC)
  60 #define CONTROL_PADCONF_DSS_DATA2 (0x000000B0)
  61 #define CONTROL_PADCONF_DSS_DATA4 (0x000000B4)
  62 #define CONTROL_PADCONF_DSS_DATA6 (0x000000B8)
  63 #define CONTROL_PADCONF_DSS_DATA8 (0x000000BC)
  64 #define CONTROL_PADCONF_DSS_DATA10 (0x000000C0)
  65 #define CONTROL_PADCONF_DSS_DATA12 (0x000000C4)
  66 #define CONTROL_PADCONF_DSS_DATA14 (0x000000C8)
  67 #define CONTROL_PADCONF_DSS_DATA16 (0x000000CC)
  68 #define CONTROL_PADCONF_DSS_DATA18 (0x000000D0)
  69 #define CONTROL_PADCONF_DSS_DATA20 (0x000000D4)
  70 #define CONTROL_PADCONF_DSS_DATA22 (0x000000D8)
  71 #define CONTROL_PADCONF_CAM_HS (0x000000DC)
  72 #define CONTROL_PADCONF_CAM_XCLKA (0x000000E0)
  73 #define CONTROL_PADCONF_CAM_FLD (0x000000E4)
  74 #define CONTROL_PADCONF_CAM_D1 (0x000000E8)
  75 #define CONTROL_PADCONF_CAM_D3 (0x000000EC)
  76 #define CONTROL_PADCONF_CAM_D5 (0x000000F0)
  77 #define CONTROL_PADCONF_CAM_D7 (0x000000F4)
  78 #define CONTROL_PADCONF_CAM_D9 (0x000000F8)
  79 #define CONTROL_PADCONF_CAM_D11 (0x000000FC)
  80 #define CONTROL_PADCONF_CAM_WEN (0x00000100)
  81 #define CONTROL_PADCONF_CSI2_DX0 (0x00000104)
  82 #define CONTROL_PADCONF_CSI2_DX1 (0x00000108)
  83 #define CONTROL_PADCONF_MCBSP2_FSX (0x0000010C)
  84 #define CONTROL_PADCONF_MCBSP2_DR (0x00000110)
  85 #define CONTROL_PADCONF_MMC1_CLK (0x00000114)
  86 #define CONTROL_PADCONF_MMC1_DAT0 (0x00000118)
  87 #define CONTROL_PADCONF_MMC1_DAT2 (0x0000011C)
  88 #define CONTROL_PADCONF_MMC2_CLK (0x00000128)
  89 #define CONTROL_PADCONF_MMC2_DAT0 (0x0000012C)
  90 #define CONTROL_PADCONF_MMC2_DAT2 (0x00000130)
  91 #define CONTROL_PADCONF_MMC2_DAT4 (0x00000134)
  92 #define CONTROL_PADCONF_MMC2_DAT6 (0x00000138)
  93 #define CONTROL_PADCONF_MCBSP3_DX (0x0000013C)
  94 #define CONTROL_PADCONF_MCBSP3_CLKX (0x00000140)
  95 #define CONTROL_PADCONF_UART2_CTS (0x00000144)
  96 #define CONTROL_PADCONF_UART2_TX (0x00000148)
  97 #define CONTROL_PADCONF_UART1_TX (0x0000014C)
  98 #define CONTROL_PADCONF_UART1_CTS (0x00000150)
  99 #define CONTROL_PADCONF_MCBSP4_CLKX (0x00000154)
 100 #define CONTROL_PADCONF_MCBSP4_DX (0x00000158)
 101 #define CONTROL_PADCONF_MCBSP1_CLKR (0x0000015C)
 102 #define CONTROL_PADCONF_MCBSP1_DX (0x00000160)
 103 #define CONTROL_PADCONF_MCBSP_CLKS (0x00000164)
 104 #define CONTROL_PADCONF_MCBSP1_CLKX (0x00000168)
 105 #define CONTROL_PADCONF_UART3_RTS_SD (0x0000016C)
 106 #define CONTROL_PADCONF_UART3_TX_IRTX (0x00000170)
 107 #define CONTROL_PADCONF_HSUSB0_STP (0x00000174)
 108 #define CONTROL_PADCONF_HSUSB0_NXT (0x00000178)
 109 #define CONTROL_PADCONF_HSUSB0_DATA1 (0x0000017C)
 110 #define CONTROL_PADCONF_HSUSB0_DATA3 (0x00000180)
 111 #define CONTROL_PADCONF_HSUSB0_DATA5 (0x00000184)
 112 #define CONTROL_PADCONF_HSUSB0_DATA7 (0x00000188)
 113 #define CONTROL_PADCONF_I2C1_SDA (0x0000018C)
 114 #define CONTROL_PADCONF_I2C2_SDA (0x00000190)
 115 #define CONTROL_PADCONF_I2C3_SDA (0x00000194)
 116 #define CONTROL_PADCONF_MCSPI1_CLK (0x00000198)
 117 #define CONTROL_PADCONF_MCSPI1_SOMI (0x0000019C)
 118 #define CONTROL_PADCONF_MCSPI1_CS1 (0x000001A0)
 119 #define CONTROL_PADCONF_MCSPI1_CS3 (0x000001A4)
 120 #define CONTROL_PADCONF_MCSPI2_SIMO (0x000001A8)
 121 #define CONTROL_PADCONF_MCSPI2_CS0 (0x000001AC)
 122 #define CONTROL_PADCONF_SYS_NIRQ (0x000001B0)
 123 #define CONTROL_PADCONF_SAD2D_MCAD0 (0x000001B4)
 124 #define CONTROL_PADCONF_SAD2D_MCAD2 (0x000001B8)
 125 #define CONTROL_PADCONF_SAD2D_MCAD4 (0x000001BC)
 126 #define CONTROL_PADCONF_SAD2D_MCAD6 (0x000001C0)
 127 #define CONTROL_PADCONF_SAD2D_MCAD8 (0x000001C4)
 128 #define CONTROL_PADCONF_SAD2D_MCAD10 (0x000001C8)
 129 #define CONTROL_PADCONF_SAD2D_MCAD12 (0x000001CC)
 130 #define CONTROL_PADCONF_SAD2D_MCAD14 (0x000001D0)
 131 #define CONTROL_PADCONF_SAD2D_MCAD16 (0x000001D4)
 132 #define CONTROL_PADCONF_SAD2D_MCAD18 (0x000001D8)
 133 #define CONTROL_PADCONF_SAD2D_MCAD20 (0x000001DC)
 134 #define CONTROL_PADCONF_SAD2D_MCAD22 (0x000001E0)
 135 #define CONTROL_PADCONF_SAD2D_MCAD24 (0x000001E4)
 136 #define CONTROL_PADCONF_SAD2D_MCAD26 (0x000001E8)
 137 #define CONTROL_PADCONF_SAD2D_MCAD28 (0x000001EC)
 138 #define CONTROL_PADCONF_SAD2D_MCAD30 (0x000001F0)
 139 #define CONTROL_PADCONF_SAD2D_MCAD32 (0x000001F4)
 140 #define CONTROL_PADCONF_SAD2D_MCAD34 (0x000001F8)
 141 #define CONTROL_PADCONF_SAD2D_MCAD36 (0x000001FC)
 142 #define CONTROL_PADCONF_SAD2D_NRESPWRON (0x00000200)
 143 #define CONTROL_PADCONF_SAD2D_ARMNIRQ (0x00000204)
 144 #define CONTROL_PADCONF_SAD2D_SPINT (0x00000208)
 145 #define CONTROL_PADCONF_SAD2D_DMAREQ0 (0x0000020C)
 146 #define CONTROL_PADCONF_SAD2D_DMAREQ2 (0x00000210)
 147 #define CONTROL_PADCONF_SAD2D_NTRST (0x00000214)
 148 #define CONTROL_PADCONF_SAD2D_TDO (0x00000218)
 149 #define CONTROL_PADCONF_SAD2D_TCK (0x0000021C)
 150 #define CONTROL_PADCONF_SAD2D_MSTDBY (0x00000220)
 151 #define CONTROL_PADCONF_SAD2D_IDLEACK (0x00000224)
 152 #define CONTROL_PADCONF_SAD2D_SWRITE (0x00000228)
 153 #define CONTROL_PADCONF_SAD2D_SREAD (0x0000022C)
 154 #define CONTROL_PADCONF_SAD2D_SBUSFLAG (0x00000230)
 155 #define CONTROL_PADCONF_SDRC_CKE1 (0x00000234)
 156 #define CONTROL_PADCONF_SDRC_BA0 (0x00000570)
 157 #define CONTROL_PADCONF_SDRC_A0 (0x00000574)
 158 #define CONTROL_PADCONF_SDRC_A2 (0x00000578)
 159 #define CONTROL_PADCONF_SDRC_A4 (0x0000057C)
 160 #define CONTROL_PADCONF_SDRC_A6 (0x00000580)
 161 #define CONTROL_PADCONF_SDRC_A8 (0x00000584)
 162 #define CONTROL_PADCONF_SDRC_A10 (0x00000588)
 163 #define CONTROL_PADCONF_SDRC_A12 (0x0000058C)
 164 #define CONTROL_PADCONF_SDRC_A14 (0x00000590)
 165 #define CONTROL_PADCONF_SDRC_NCS1 (0x00000594)
 166 #define CONTROL_PADCONF_SDRC_NRAS (0x00000598)
 167 #define CONTROL_PADCONF_SDRC_NWE (0x0000059C)
 168 #define CONTROL_PADCONF_SDRC_DM1 (0x000005A0)
 169 #define CONTROL_PADCONF_SDRC_DM3 (0x000005A4)
 170 #define CONTROL_PADCONF_ETK_CLK (0x000005A8)
 171 #define CONTROL_PADCONF_ETK_D0 (0x000005AC)
 172 #define CONTROL_PADCONF_ETK_D2 (0x000005B0)
 173 #define CONTROL_PADCONF_ETK_D4 (0x000005B4)
 174 #define CONTROL_PADCONF_ETK_D6 (0x000005B8)
 175 #define CONTROL_PADCONF_ETK_D8 (0x000005BC)
 176 #define CONTROL_PADCONF_ETK_D10 (0x000005C0)
 177 #define CONTROL_PADCONF_ETK_D12 (0x000005C4)
 178 #define CONTROL_PADCONF_ETK_D14 (0x000005C8)
 179
 180 int padconf_init();
 181 int padconf_set(u32_t padconf, u32_t mask, u32_t value);
 182 int padconf_release();
 183
 184 #endif /* __PADCONF_H__ */