drivers/audio/es1370/es1370.h

   1 #ifndef ES1370_H
   2 #define ES1370_H
   3 /* best viewed with tabsize=4 */
   4
   5 #include <sys/types.h>
   6 #include <sys/ioc_sound.h>
   7
   8
   9 /* set your vendor and device ID's here */
  10 #define VENDOR_ID                               0x1274
  11 #define DEVICE_ID                               0x5000
  12 #define DRIVER_NAME                             "ES1370"
  13
  14
  15 /* channels or subdevices */
  16 #define DAC1_CHAN                               0
  17 #define ADC1_CHAN                               1
  18 #define MIXER                                   2
  19 #define DAC2_CHAN                               3
  20
  21
  22 /* PCI command register defines */
  23 #define SERR_EN                                 0x0100
  24 #define PCI_MASTER                              0x0004
  25 #define IO_ACCESS                               0x0001
  26
  27
  28 /* Interrupt/Chip Select Control */
  29 #define CHIP_SEL_CTRL                   0x00
  30 #define FREQ_44K100                             0x3000          /* 44.1 Khz */
  31 #define CDC_EN                                  0x0002          /* codec enable */
  32 #define ADC1_EN                                 0x0010
  33 #define DAC1_EN                                 0x0040
  34 #define DAC2_EN                                 0x0020
  35 #define XCTL0                                   0x0100
  36 #define CCB_INTRM                               0x0400
  37
  38
  39 /* Interrupt/Chip Select Status */
  40 #define INTERRUPT_STATUS                0x04
  41 #define ADC                                             0x0001
  42 #define DAC2                                    0x0002
  43 #define DAC1                                    0x0004
  44 #define CSTAT                                   0x0400          /* == CBUSY || CWRIP */
  45 #define CWRIP                                   0x0100          /* == CBUSY || CWRIP */
  46 #define INTR                                    0x80000000
  47
  48
  49 /* AK4531 address */
  50 #define CODEC_WRITE_ADDRESS             0x10
  51
  52
  53 /* Legacy address */
  54 #define LEGACY                                  0x18
  55
  56
  57 /* Memory related defines */
  58 #define MEM_PAGE                                0x0c
  59 #define ADC_MEM_PAGE                    0x0d
  60 #define DAC_MEM_PAGE                    0x0c            /* for DAC1 and DAC2 */
  61
  62 #define MEMORY                                  0x30
  63 #define ADC_BUFFER_SIZE                 0x34
  64 #define DAC1_BUFFER_SIZE                0x34
  65 #define DAC2_BUFFER_SIZE                0X3c
  66 #define ADC_PCI_ADDRESS                 0x30
  67 #define DAC1_PCI_ADDRESS                0x30
  68 #define DAC2_PCI_ADDRESS                0x38
  69
  70
  71 /* Serial Interface Control */
  72 #define SERIAL_INTERFACE_CTRL   0x20
  73 #define P1_S_MB                                 0x0001          /* DAC1 Stereo/Mono bit */
  74 #define P1_S_EB                                 0x0002          /* DAC1 Sixteen/Eight bit */
  75 #define P2_S_MB                                 0x0004          /* DAC2 Stereo/Mono bit */
  76 #define P2_S_EB                                 0x0008          /* DAC2 Sixteen/Eight bit */
  77 #define R1_S_MB                                 0x0010          /* ADC Stereo/Mono bit */
  78 #define R1_S_EB                                 0x0020          /* ADC Sixteen/Eight bit */
  79 #define P1_INTR_EN                              0x0100
  80 #define P2_INTR_EN                              0x0200
  81 #define R1_INT_EN                               0x0400
  82 #define P1_PAUSE                                0x0800
  83 #define P2_PAUSE                                0x1000
  84
  85
  86 #define DAC1_SAMP_CT                    0x24
  87 #define DAC1_CURR_SAMP_CT               0x26
  88 #define DAC2_SAMP_CT                    0x28
  89 #define DAC2_CURR_SAMP_CT               0x2a
  90 #define ADC_SAMP_CT                             0x2c
  91 #define ADC_CURR_SAMP_CT                0x2e
  92
  93
  94 typedef struct {
  95         u32_t stereo;
  96         u16_t sample_rate;
  97         u32_t nr_of_bits;
  98         u32_t sign;
  99         u32_t busy;
 100         u32_t fragment_size;
 101 } aud_sub_dev_conf_t;
 102
 103 /* Some defaults for the aud_sub_dev_conf_t*/
 104 #define DEFAULT_RATE                44100      /* Sample rate */
 105 #define DEFAULT_NR_OF_BITS              16             /* Nr. of bits per sample per chan */
 106 #define DEFAULT_SIGNED                  0          /* 0 = unsigned, 1 = signed */
 107 #define DEFAULT_STEREO                  1          /* 0 = mono, 1 = stereo */
 108 #define MAX_RATE                                44100      /* Max sample speed in KHz */
 109 #define MIN_RATE                                4000       /* Min sample speed in KHz */
 110
 111
 112 typedef struct DEVSTRUCT {
 113         char*     name;
 114         u16_t     v_id;                                                 /* vendor id */
 115         u16_t     d_id;                                                 /* device id */
 116         u32_t     devind;                                               /* minix pci device id, for
 117                                                                                          * pci configuration space */
 118         u32_t     base;                                                 /* changed to 32 bits */
 119         char      irq;
 120         char      revision;                                             /* version of the device */
 121 } DEV_STRUCT;
 122
 123
 124 #endif /* ES1370_H */