?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
. pci driver now returns devices, even when they have been pci_reserve()d
[minix3.git] / drivers / at_wini / at_wini.c
blob5a8acb839a2c8863d0c75e8feba10c967db4fffd
1 /* This file contains the device dependent part of a driver for the IBM-AT
2 * winchester controller. Written by Adri Koppes.
3 *
4 * The file contains one entry point:
5 *
6 * at_winchester_task: main entry when system is brought up
7 *
8 * Changes:
9 * Aug 19, 2005 ATA PCI support, supports SATA (Ben Gras)
10 * Nov 18, 2004 moved AT disk driver to user-space (Jorrit N. Herder)
11 * Aug 20, 2004 watchdogs replaced by sync alarms (Jorrit N. Herder)
12 * Mar 23, 2000 added ATAPI CDROM support (Michael Temari)
13 * May 14, 2000 d-d/i rewrite (Kees J. Bot)
14 * Apr 13, 1992 device dependent/independent split (Kees J. Bot)
15 */
16
17 #include "at_wini.h"
18
19 #include <minix/sysutil.h>
20 #include <minix/keymap.h>
21 #include <sys/ioc_disk.h>
22 #include <ibm/pci.h>
23
24 #define ATAPI_DEBUG 0 /* To debug ATAPI code. */
25
26 /* I/O Ports used by winchester disk controllers. */
27
28 /* Read and write registers */
29 #define REG_CMD_BASE0 0x1F0 /* command base register of controller 0 */
30 #define REG_CMD_BASE1 0x170 /* command base register of controller 1 */
31 #define REG_CTL_BASE0 0x3F6 /* control base register of controller 0 */
32 #define REG_CTL_BASE1 0x376 /* control base register of controller 1 */
33
34 #define PCI_CTL_OFF 2 /* Offset of control registers from BAR2 */
35 #define PCI_DMA_2ND_OFF 8 /* Offset of DMA registers from BAR4 for
36 * secondary channel
37 */
38
39 #define REG_DATA 0 /* data register (offset from the base reg.) */
40 #define REG_PRECOMP 1 /* start of write precompensation */
41 #define REG_COUNT 2 /* sectors to transfer */
42 #define REG_SECTOR 3 /* sector number */
43 #define REG_CYL_LO 4 /* low byte of cylinder number */
44 #define REG_CYL_HI 5 /* high byte of cylinder number */
45 #define REG_LDH 6 /* lba, drive and head */
46 #define LDH_DEFAULT 0xA0 /* ECC enable, 512 bytes per sector */
47 #define LDH_LBA 0x40 /* Use LBA addressing */
48 #define LDH_DEV 0x10 /* Drive 1 iff set */
49 #define ldh_init(drive) (LDH_DEFAULT | ((drive) << 4))
50
51 /* Read only registers */
52 #define REG_STATUS 7 /* status */
53 #define STATUS_BSY 0x80 /* controller busy */
54 #define STATUS_RDY 0x40 /* drive ready */
55 #define STATUS_WF 0x20 /* write fault */
56 #define STATUS_SC 0x10 /* seek complete (obsolete) */
57 #define STATUS_DRQ 0x08 /* data transfer request */
58 #define STATUS_CRD 0x04 /* corrected data */
59 #define STATUS_IDX 0x02 /* index pulse */
60 #define STATUS_ERR 0x01 /* error */
61 #define STATUS_ADMBSY 0x100 /* administratively busy (software) */
62 #define REG_ERROR 1 /* error code */
63 #define ERROR_BB 0x80 /* bad block */
64 #define ERROR_ECC 0x40 /* bad ecc bytes */
65 #define ERROR_ID 0x10 /* id not found */
66 #define ERROR_AC 0x04 /* aborted command */
67 #define ERROR_TK 0x02 /* track zero error */
68 #define ERROR_DM 0x01 /* no data address mark */
69
70 /* Write only registers */
71 #define REG_COMMAND 7 /* command */
72 #define CMD_IDLE 0x00 /* for w_command: drive idle */
73 #define CMD_RECALIBRATE 0x10 /* recalibrate drive */
74 #define CMD_READ 0x20 /* read data */
75 #define CMD_READ_EXT 0x24 /* read data (LBA48 addressed) */
76 #define CMD_READ_DMA_EXT 0x25 /* read data using DMA (w/ LBA48) */
77 #define CMD_WRITE 0x30 /* write data */
78 #define CMD_WRITE_EXT 0x34 /* write data (LBA48 addressed) */
79 #define CMD_WRITE_DMA_EXT 0x35 /* write data using DMA (w/ LBA48) */
80 #define CMD_READVERIFY 0x40 /* read verify */
81 #define CMD_FORMAT 0x50 /* format track */
82 #define CMD_SEEK 0x70 /* seek cylinder */
83 #define CMD_DIAG 0x90 /* execute device diagnostics */
84 #define CMD_SPECIFY 0x91 /* specify parameters */
85 #define CMD_READ_DMA 0xC8 /* read data using DMA */
86 #define CMD_WRITE_DMA 0xCA /* write data using DMA */
87 #define ATA_IDENTIFY 0xEC /* identify drive */
88 /* #define REG_CTL 0x206 */ /* control register */
89 #define REG_CTL 0 /* control register */
90 #define CTL_NORETRY 0x80 /* disable access retry */
91 #define CTL_NOECC 0x40 /* disable ecc retry */
92 #define CTL_EIGHTHEADS 0x08 /* more than eight heads */
93 #define CTL_RESET 0x04 /* reset controller */
94 #define CTL_INTDISABLE 0x02 /* disable interrupts */
95 #define REG_CTL_ALTSTAT 0 /* alternate status register */
96
97 /* Identify words */
98 #define ID_GENERAL 0x00 /* General configuration information */
99 #define ID_GEN_NOT_ATA 0x8000 /* Not an ATA device */
100 #define ID_CAPABILITIES 0x31 /* Capabilities (49)*/
101 #define ID_CAP_LBA 0x0200 /* LBA supported */
102 #define ID_CAP_DMA 0x0100 /* DMA supported */
103 #define ID_FIELD_VALIDITY 0x35 /* Field Validity (53) */
104 #define ID_FV_88 0x04 /* Word 88 is valid (UDMA) */
105 #define ID_MULTIWORD_DMA 0x3f /* Multiword DMA (63) */
106 #define ID_MWDMA_2_SEL 0x0400 /* Mode 2 is selected */
107 #define ID_MWDMA_1_SEL 0x0200 /* Mode 1 is selected */
108 #define ID_MWDMA_0_SEL 0x0100 /* Mode 0 is selected */
109 #define ID_MWDMA_2_SUP 0x0004 /* Mode 2 is supported */
110 #define ID_MWDMA_1_SUP 0x0002 /* Mode 1 is supported */
111 #define ID_MWDMA_0_SUP 0x0001 /* Mode 0 is supported */
112 #define ID_CSS 0x53 /* Command Sets Supported (83) */
113 #define ID_CSS_LBA48 0x0400
114 #define ID_ULTRA_DMA 0x58 /* Ultra DMA (88) */
115 #define ID_UDMA_5_SEL 0x2000 /* Mode 5 is selected */
116 #define ID_UDMA_4_SEL 0x1000 /* Mode 4 is selected */
117 #define ID_UDMA_3_SEL 0x0800 /* Mode 3 is selected */
118 #define ID_UDMA_2_SEL 0x0400 /* Mode 2 is selected */
119 #define ID_UDMA_1_SEL 0x0200 /* Mode 1 is selected */
120 #define ID_UDMA_0_SEL 0x0100 /* Mode 0 is selected */
121 #define ID_UDMA_5_SUP 0x0020 /* Mode 5 is supported */
122 #define ID_UDMA_4_SUP 0x0010 /* Mode 4 is supported */
123 #define ID_UDMA_3_SUP 0x0008 /* Mode 3 is supported */
124 #define ID_UDMA_2_SUP 0x0004 /* Mode 2 is supported */
125 #define ID_UDMA_1_SUP 0x0002 /* Mode 1 is supported */
126 #define ID_UDMA_0_SUP 0x0001 /* Mode 0 is supported */
127
128 /* DMA registers */
129 #define DMA_COMMAND 0 /* Command register */
130 #define DMA_CMD_WRITE 0x08 /* PCI bus master writes */
131 #define DMA_CMD_START 0x01 /* Start Bus Master */
132 #define DMA_STATUS 2 /* Status register */
133 #define DMA_ST_D1_DMACAP 0x40 /* Drive 1 is DMA capable */
134 #define DMA_ST_D0_DMACAP 0x20 /* Drive 0 is DMA capable */
135 #define DMA_ST_INT 0x04 /* Interrupt */
136 #define DMA_ST_ERROR 0x02 /* Error */
137 #define DMA_ST_BM_ACTIVE 0x01 /* Bus Master IDE Active */
138 #define DMA_PRDTP 4 /* PRD Table Pointer */
139
140 /* Check for the presence of LBA48 only on drives that are 'big'. */
141 #define LBA48_CHECK_SIZE 0x0f000000
142 #define LBA_MAX_SIZE 0x0fffffff /* Highest sector size for
143 * regular LBA.
144 */
145
146 #if ENABLE_ATAPI
147 #define ERROR_SENSE 0xF0 /* sense key mask */
148 #define SENSE_NONE 0x00 /* no sense key */
149 #define SENSE_RECERR 0x10 /* recovered error */
150 #define SENSE_NOTRDY 0x20 /* not ready */
151 #define SENSE_MEDERR 0x30 /* medium error */
152 #define SENSE_HRDERR 0x40 /* hardware error */
153 #define SENSE_ILRQST 0x50 /* illegal request */
154 #define SENSE_UATTN 0x60 /* unit attention */
155 #define SENSE_DPROT 0x70 /* data protect */
156 #define SENSE_ABRT 0xb0 /* aborted command */
157 #define SENSE_MISCOM 0xe0 /* miscompare */
158 #define ERROR_MCR 0x08 /* media change requested */
159 #define ERROR_ABRT 0x04 /* aborted command */
160 #define ERROR_EOM 0x02 /* end of media detected */
161 #define ERROR_ILI 0x01 /* illegal length indication */
162 #define REG_FEAT 1 /* features */
163 #define FEAT_OVERLAP 0x02 /* overlap */
164 #define FEAT_DMA 0x01 /* dma */
165 #define REG_IRR 2 /* interrupt reason register */
166 #define IRR_REL 0x04 /* release */
167 #define IRR_IO 0x02 /* direction for xfer */
168 #define IRR_COD 0x01 /* command or data */
169 #define REG_SAMTAG 3
170 #define REG_CNT_LO 4 /* low byte of cylinder number */
171 #define REG_CNT_HI 5 /* high byte of cylinder number */
172 #define REG_DRIVE 6 /* drive select */
173 #endif
174
175 #define REG_STATUS 7 /* status */
176 #define STATUS_BSY 0x80 /* controller busy */
177 #define STATUS_DRDY 0x40 /* drive ready */
178 #define STATUS_DMADF 0x20 /* dma ready/drive fault */
179 #define STATUS_SRVCDSC 0x10 /* service or dsc */
180 #define STATUS_DRQ 0x08 /* data transfer request */
181 #define STATUS_CORR 0x04 /* correctable error occurred */
182 #define STATUS_CHECK 0x01 /* check error */
183
184 #ifdef ENABLE_ATAPI
185 #define ATAPI_PACKETCMD 0xA0 /* packet command */
186 #define ATAPI_IDENTIFY 0xA1 /* identify drive */
187 #define SCSI_READ10 0x28 /* read from disk */
188 #define SCSI_SENSE 0x03 /* sense request */
189
190 #define CD_SECTOR_SIZE 2048 /* sector size of a CD-ROM */
191 #endif /* ATAPI */
192
193 /* Interrupt request lines. */
194 #define NO_IRQ 0 /* no IRQ set yet */
195
196 #define ATAPI_PACKETSIZE 12
197 #define SENSE_PACKETSIZE 18
198
199 /* Common command block */
200 struct command {
201 u8_t precomp; /* REG_PRECOMP, etc. */
202 u8_t count;
203 u8_t sector;
204 u8_t cyl_lo;
205 u8_t cyl_hi;
206 u8_t ldh;
207 u8_t command;
208
209 /* The following at for LBA48 */
210 u8_t count_prev;
211 u8_t sector_prev;
212 u8_t cyl_lo_prev;
213 u8_t cyl_hi_prev;
214 };
215
216 /* Error codes */
217 #define ERR (-1) /* general error */
218 #define ERR_BAD_SECTOR (-2) /* block marked bad detected */
219
220 /* Some controllers don't interrupt, the clock will wake us up. */
221 #define WAKEUP_SECS 32 /* drive may be out for 31 seconds max */
222 #define WAKEUP_TICKS (WAKEUP_SECS*HZ)
223
224 /* Miscellaneous. */
225 #define MAX_DRIVES 8
226 #define COMPAT_DRIVES 4
227 #if _WORD_SIZE > 2
228 #define MAX_SECS 256 /* controller can transfer this many sectors */
229 #else
230 #define MAX_SECS 127 /* but not to a 16 bit process */
231 #endif
232 #define MAX_ERRORS 4 /* how often to try rd/wt before quitting */
233 #define NR_MINORS (MAX_DRIVES * DEV_PER_DRIVE)
234 #define SUB_PER_DRIVE (NR_PARTITIONS * NR_PARTITIONS)
235 #define NR_SUBDEVS (MAX_DRIVES * SUB_PER_DRIVE)
236 #define DELAY_USECS 1000 /* controller timeout in microseconds */
237 #define DELAY_TICKS 1 /* controller timeout in ticks */
238 #define DEF_TIMEOUT_TICKS 300 /* controller timeout in ticks */
239 #define RECOVERY_USECS 500000 /* controller recovery time in microseconds */
240 #define RECOVERY_TICKS 30 /* controller recovery time in ticks */
241 #define INITIALIZED 0x01 /* drive is initialized */
242 #define DEAF 0x02 /* controller must be reset */
243 #define SMART 0x04 /* drive supports ATA commands */
244 #if ENABLE_ATAPI
245 #define ATAPI 0x08 /* it is an ATAPI device */
246 #else
247 #define ATAPI 0 /* don't bother with ATAPI; optimise out */
248 #endif
249 #define IDENTIFIED 0x10 /* w_identify done successfully */
250 #define IGNORING 0x20 /* w_identify failed once */
251
252 /* Timeouts and max retries. */
253 int timeout_ticks = DEF_TIMEOUT_TICKS, max_errors = MAX_ERRORS;
254 long w_standard_timeouts = 0, w_pci_debug = 0, w_instance = 0,
255 disable_dma = 0, atapi_debug = 0, w_identify_wakeup_ticks = WAKEUP_TICKS,
256 wakeup_ticks = WAKEUP_TICKS;
257
258 int w_testing = 0, w_silent = 0;
259
260 int w_next_drive = 0;
261
262 /* Variables. */
263
264 /* The struct wini is indexed by controller first, then drive (0-3).
265 * Controller 0 is always the 'compatability' ide controller, at
266 * the fixed locations, whether present or not.
267 */
268 PRIVATE struct wini { /* main drive struct, one entry per drive */
269 unsigned state; /* drive state: deaf, initialized, dead */
270 unsigned short w_status; /* device status register */
271 unsigned base_cmd; /* command base register */
272 unsigned base_ctl; /* control base register */
273 unsigned base_dma; /* dma base register */
274 unsigned irq; /* interrupt request line */
275 unsigned irq_mask; /* 1 << irq */
276 unsigned irq_need_ack; /* irq needs to be acknowledged */
277 int irq_hook_id; /* id of irq hook at the kernel */
278 int lba48; /* supports lba48 */
279 int dma; /* supports dma */
280 unsigned lcylinders; /* logical number of cylinders (BIOS) */
281 unsigned lheads; /* logical number of heads */
282 unsigned lsectors; /* logical number of sectors per track */
283 unsigned pcylinders; /* physical number of cylinders (translated) */
284 unsigned pheads; /* physical number of heads */
285 unsigned psectors; /* physical number of sectors per track */
286 unsigned ldhpref; /* top four bytes of the LDH (head) register */
287 unsigned precomp; /* write precompensation cylinder / 4 */
288 unsigned max_count; /* max request for this drive */
289 unsigned open_ct; /* in-use count */
290 struct device part[DEV_PER_DRIVE]; /* disks and partitions */
291 struct device subpart[SUB_PER_DRIVE]; /* subpartitions */
292 } wini[MAX_DRIVES], *w_wn;
293
294 PRIVATE int w_device = -1;
295 PRIVATE int w_controller = -1;
296 PRIVATE int w_major = -1;
297 PRIVATE char w_id_string[40];
298
299 PRIVATE int win_tasknr; /* my task number */
300 PRIVATE int w_command; /* current command in execution */
301 PRIVATE u8_t w_byteval; /* used for SYS_IRQCTL */
302 PRIVATE int w_drive; /* selected drive */
303 PRIVATE int w_controller; /* selected controller */
304 PRIVATE struct device *w_dv; /* device's base and size */
305
306 /* Unfortunately, DMA_SECTORS and DMA_BUF_SIZE are already defined libdriver
307 * for 'tmp_buf'.
308 */
309 #define ATA_DMA_SECTORS 64
310 #define ATA_DMA_BUF_SIZE (ATA_DMA_SECTORS*SECTOR_SIZE)
311
312 PRIVATE char dma_buf[ATA_DMA_BUF_SIZE];
313 PRIVATE phys_bytes dma_buf_phys;
314
315 #define N_PRDTE 1024 /* Should be enough for large requests */
316
317 PRIVATE struct prdte
318 {
319 u32_t prdte_base;
320 u16_t prdte_count;
321 u8_t prdte_reserved;
322 u8_t prdte_flags;
323 } prdt[N_PRDTE];
324 PRIVATE phys_bytes prdt_phys;
325
326 #define PRDTE_FL_EOT 0x80 /* End of table */
327
328 /* Some IDE devices announce themselves as RAID controllers */
329 PRIVATE struct
330 {
331 u16_t vendor;
332 u16_t device;
333 } raid_table[]=
334 {
335 { 0x1106, 0x3149 }, /* VIA VT6420 */
336 { 0, 0 } /* end of list */
337 };
338
339 FORWARD _PROTOTYPE( void init_params, (void) );
340 FORWARD _PROTOTYPE( void init_drive, (struct wini *w, int base_cmd,
341 int base_ctl, int base_dma, int irq, int ack, int hook,
342 int drive) );
343 FORWARD _PROTOTYPE( void init_params_pci, (int) );
344 FORWARD _PROTOTYPE( int w_do_open, (struct driver *dp, message *m_ptr) );
345 FORWARD _PROTOTYPE( struct device *w_prepare, (int dev) );
346 FORWARD _PROTOTYPE( int w_identify, (void) );
347 FORWARD _PROTOTYPE( char *w_name, (void) );
348 FORWARD _PROTOTYPE( int w_specify, (void) );
349 FORWARD _PROTOTYPE( int w_io_test, (void) );
350 FORWARD _PROTOTYPE( int w_transfer, (int proc_nr, int opcode, u64_t position,
351 iovec_t *iov, unsigned nr_req, int safe));
352 FORWARD _PROTOTYPE( int com_out, (struct command *cmd) );
353 FORWARD _PROTOTYPE( int com_out_ext, (struct command *cmd) );
354 FORWARD _PROTOTYPE( void setup_dma, (unsigned *sizep, int proc_nr,
355 iovec_t *iov, int do_write, int *do_copyoutp, int safe) );
356 FORWARD _PROTOTYPE( void w_need_reset, (void) );
357 FORWARD _PROTOTYPE( void ack_irqs, (unsigned int) );
358 FORWARD _PROTOTYPE( int w_do_close, (struct driver *dp, message *m_ptr) );
359 FORWARD _PROTOTYPE( int w_other, (struct driver *dp, message *m_ptr, int));
360 FORWARD _PROTOTYPE( int w_hw_int, (struct driver *dp, message *m_ptr) );
361 FORWARD _PROTOTYPE( int com_simple, (struct command *cmd) );
362 FORWARD _PROTOTYPE( void w_timeout, (void) );
363 FORWARD _PROTOTYPE( int w_reset, (void) );
364 FORWARD _PROTOTYPE( void w_intr_wait, (void) );
365 FORWARD _PROTOTYPE( int at_intr_wait, (void) );
366 FORWARD _PROTOTYPE( int w_waitfor, (int mask, int value) );
367 FORWARD _PROTOTYPE( int w_waitfor_dma, (int mask, int value) );
368 FORWARD _PROTOTYPE( void w_geometry, (struct partition *entry) );
369 #if ENABLE_ATAPI
370 FORWARD _PROTOTYPE( int atapi_sendpacket, (u8_t *packet, unsigned cnt) );
371 FORWARD _PROTOTYPE( int atapi_intr_wait, (void) );
372 FORWARD _PROTOTYPE( int atapi_open, (void) );
373 FORWARD _PROTOTYPE( void atapi_close, (void) );
374 FORWARD _PROTOTYPE( int atapi_transfer, (int proc_nr, int opcode,
375 u64_t position, iovec_t *iov, unsigned nr_req, int safe));
376 #endif
377
378 /* Entry points to this driver. */
379 PRIVATE struct driver w_dtab = {
380 w_name, /* current device's name */
381 w_do_open, /* open or mount request, initialize device */
382 w_do_close, /* release device */
383 do_diocntl, /* get or set a partition's geometry */
384 w_prepare, /* prepare for I/O on a given minor device */
385 w_transfer, /* do the I/O */
386 nop_cleanup, /* nothing to clean up */
387 w_geometry, /* tell the geometry of the disk */
388 nop_signal, /* no cleanup needed on shutdown */
389 nop_alarm, /* ignore leftover alarms */
390 nop_cancel, /* ignore CANCELs */
391 nop_select, /* ignore selects */
392 w_other, /* catch-all for unrecognized commands and ioctls */
393 w_hw_int /* leftover hardware interrupts */
394 };
395
396 /*===========================================================================*
397 * at_winchester_task *
398 *===========================================================================*/
399 PUBLIC int main(int argc, char *argv[])
400 {
401 /* Install signal handlers. Ask PM to transform signal into message. */
402 struct sigaction sa;
403
404 sa.sa_handler = SIG_MESS;
405 sigemptyset(&sa.sa_mask);
406 sa.sa_flags = 0;
407 if (sigaction(SIGTERM,&sa,NULL)<0) panic("AT","sigaction failed", errno);
408
409 /* Set special disk parameters then call the generic main loop. */
410 env_setargs(argc, argv);
411 init_params();
412 signal(SIGTERM, SIG_IGN);
413 driver_task(&w_dtab);
414 return(OK);
415 }
416
417 /*===========================================================================*
418 * init_params *
419 *===========================================================================*/
420 PRIVATE void init_params()
421 {
422 /* This routine is called at startup to initialize the drive parameters. */
423
424 u16_t parv[2];
425 unsigned int vector, size;
426 int drive, nr_drives;
427 struct wini *wn;
428 u8_t params[16];
429 int s;
430 long wakeup_secs = WAKEUP_SECS;
431
432 /* Boot variables. */
433 env_parse("ata_std_timeout", "d", 0, &w_standard_timeouts, 0, 1);
434 env_parse("ata_pci_debug", "d", 0, &w_pci_debug, 0, 1);
435 env_parse("ata_instance", "d", 0, &w_instance, 0, 8);
436 env_parse("ata_no_dma", "d", 0, &disable_dma, 0, 1);
437 env_parse("ata_id_timeout", "d", WAKEUP_SECS, &wakeup_secs, 1, 60);
438 env_parse("atapi_debug", "d", 0, &atapi_debug, 0, 1);
439
440 w_identify_wakeup_ticks = wakeup_secs * HZ;
441
442 if(w_identify_wakeup_ticks <= 0) {
443 printf("changing wakeup from %d to %d ticks.\n",
444 w_identify_wakeup_ticks, WAKEUP_TICKS);
445 w_identify_wakeup_ticks = WAKEUP_TICKS;
446 }
447
448 if (disable_dma)
449 printf("DMA for ATA devices is disabled.\n");
450
451 s= sys_umap(SELF, D, (vir_bytes)dma_buf, sizeof(dma_buf), &dma_buf_phys);
452 if (s != 0)
453 panic("at_wini", "can't map dma buffer", s);
454
455 s= sys_umap(SELF, D, (vir_bytes)prdt, sizeof(prdt), &prdt_phys);
456 if (s != 0)
457 panic("at_wini", "can't map prd table", s);
458
459 if (w_instance == 0) {
460 /* Get the number of drives from the BIOS data area */
461 s=sys_readbios(NR_HD_DRIVES_ADDR, params, NR_HD_DRIVES_SIZE);
462 if (s != OK)
463 panic(w_name(), "Couldn't read BIOS", s);
464 if ((nr_drives = params[0]) > 2) nr_drives = 2;
465
466 for (drive = 0, wn = wini; drive < COMPAT_DRIVES; drive++, wn++) {
467 if (drive < nr_drives) {
468 /* Copy the BIOS parameter vector */
469 vector = (drive == 0) ? BIOS_HD0_PARAMS_ADDR :
470 BIOS_HD1_PARAMS_ADDR;
471 size = (drive == 0) ? BIOS_HD0_PARAMS_SIZE :
472 BIOS_HD1_PARAMS_SIZE;
473 s=sys_readbios(vector, parv, size);
474 if (s != OK)
475 panic(w_name(), "Couldn't read BIOS", s);
476
477 /* Calculate the address of the parameters and copy them */
478 s=sys_readbios(hclick_to_physb(parv[1]) + parv[0],
479 params, 16L);
480 if (s != OK)
481 panic(w_name(),"Couldn't copy parameters", s);
482
483 /* Copy the parameters to the structures of the drive */
484 wn->lcylinders = bp_cylinders(params);
485 wn->lheads = bp_heads(params);
486 wn->lsectors = bp_sectors(params);
487 wn->precomp = bp_precomp(params) >> 2;
488 }
489
490 /* Fill in non-BIOS parameters. */
491 init_drive(wn,
492 drive < 2 ? REG_CMD_BASE0 : REG_CMD_BASE1,
493 drive < 2 ? REG_CTL_BASE0 : REG_CTL_BASE1,
494 0 /* no DMA */, NO_IRQ, 0, 0, drive);
495 w_next_drive++;
496 }
497 }
498
499 /* Look for controllers on the pci bus. Skip none the first instance,
500 * skip one and then 2 for every instance, for every next instance.
501 */
502 if (w_instance == 0)
503 init_params_pci(0);
504 else
505 init_params_pci(w_instance*2-1);
506
507 }
508
509 #define ATA_IF_NOTCOMPAT1 (1L << 0)
510 #define ATA_IF_NOTCOMPAT2 (1L << 2)
511
512 /*===========================================================================*
513 * init_drive *
514 *===========================================================================*/
515 PRIVATE void init_drive(struct wini *w, int base_cmd, int base_ctl,
516 int base_dma, int irq, int ack, int hook, int drive)
517 {
518 w->state = 0;
519 w->w_status = 0;
520 w->base_cmd = base_cmd;
521 w->base_ctl = base_ctl;
522 w->base_dma = base_dma;
523 w->irq = irq;
524 w->irq_mask = 1 << irq;
525 w->irq_need_ack = ack;
526 w->irq_hook_id = hook;
527 w->ldhpref = ldh_init(drive);
528 w->max_count = MAX_SECS << SECTOR_SHIFT;
529 w->lba48 = 0;
530 w->dma = 0;
531 }
532
533 /*===========================================================================*
534 * init_params_pci *
535 *===========================================================================*/
536 PRIVATE void init_params_pci(int skip)
537 {
538 int i, r, devind, drive;
539 int irq, irq_hook, raid;
540 u8_t bcr, scr, interface;
541 u16_t vid, did;
542 u32_t base_dma, t3;
543
544 pci_init();
545 for(drive = w_next_drive; drive < MAX_DRIVES; drive++)
546 wini[drive].state = IGNORING;
547 for(r = pci_first_dev(&devind, &vid, &did); r != 0;
548 r = pci_next_dev(&devind, &vid, &did)) {
549
550 raid= 0;
551
552 /* Except class 01h (mass storage), subclass be 01h (ATA).
553 * Also check listed RAID controllers.
554 */
555 bcr= pci_attr_r8(devind, PCI_BCR);
556 scr= pci_attr_r8(devind, PCI_SCR);
557 interface= pci_attr_r8(devind, PCI_PIFR);
558 t3= ((bcr << 16) | (scr << 8) | interface);
559 if (bcr == PCI_BCR_MASS_STORAGE && scr == PCI_MS_IDE)
560 ; /* Okay */
561 else if (t3 == PCI_T3_RAID)
562 {
563 for (i= 0; raid_table[i].vendor != 0; i++)
564 {
565 if (raid_table[i].vendor == vid &&
566 raid_table[i].device == did)
567 {
568 break;
569 }
570 }
571 if (raid_table[i].vendor == 0)
572 {
573 printf(
574 "atapci skipping unsupported RAID controller 0x%04x / 0x%04x\n",
575 vid, did);
576 continue;
577 }
578 printf("found supported RAID controller\n");
579 raid= 1;
580 }
581 else
582 continue; /* Unsupported device class */
583
584 /* Found a controller.
585 * Programming interface register tells us more.
586 */
587 irq = pci_attr_r8(devind, PCI_ILR);
588
589 /* Any non-compat drives? */
590 if (raid || (interface & (ATA_IF_NOTCOMPAT1 | ATA_IF_NOTCOMPAT2))) {
591 int s;
592
593 if (w_next_drive >= MAX_DRIVES)
594 {
595 /* We can't accept more drives, but have to search for
596 * controllers operating in compatibility mode.
597 */
598 continue;
599 }
600
601 irq_hook = irq;
602 if (skip > 0) {
603 if (w_pci_debug)
604 {
605 printf(
606 "atapci skipping controller (remain %d)\n",
607 skip);
608 }
609 skip--;
610 continue;
611 }
612 if(pci_reserve_ok(devind) != OK) {
613 printf("at_wini%d: pci_reserve %d failed - "
614 "ignoring controller!\n",
615 w_instance, devind);
616 continue;
617 }
618 if ((s=sys_irqsetpolicy(irq, 0, &irq_hook)) != OK) {
619 printf("atapci: couldn't set IRQ policy %d\n", irq);
620 continue;
621 }
622 if ((s=sys_irqenable(&irq_hook)) != OK) {
623 printf("atapci: couldn't enable IRQ line %d\n", irq);
624 continue;
625 }
626 }
627
628 base_dma = pci_attr_r32(devind, PCI_BAR_5) & 0xfffffffc;
629
630 /* Primary channel not in compatability mode? */
631 if (raid || (interface & ATA_IF_NOTCOMPAT1)) {
632 u32_t base_cmd, base_ctl;
633
634 base_cmd = pci_attr_r32(devind, PCI_BAR) & 0xfffffffc;
635 base_ctl = pci_attr_r32(devind, PCI_BAR_2) & 0xfffffffc;
636 if (base_cmd != REG_CMD_BASE0 && base_cmd != REG_CMD_BASE1) {
637 init_drive(&wini[w_next_drive],
638 base_cmd, base_ctl+PCI_CTL_OFF,
639 base_dma, irq, 1, irq_hook, 0);
640 init_drive(&wini[w_next_drive+1],
641 base_cmd, base_ctl+PCI_CTL_OFF,
642 base_dma, irq, 1, irq_hook, 1);
643 if (w_pci_debug)
644 printf("atapci %d: 0x%x 0x%x irq %d\n", devind, base_cmd, base_ctl, irq);
645 w_next_drive += 2;
646 } else printf("atapci: ignored drives on primary channel, base %x\n", base_cmd);
647 }
648 else
649 {
650 /* Update base_dma for compatibility device */
651 for (i= 0; i<MAX_DRIVES; i++)
652 {
653 if (wini[i].base_cmd == REG_CMD_BASE0)
654 wini[i].base_dma= base_dma;
655 }
656 }
657
658 /* Secondary channel not in compatability mode? */
659 if (raid || (interface & ATA_IF_NOTCOMPAT2)) {
660 u32_t base_cmd, base_ctl;
661
662 base_cmd = pci_attr_r32(devind, PCI_BAR_3) & 0xfffffffc;
663 base_ctl = pci_attr_r32(devind, PCI_BAR_4) & 0xfffffffc;
664 if (base_dma != 0)
665 base_dma += PCI_DMA_2ND_OFF;
666 if (base_cmd != REG_CMD_BASE0 && base_cmd != REG_CMD_BASE1) {
667 init_drive(&wini[w_next_drive],
668 base_cmd, base_ctl+PCI_CTL_OFF, base_dma,
669 irq, 1, irq_hook, 2);
670 init_drive(&wini[w_next_drive+1],
671 base_cmd, base_ctl+PCI_CTL_OFF, base_dma,
672 irq, 1, irq_hook, 3);
673 if (w_pci_debug)
674 printf("atapci %d: 0x%x 0x%x irq %d\n", devind, base_cmd, base_ctl, irq);
675 w_next_drive += 2;
676 } else printf("atapci: ignored drives on secondary channel, base %x\n", base_cmd);
677 }
678 else
679 {
680 /* Update base_dma for compatibility device */
681 for (i= 0; i<MAX_DRIVES; i++)
682 {
683 if (wini[i].base_cmd == REG_CMD_BASE1 && base_dma != 0)
684 wini[i].base_dma= base_dma+PCI_DMA_2ND_OFF;
685 }
686 }
687 }
688 }
689
690 /*===========================================================================*
691 * w_do_open *
692 *===========================================================================*/
693 PRIVATE int w_do_open(dp, m_ptr)
694 struct driver *dp;
695 message *m_ptr;
696 {
697 /* Device open: Initialize the controller and read the partition table. */
698
699 struct wini *wn;
700
701 if (w_prepare(m_ptr->DEVICE) == NIL_DEV) return(ENXIO);
702
703 wn = w_wn;
704
705 /* If we've probed it before and it failed, don't probe it again. */
706 if (wn->state & IGNORING) return ENXIO;
707
708 /* If we haven't identified it yet, or it's gone deaf,
709 * (re-)identify it.
710 */
711 if (!(wn->state & IDENTIFIED) || (wn->state & DEAF)) {
712 /* Try to identify the device. */
713 if (w_identify() != OK) {
714 #if VERBOSE
715 printf("%s: probe failed\n", w_name());
716 #endif
717 if (wn->state & DEAF) w_reset();
718 wn->state = IGNORING;
719 return(ENXIO);
720 }
721 /* Do a test transaction unless it's a CD drive (then
722 * we can believe the controller, and a test may fail
723 * due to no CD being in the drive). If it fails, ignore
724 * the device forever.
725 */
726 if (!(wn->state & ATAPI) && w_io_test() != OK) {
727 wn->state |= IGNORING;
728 return(ENXIO);
729 }
730
731 #if VERBOSE
732 printf("%s: AT driver detected ", w_name());
733 if (wn->state & (SMART|ATAPI)) {
734 printf("%.40s\n", w_id_string);
735 } else {
736 printf("%ux%ux%u\n", wn->pcylinders, wn->pheads, wn->psectors);
737 }
738 #endif
739 }
740
741 #if ENABLE_ATAPI
742 if ((wn->state & ATAPI) && (m_ptr->COUNT & W_BIT))
743 return(EACCES);
744 #endif
745
746 /* Partition the drive if it's being opened for the first time,
747 * or being opened after being closed.
748 */
749 if (wn->open_ct == 0) {
750 #if ENABLE_ATAPI
751 if (wn->state & ATAPI) {
752 int r;
753 if ((r = atapi_open()) != OK) return(r);
754 }
755 #endif
756
757 /* Partition the disk. */
758 partition(&w_dtab, w_drive * DEV_PER_DRIVE, P_PRIMARY, wn->state & ATAPI);
759 }
760 wn->open_ct++;
761 return(OK);
762 }
763
764 /*===========================================================================*
765 * w_prepare *
766 *===========================================================================*/
767 PRIVATE struct device *w_prepare(int device)
768 {
769 /* Prepare for I/O on a device. */
770 struct wini *prev_wn;
771 prev_wn = w_wn;
772 w_device = device;
773
774 if (device < NR_MINORS) { /* d0, d0p[0-3], d1, ... */
775 w_drive = device / DEV_PER_DRIVE; /* save drive number */
776 w_wn = &wini[w_drive];
777 w_dv = &w_wn->part[device % DEV_PER_DRIVE];
778 } else
779 if ((unsigned) (device -= MINOR_d0p0s0) < NR_SUBDEVS) {/*d[0-7]p[0-3]s[0-3]*/
780 w_drive = device / SUB_PER_DRIVE;
781 w_wn = &wini[w_drive];
782 w_dv = &w_wn->subpart[device % SUB_PER_DRIVE];
783 } else {
784 w_device = -1;
785 return(NIL_DEV);
786 }
787 return(w_dv);
788 }
789
790 /*===========================================================================*
791 * w_identify *
792 *===========================================================================*/
793 PRIVATE int w_identify()
794 {
795 /* Find out if a device exists, if it is an old AT disk, or a newer ATA
796 * drive, a removable media device, etc.
797 */
798
799 struct wini *wn = w_wn;
800 struct command cmd;
801 int i, s;
802 int id_dma, ultra_dma;
803 u32_t dma_base;
804 u16_t w;
805 unsigned long dma_status;
806 unsigned long size;
807 int prev_wakeup;
808 int r;
809 #define id_byte(n) (&tmp_buf[2 * (n)])
810 #define id_word(n) (((u16_t) id_byte(n)[0] << 0) \
811 |((u16_t) id_byte(n)[1] << 8))
812 #define id_longword(n) (((u32_t) id_byte(n)[0] << 0) \
813 |((u32_t) id_byte(n)[1] << 8) \
814 |((u32_t) id_byte(n)[2] << 16) \
815 |((u32_t) id_byte(n)[3] << 24))
816
817 /* Try to identify the device. */
818 cmd.ldh = wn->ldhpref;
819 cmd.command = ATA_IDENTIFY;
820
821 /* In testing mode, a drive will get ignored at the first timeout. */
822 w_testing = 1;
823
824 /* Execute *_IDENTIFY with configured *_IDENTIFY timeout. */
825 prev_wakeup = wakeup_ticks;
826 wakeup_ticks = w_identify_wakeup_ticks;
827 r = com_simple(&cmd);
828
829 if (r == OK && w_waitfor(STATUS_DRQ, STATUS_DRQ) &&
830 !(wn->w_status & (STATUS_ERR|STATUS_WF))) {
831
832 /* Device information. */
833 if ((s=sys_insw(wn->base_cmd + REG_DATA, SELF, tmp_buf, SECTOR_SIZE)) != OK)
834 panic(w_name(),"Call to sys_insw() failed", s);
835
836 #if 0
837 if (id_word(0) & ID_GEN_NOT_ATA)
838 {
839 printf("%s: not an ATA device?\n", w_name());
840 wakeup_ticks = prev_wakeup;
841 w_testing = 0;
842 return ERR;
843 }
844 #endif
845
846 /* This is an ATA device. */
847 wn->state |= SMART;
848
849 /* Why are the strings byte swapped??? */
850 for (i = 0; i < 40; i++) w_id_string[i] = id_byte(27)[i^1];
851
852 /* Preferred CHS translation mode. */
853 wn->pcylinders = id_word(1);
854 wn->pheads = id_word(3);
855 wn->psectors = id_word(6);
856 size = (u32_t) wn->pcylinders * wn->pheads * wn->psectors;
857
858 w= id_word(ID_CAPABILITIES);
859 if ((w & ID_CAP_LBA) && size > 512L*1024*2) {
860 /* Drive is LBA capable and is big enough to trust it to
861 * not make a mess of it.
862 */
863 wn->ldhpref |= LDH_LBA;
864 size = id_longword(60);
865
866 w= id_word(ID_CSS);
867 if (size < LBA48_CHECK_SIZE)
868 {
869 /* No need to check for LBA48 */
870 }
871 else if (w & ID_CSS_LBA48) {
872 /* Drive is LBA48 capable (and LBA48 is turned on). */
873 if (id_longword(102)) {
874 /* If no. of sectors doesn't fit in 32 bits,
875 * trunacte to this. So it's LBA32 for now.
876 * This can still address devices up to 2TB
877 * though.
878 */
879 size = ULONG_MAX;
880 } else {
881 /* Actual number of sectors fits in 32 bits. */
882 size = id_longword(100);
883 }
884 wn->lba48 = 1;
885 }
886
887 /* Check for DMA. Assume that only LBA capable devices can do
888 * DMA.
889 */
890 w= id_word(ID_CAPABILITIES);
891 id_dma= !!(w & ID_CAP_DMA);
892 w= id_byte(ID_FIELD_VALIDITY)[0];
893 ultra_dma= !!(w & ID_FV_88);
894 dma_base= wn->base_dma;
895 if (dma_base)
896 {
897 if (sys_inb(dma_base + DMA_STATUS, &dma_status) != OK)
898 {
899 panic(w_name(),
900 "unable to read DMA status register",
901 NO_NUM);
902 }
903 }
904 if (disable_dma)
905 ; /* DMA is disabled */
906 else if (id_dma && dma_base)
907 {
908 w= id_word(ID_MULTIWORD_DMA);
909 if (w & (ID_MWDMA_2_SUP|ID_MWDMA_1_SUP|ID_MWDMA_0_SUP))
910 {
911 printf(
912 "%s: multiword DMA modes supported:%s%s%s\n",
913 w_name(),
914 (w & ID_MWDMA_0_SUP) ? " 0" : "",
915 (w & ID_MWDMA_1_SUP) ? " 1" : "",
916 (w & ID_MWDMA_2_SUP) ? " 2" : "");
917 }
918 if (w & (ID_MWDMA_0_SEL|ID_MWDMA_1_SEL|ID_MWDMA_2_SEL))
919 {
920 printf(
921 "%s: multiword DMA mode selected:%s%s%s\n",
922 w_name(),
923 (w & ID_MWDMA_0_SEL) ? " 0" : "",
924 (w & ID_MWDMA_1_SEL) ? " 1" : "",
925 (w & ID_MWDMA_2_SEL) ? " 2" : "");
926 }
927 if (ultra_dma)
928 {
929 w= id_word(ID_ULTRA_DMA);
930 if (w & (ID_UDMA_0_SUP|ID_UDMA_1_SUP|
931 ID_UDMA_2_SUP|ID_UDMA_3_SUP|
932 ID_UDMA_4_SUP|ID_UDMA_5_SUP))
933 {
934 printf(
935 "%s: Ultra DMA modes supported:%s%s%s%s%s%s\n",
936 w_name(),
937 (w & ID_UDMA_0_SUP) ? " 0" : "",
938 (w & ID_UDMA_1_SUP) ? " 1" : "",
939 (w & ID_UDMA_2_SUP) ? " 2" : "",
940 (w & ID_UDMA_3_SUP) ? " 3" : "",
941 (w & ID_UDMA_4_SUP) ? " 4" : "",
942 (w & ID_UDMA_5_SUP) ? " 5" : "");
943 }
944 if (w & (ID_UDMA_0_SEL|ID_UDMA_1_SEL|
945 ID_UDMA_2_SEL|ID_UDMA_3_SEL|
946 ID_UDMA_4_SEL|ID_UDMA_5_SEL))
947 {
948 printf(
949 "%s: Ultra DMA mode selected:%s%s%s%s%s%s\n",
950 w_name(),
951 (w & ID_UDMA_0_SEL) ? " 0" : "",
952 (w & ID_UDMA_1_SEL) ? " 1" : "",
953 (w & ID_UDMA_2_SEL) ? " 2" : "",
954 (w & ID_UDMA_3_SEL) ? " 3" : "",
955 (w & ID_UDMA_4_SEL) ? " 4" : "",
956 (w & ID_UDMA_5_SEL) ? " 5" : "");
957 }
958 }
959 wn->dma= 1;
960 }
961 else if (id_dma || dma_base)
962 {
963 printf("id_dma %d, dma_base 0x%x\n", id_dma, dma_base);
964 }
965 else
966 printf("no DMA support\n");
967
968 #if 0
969 if (wn->dma && wn == &wini[0])
970 {
971 printf("disabling DMA for drive 0\n");
972 wn->dma= 0;
973 }
974 #endif
975 }
976
977 if (wn->lcylinders == 0) {
978 /* No BIOS parameters? Then make some up. */
979 wn->lcylinders = wn->pcylinders;
980 wn->lheads = wn->pheads;
981 wn->lsectors = wn->psectors;
982 while (wn->lcylinders > 1024) {
983 wn->lheads *= 2;
984 wn->lcylinders /= 2;
985 }
986 }
987 #if ENABLE_ATAPI
988 } else
989 if (cmd.command = ATAPI_IDENTIFY,
990 com_simple(&cmd) == OK && w_waitfor(STATUS_DRQ, STATUS_DRQ) &&
991 !(wn->w_status & (STATUS_ERR|STATUS_WF))) {
992 /* An ATAPI device. */
993 wn->state |= ATAPI;
994
995 /* Device information. */
996 if ((s=sys_insw(wn->base_cmd + REG_DATA, SELF, tmp_buf, 512)) != OK)
997 panic(w_name(),"Call to sys_insw() failed", s);
998
999 /* Why are the strings byte swapped??? */
1000 for (i = 0; i < 40; i++) w_id_string[i] = id_byte(27)[i^1];
1001
1002 size = 0; /* Size set later. */
1003 #endif
1004 } else {
1005 /* Not an ATA device; no translations, no special features. Don't
1006 * touch it unless the BIOS knows about it.
1007 */
1008 if (wn->lcylinders == 0) {
1009 wakeup_ticks = prev_wakeup;
1010 w_testing = 0;
1011 return(ERR);
1012 } /* no BIOS parameters */
1013 wn->pcylinders = wn->lcylinders;
1014 wn->pheads = wn->lheads;
1015 wn->psectors = wn->lsectors;
1016 size = (u32_t) wn->pcylinders * wn->pheads * wn->psectors;
1017 }
1018
1019 /* Restore wakeup_ticks and unset testing mode. */
1020 wakeup_ticks = prev_wakeup;
1021 w_testing = 0;
1022
1023 /* Size of the whole drive */
1024 wn->part[0].dv_size = mul64u(size, SECTOR_SIZE);
1025
1026 /* Reset/calibrate (where necessary) */
1027 if (w_specify() != OK && w_specify() != OK) {
1028 return(ERR);
1029 }
1030
1031 if (wn->irq == NO_IRQ) {
1032 /* Everything looks OK; register IRQ so we can stop polling. */
1033 wn->irq = w_drive < 2 ? AT_WINI_0_IRQ : AT_WINI_1_IRQ;
1034 wn->irq_hook_id = wn->irq; /* id to be returned if interrupt occurs */
1035 if ((s=sys_irqsetpolicy(wn->irq, IRQ_REENABLE, &wn->irq_hook_id)) != OK)
1036 panic(w_name(), "couldn't set IRQ policy", s);
1037 if ((s=sys_irqenable(&wn->irq_hook_id)) != OK)
1038 panic(w_name(), "couldn't enable IRQ line", s);
1039 }
1040 wn->state |= IDENTIFIED;
1041 return(OK);
1042 }
1043
1044 /*===========================================================================*
1045 * w_name *
1046 *===========================================================================*/
1047 PRIVATE char *w_name()
1048 {
1049 /* Return a name for the current device. */
1050 static char name[] = "AT0-D0";
1051
1052 name[2] = '0' + w_instance;
1053 name[5] = '0' + w_drive;
1054 return name;
1055 }
1056
1057 /*===========================================================================*
1058 * w_io_test *
1059 *===========================================================================*/
1060 PRIVATE int w_io_test(void)
1061 {
1062 int r, save_dev;
1063 int save_timeout, save_errors, save_wakeup;
1064 iovec_t iov;
1065 #ifdef CD_SECTOR_SIZE
1066 static char buf[CD_SECTOR_SIZE];
1067 #else
1068 static char buf[SECTOR_SIZE];
1069 #endif
1070
1071 iov.iov_addr = (vir_bytes) buf;
1072 iov.iov_size = sizeof(buf);
1073 save_dev = w_device;
1074
1075 /* Reduce timeout values for this test transaction. */
1076 save_timeout = timeout_ticks;
1077 save_errors = max_errors;
1078 save_wakeup = wakeup_ticks;
1079
1080 if (!w_standard_timeouts) {
1081 timeout_ticks = HZ * 4;
1082 wakeup_ticks = HZ * 6;
1083 max_errors = 3;
1084 }
1085
1086 w_testing = 1;
1087
1088 /* Try I/O on the actual drive (not any (sub)partition). */
1089 if (w_prepare(w_drive * DEV_PER_DRIVE) == NIL_DEV)
1090 panic(w_name(), "Couldn't switch devices", NO_NUM);
1091
1092 r = w_transfer(SELF, DEV_GATHER_S, cvu64(0), &iov, 1, 0);
1093
1094 /* Switch back. */
1095 if (w_prepare(save_dev) == NIL_DEV)
1096 panic(w_name(), "Couldn't switch back devices", NO_NUM);
1097
1098 /* Restore parameters. */
1099 timeout_ticks = save_timeout;
1100 max_errors = save_errors;
1101 wakeup_ticks = save_wakeup;
1102 w_testing = 0;
1103
1104 /* Test if everything worked. */
1105 if (r != OK || iov.iov_size != 0) {
1106 return ERR;
1107 }
1108
1109 /* Everything worked. */
1110
1111 return OK;
1112 }
1113
1114 /*===========================================================================*
1115 * w_specify *
1116 *===========================================================================*/
1117 PRIVATE int w_specify()
1118 {
1119 /* Routine to initialize the drive after boot or when a reset is needed. */
1120
1121 struct wini *wn = w_wn;
1122 struct command cmd;
1123
1124 if ((wn->state & DEAF) && w_reset() != OK) {
1125 return(ERR);
1126 }
1127
1128 if (!(wn->state & ATAPI)) {
1129 /* Specify parameters: precompensation, number of heads and sectors. */
1130 cmd.precomp = wn->precomp;
1131 cmd.count = wn->psectors;
1132 cmd.ldh = w_wn->ldhpref | (wn->pheads - 1);
1133 cmd.command = CMD_SPECIFY; /* Specify some parameters */
1134
1135 /* Output command block and see if controller accepts the parameters. */
1136 if (com_simple(&cmd) != OK) return(ERR);
1137
1138 if (!(wn->state & SMART)) {
1139 /* Calibrate an old disk. */
1140 cmd.sector = 0;
1141 cmd.cyl_lo = 0;
1142 cmd.cyl_hi = 0;
1143 cmd.ldh = w_wn->ldhpref;
1144 cmd.command = CMD_RECALIBRATE;
1145
1146 if (com_simple(&cmd) != OK) return(ERR);
1147 }
1148 }
1149 wn->state |= INITIALIZED;
1150 return(OK);
1151 }
1152
1153 /*===========================================================================*
1154 * do_transfer *
1155 *===========================================================================*/
1156 PRIVATE int do_transfer(struct wini *wn, unsigned int precomp,
1157 unsigned int count, unsigned int sector,
1158 unsigned int opcode, int do_dma)
1159 {
1160 struct command cmd;
1161 unsigned int sector_high;
1162 unsigned secspcyl = wn->pheads * wn->psectors;
1163 int do_lba48;
1164
1165 sector_high= 0; /* For future extensions */
1166
1167 do_lba48= 0;
1168 if (sector >= LBA48_CHECK_SIZE || sector_high != 0)
1169 {
1170 if (wn->lba48)
1171 do_lba48= 1;
1172 else if (sector > LBA_MAX_SIZE || sector_high != 0)
1173 {
1174 /* Strange sector count for LBA device */
1175 return EIO;
1176 }
1177 }
1178
1179 cmd.precomp = precomp;
1180 cmd.count = count;
1181 if (do_dma)
1182 {
1183 cmd.command = opcode == DEV_SCATTER_S ? CMD_WRITE_DMA :
1184 CMD_READ_DMA;
1185 }
1186 else
1187 cmd.command = opcode == DEV_SCATTER_S ? CMD_WRITE : CMD_READ;
1188
1189 if (do_lba48) {
1190 if (do_dma)
1191 {
1192 cmd.command = ((opcode == DEV_SCATTER_S) ?
1193 CMD_WRITE_DMA_EXT : CMD_READ_DMA_EXT);
1194 }
1195 else
1196 {
1197 cmd.command = ((opcode == DEV_SCATTER_S) ?
1198 CMD_WRITE_EXT : CMD_READ_EXT);
1199 }
1200 cmd.count_prev= (count >> 8);
1201 cmd.sector = (sector >> 0) & 0xFF;
1202 cmd.cyl_lo = (sector >> 8) & 0xFF;
1203 cmd.cyl_hi = (sector >> 16) & 0xFF;
1204 cmd.sector_prev= (sector >> 24) & 0xFF;
1205 cmd.cyl_lo_prev= (sector_high) & 0xFF;
1206 cmd.cyl_hi_prev= (sector_high >> 8) & 0xFF;
1207 cmd.ldh = wn->ldhpref;
1208
1209 return com_out_ext(&cmd);
1210 } else if (wn->ldhpref & LDH_LBA) {
1211 cmd.sector = (sector >> 0) & 0xFF;
1212 cmd.cyl_lo = (sector >> 8) & 0xFF;
1213 cmd.cyl_hi = (sector >> 16) & 0xFF;
1214 cmd.ldh = wn->ldhpref | ((sector >> 24) & 0xF);
1215 } else {
1216 int cylinder, head, sec;
1217 cylinder = sector / secspcyl;
1218 head = (sector % secspcyl) / wn->psectors;
1219 sec = sector % wn->psectors;
1220 cmd.sector = sec + 1;
1221 cmd.cyl_lo = cylinder & BYTE;
1222 cmd.cyl_hi = (cylinder >> 8) & BYTE;
1223 cmd.ldh = wn->ldhpref | head;
1224 }
1225
1226 return com_out(&cmd);
1227 }
1228
1229 /*===========================================================================*
1230 * w_transfer *
1231 *===========================================================================*/
1232 PRIVATE int w_transfer(proc_nr, opcode, position, iov, nr_req, safe)
1233 int proc_nr; /* process doing the request */
1234 int opcode; /* DEV_GATHER_S or DEV_SCATTER_S */
1235 u64_t position; /* offset on device to read or write */
1236 iovec_t *iov; /* pointer to read or write request vector */
1237 unsigned nr_req; /* length of request vector */
1238 int safe; /* iov contains addresses (0) or grants? */
1239 {
1240 struct wini *wn = w_wn;
1241 iovec_t *iop, *iov_end = iov + nr_req;
1242 int n, r, s, errors, do_dma, do_write, do_copyout;
1243 unsigned long v, block, w_status;
1244 u64_t dv_size = w_dv->dv_size;
1245 unsigned cylinder, head, sector, nbytes;
1246 unsigned dma_buf_offset;
1247 size_t addr_offset = 0;
1248
1249 #if ENABLE_ATAPI
1250 if (w_wn->state & ATAPI) {
1251 return atapi_transfer(proc_nr, opcode, position, iov, nr_req, safe);
1252 }
1253 #endif
1254
1255 /* Check disk address. */
1256 if (rem64u(position, SECTOR_SIZE) != 0) return(EINVAL);
1257
1258 errors = 0;
1259
1260 while (nr_req > 0) {
1261 /* How many bytes to transfer? */
1262 nbytes = 0;
1263 for (iop = iov; iop < iov_end; iop++) nbytes += iop->iov_size;
1264 if ((nbytes & SECTOR_MASK) != 0) return(EINVAL);
1265
1266 /* Which block on disk and how close to EOF? */
1267 if (cmp64(position, dv_size) >= 0) return(OK); /* At EOF */
1268 if (cmp64(add64ul(position, nbytes), dv_size) > 0)
1269 nbytes = diff64(dv_size, position);
1270 block = div64u(add64(w_dv->dv_base, position), SECTOR_SIZE);
1271
1272 do_dma= wn->dma;
1273 do_write= (opcode == DEV_SCATTER_S);
1274
1275 if (nbytes >= wn->max_count) {
1276 /* The drive can't do more then max_count at once. */
1277 nbytes = wn->max_count;
1278 }
1279
1280 /* First check to see if a reinitialization is needed. */
1281 if (!(wn->state & INITIALIZED) && w_specify() != OK) return(EIO);
1282
1283 if (do_dma)
1284 {
1285 setup_dma(&nbytes, proc_nr, iov, do_write, &do_copyout, safe);
1286 #if 0
1287 printf("nbytes = %d\n", nbytes);
1288 #endif
1289 }
1290
1291 /* Tell the controller to transfer nbytes bytes. */
1292 r = do_transfer(wn, wn->precomp, (nbytes >> SECTOR_SHIFT),
1293 block, opcode, do_dma);
1294
1295 if (opcode == DEV_SCATTER_S) {
1296 /* The specs call for a 400 ns wait after issuing the command.
1297 * Reading the alternate status register is the suggested
1298 * way to implement this wait.
1299 */
1300 if (sys_inb((wn->base_ctl+REG_CTL_ALTSTAT), &w_status) != OK)
1301 panic(w_name(), "couldn't get status", NO_NUM);
1302 }
1303
1304 if (do_dma)
1305 {
1306 /* Wait for the interrupt, check DMA status and optionally
1307 * copy out.
1308 */
1309
1310 if ((r = at_intr_wait()) != OK)
1311 {
1312 /* Don't retry if sector marked bad or too many
1313 * errors.
1314 */
1315 if (r == ERR_BAD_SECTOR || ++errors == max_errors) {
1316 w_command = CMD_IDLE;
1317 return(EIO);
1318 }
1319 continue;
1320 }
1321
1322 /* Wait for DMA_ST_INT to get set */
1323 w_waitfor_dma(DMA_ST_INT, DMA_ST_INT);
1324
1325 r= sys_inb(wn->base_dma + DMA_STATUS, &v);
1326 if (r != 0) panic("at_wini", "w_transfer: sys_inb failed", r);
1327
1328 #if 0
1329 printf("dma_status: 0x%x\n", v);
1330 #endif
1331 if (!(v & DMA_ST_INT))
1332 {
1333 /* DMA did not complete successfully */
1334 if (v & DMA_ST_BM_ACTIVE)
1335 panic(w_name(), "DMA did not complete", NO_NUM);
1336 else if (v & DMA_ST_ERROR)
1337 {
1338 printf("at_wini: DMA error\n");
1339 r= EIO;
1340 break;
1341 }
1342 else
1343 {
1344 #if 0
1345 printf("DMA buffer too small\n");
1346 #endif
1347 panic(w_name(), "DMA buffer too small", NO_NUM);
1348 }
1349 }
1350 else if (v & DMA_ST_BM_ACTIVE)
1351 panic(w_name(), "DMA buffer too large", NO_NUM);
1352
1353 dma_buf_offset= 0;
1354 while (r == OK && nbytes > 0)
1355 {
1356 n= iov->iov_size;
1357 if (n > nbytes)
1358 n= nbytes;
1359
1360 if (do_copyout)
1361 {
1362 if(safe) {
1363 s= sys_safecopyto(proc_nr, iov->iov_addr,
1364 addr_offset,
1365 (vir_bytes)dma_buf+dma_buf_offset, n, D);
1366 } else {
1367 s= sys_vircopy(SELF, D,
1368 (vir_bytes)dma_buf+dma_buf_offset,
1369 proc_nr, D,
1370 iov->iov_addr + addr_offset, n);
1371 }
1372 if (s != OK)
1373 {
1374 panic(w_name(),
1375 "w_transfer: sys_vircopy failed",
1376 s);
1377 }
1378 }
1379
1380 /* Book the bytes successfully transferred. */
1381 nbytes -= n;
1382 position= add64ul(position, n);
1383 if ((iov->iov_size -= n) == 0) {
1384 iov++; nr_req--; addr_offset = 0;
1385 }
1386 dma_buf_offset += n;
1387 }
1388 }
1389
1390 while (r == OK && nbytes > 0) {
1391 /* For each sector, wait for an interrupt and fetch the data
1392 * (read), or supply data to the controller and wait for an
1393 * interrupt (write).
1394 */
1395
1396 if (opcode == DEV_GATHER_S) {
1397 /* First an interrupt, then data. */
1398 if ((r = at_intr_wait()) != OK) {
1399 /* An error, send data to the bit bucket. */
1400 if (w_wn->w_status & STATUS_DRQ) {
1401 if ((s=sys_insw(wn->base_cmd+REG_DATA,
1402 SELF, tmp_buf,
1403 SECTOR_SIZE)) != OK)
1404 {
1405 panic(w_name(),
1406 "Call to sys_insw() failed",
1407 s);
1408 }
1409 }
1410 break;
1411 }
1412 }
1413
1414 /* Wait for busy to clear. */
1415 if (!w_waitfor(STATUS_BSY, 0)) { r = ERR; break; }
1416
1417 /* Wait for data transfer requested. */
1418 if (!w_waitfor(STATUS_DRQ, STATUS_DRQ)) { r = ERR; break; }
1419
1420 /* Copy bytes to or from the device's buffer. */
1421 if (opcode == DEV_GATHER_S) {
1422 if(safe) {
1423 s=sys_safe_insw(wn->base_cmd + REG_DATA, proc_nr,
1424 (void *) (iov->iov_addr), addr_offset,
1425 SECTOR_SIZE);
1426 } else {
1427 s=sys_insw(wn->base_cmd + REG_DATA, proc_nr,
1428 (void *) (iov->iov_addr + addr_offset),
1429 SECTOR_SIZE);
1430 }
1431 if(s != OK) {
1432 panic(w_name(),"Call to sys_insw() failed", s);
1433 }
1434 } else {
1435 if(safe) {
1436 s=sys_safe_outsw(wn->base_cmd + REG_DATA, proc_nr,
1437 (void *) (iov->iov_addr), addr_offset,
1438 SECTOR_SIZE);
1439 } else {
1440 s=sys_outsw(wn->base_cmd + REG_DATA, proc_nr,
1441 (void *) (iov->iov_addr + addr_offset),
1442 SECTOR_SIZE);
1443 }
1444
1445 if(s != OK) {
1446 panic(w_name(),"Call to sys_outsw() failed",
1447 s);
1448 }
1449
1450 /* Data sent, wait for an interrupt. */
1451 if ((r = at_intr_wait()) != OK) break;
1452 }
1453
1454 /* Book the bytes successfully transferred. */
1455 nbytes -= SECTOR_SIZE;
1456 position= add64u(position, SECTOR_SIZE);
1457 addr_offset += SECTOR_SIZE;
1458 if ((iov->iov_size -= SECTOR_SIZE) == 0) {
1459 iov++;
1460 nr_req--;
1461 addr_offset = 0;
1462 }
1463 }
1464
1465 /* Any errors? */
1466 if (r != OK) {
1467 /* Don't retry if sector marked bad or too many errors. */
1468 if (r == ERR_BAD_SECTOR || ++errors == max_errors) {
1469 w_command = CMD_IDLE;
1470 return(EIO);
1471 }
1472 }
1473 }
1474
1475 w_command = CMD_IDLE;
1476 return(OK);
1477 }
1478
1479 /*===========================================================================*
1480 * com_out *
1481 *===========================================================================*/
1482 PRIVATE int com_out(cmd)
1483 struct command *cmd; /* Command block */
1484 {
1485 /* Output the command block to the winchester controller and return status */
1486
1487 struct wini *wn = w_wn;
1488 unsigned base_cmd = wn->base_cmd;
1489 unsigned base_ctl = wn->base_ctl;
1490 pvb_pair_t outbyte[7]; /* vector for sys_voutb() */
1491 int s; /* status for sys_(v)outb() */
1492
1493 if (w_wn->state & IGNORING) return ERR;
1494
1495 if (!w_waitfor(STATUS_BSY, 0)) {
1496 printf("%s: controller not ready\n", w_name());
1497 return(ERR);
1498 }
1499
1500 /* Select drive. */
1501 if ((s=sys_outb(base_cmd + REG_LDH, cmd->ldh)) != OK)
1502 panic(w_name(),"Couldn't write register to select drive",s);
1503
1504 if (!w_waitfor(STATUS_BSY, 0)) {
1505 printf("%s: com_out: drive not ready\n", w_name());
1506 return(ERR);
1507 }
1508
1509 /* Schedule a wakeup call, some controllers are flaky. This is done with
1510 * a synchronous alarm. If a timeout occurs a SYN_ALARM message is sent
1511 * from HARDWARE, so that w_intr_wait() can call w_timeout() in case the
1512 * controller was not able to execute the command. Leftover timeouts are
1513 * simply ignored by the main loop.
1514 */
1515 sys_setalarm(wakeup_ticks, 0);
1516
1517 wn->w_status = STATUS_ADMBSY;
1518 w_command = cmd->command;
1519 pv_set(outbyte[0], base_ctl + REG_CTL, wn->pheads >= 8 ? CTL_EIGHTHEADS : 0);
1520 pv_set(outbyte[1], base_cmd + REG_PRECOMP, cmd->precomp);
1521 pv_set(outbyte[2], base_cmd + REG_COUNT, cmd->count);
1522 pv_set(outbyte[3], base_cmd + REG_SECTOR, cmd->sector);
1523 pv_set(outbyte[4], base_cmd + REG_CYL_LO, cmd->cyl_lo);
1524 pv_set(outbyte[5], base_cmd + REG_CYL_HI, cmd->cyl_hi);
1525 pv_set(outbyte[6], base_cmd + REG_COMMAND, cmd->command);
1526 if ((s=sys_voutb(outbyte,7)) != OK)
1527 panic(w_name(),"Couldn't write registers with sys_voutb()",s);
1528 return(OK);
1529 }
1530
1531 /*===========================================================================*
1532 * com_out_ext *
1533 *===========================================================================*/
1534 PRIVATE int com_out_ext(cmd)
1535 struct command *cmd; /* Command block */
1536 {
1537 /* Output the command block to the winchester controller and return status */
1538
1539 struct wini *wn = w_wn;
1540 unsigned base_cmd = wn->base_cmd;
1541 unsigned base_ctl = wn->base_ctl;
1542 pvb_pair_t outbyte[11]; /* vector for sys_voutb() */
1543 int s; /* status for sys_(v)outb() */
1544 unsigned long w_status;
1545
1546 if (w_wn->state & IGNORING) return ERR;
1547
1548 if (!w_waitfor(STATUS_BSY, 0)) {
1549 printf("%s: controller not ready\n", w_name());
1550 return(ERR);
1551 }
1552
1553 /* Select drive. */
1554 if ((s=sys_outb(base_cmd + REG_LDH, cmd->ldh)) != OK)
1555 panic(w_name(),"Couldn't write register to select drive",s);
1556
1557 if (!w_waitfor(STATUS_BSY, 0)) {
1558 printf("%s: com_out: drive not ready\n", w_name());
1559 return(ERR);
1560 }
1561
1562 /* Schedule a wakeup call, some controllers are flaky. This is done with
1563 * a synchronous alarm. If a timeout occurs a SYN_ALARM message is sent
1564 * from HARDWARE, so that w_intr_wait() can call w_timeout() in case the
1565 * controller was not able to execute the command. Leftover timeouts are
1566 * simply ignored by the main loop.
1567 */
1568 sys_setalarm(wakeup_ticks, 0);
1569
1570 wn->w_status = STATUS_ADMBSY;
1571 w_command = cmd->command;
1572 pv_set(outbyte[0], base_ctl + REG_CTL, 0);
1573 pv_set(outbyte[1], base_cmd + REG_COUNT, cmd->count_prev);
1574 pv_set(outbyte[2], base_cmd + REG_SECTOR, cmd->sector_prev);
1575 pv_set(outbyte[3], base_cmd + REG_CYL_LO, cmd->cyl_lo_prev);
1576 pv_set(outbyte[4], base_cmd + REG_CYL_HI, cmd->cyl_hi_prev);
1577 pv_set(outbyte[5], base_cmd + REG_COUNT, cmd->count);
1578 pv_set(outbyte[6], base_cmd + REG_SECTOR, cmd->sector);
1579 pv_set(outbyte[7], base_cmd + REG_CYL_LO, cmd->cyl_lo);
1580 pv_set(outbyte[8], base_cmd + REG_CYL_HI, cmd->cyl_hi);
1581
1582 pv_set(outbyte[10], base_cmd + REG_COMMAND, cmd->command);
1583 if ((s=sys_voutb(outbyte, 11)) != OK)
1584 panic(w_name(),"Couldn't write registers with sys_voutb()",s);
1585
1586 return(OK);
1587 }
1588
1589 /*===========================================================================*
1590 * setup_dma *
1591 *===========================================================================*/
1592 PRIVATE void setup_dma(sizep, proc_nr, iov, do_write, do_copyoutp, safe)
1593 unsigned *sizep;
1594 int proc_nr;
1595 iovec_t *iov;
1596 int do_write;
1597 int *do_copyoutp;
1598 int safe;
1599 {
1600 phys_bytes phys, user_phys;
1601 unsigned n, offset, size;
1602 int i, j, r, bad;
1603 unsigned long v;
1604 struct wini *wn = w_wn;
1605
1606 /* First try direct scatter/gather to the supplied buffers */
1607 size= *sizep;
1608 i= 0; /* iov index */
1609 j= 0; /* prdt index */
1610 bad= 0;
1611 offset= 0; /* Offset in current iov */
1612
1613 #if 0
1614 printf("setup_dma: proc_nr %d\n", proc_nr);
1615 #endif
1616
1617 while (size > 0)
1618 {
1619 #if 0
1620 printf(
1621 "setup_dma: iov[%d]: addr 0x%x, size %d offset %d, size %d\n",
1622 i, iov[i].iov_addr, iov[i].iov_size, offset, size);
1623 #endif
1624
1625 n= iov[i].iov_size-offset;
1626 if (n > size)
1627 n= size;
1628 if (n == 0 || (n & 1))
1629 panic("at_wini", "bad size in iov", iov[i].iov_size);
1630 if(safe) {
1631 r= sys_umap(proc_nr, GRANT_SEG, iov[i].iov_addr, n,&user_phys);
1632 user_phys += offset;
1633 } else {
1634 r= sys_umap(proc_nr, D, iov[i].iov_addr+offset, n, &user_phys);
1635 }
1636 if (r != 0)
1637 panic("at_wini", "can't map user buffer", r);
1638 if (user_phys & 1)
1639 {
1640 /* Buffer is not aligned */
1641 printf("setup_dma: user buffer is not aligned\n");
1642 bad= 1;
1643 break;
1644 }
1645
1646 /* vector is not allowed to cross a 64K boundary */
1647 if (user_phys/0x10000 != (user_phys+n-1)/0x10000)
1648 n= ((user_phys/0x10000)+1)*0x10000 - user_phys;
1649
1650 /* vector is not allowed to be bigger than 64K, but we get that
1651 * for free.
1652 */
1653
1654 if (j >= N_PRDTE)
1655 {
1656 /* Too many entries */
1657 bad= 1;
1658 break;
1659 }
1660
1661 prdt[j].prdte_base= user_phys;
1662 prdt[j].prdte_count= n;
1663 prdt[j].prdte_reserved= 0;
1664 prdt[j].prdte_flags= 0;
1665 j++;
1666
1667 offset += n;
1668 if (offset >= iov[i].iov_size)
1669 {
1670 i++;
1671 offset= 0;
1672 }
1673
1674 size -= n;
1675 }
1676
1677 if (!bad)
1678 {
1679 if (j <= 0 || j > N_PRDTE)
1680 panic("at_wini", "bad prdt index", j);
1681 prdt[j-1].prdte_flags |= PRDTE_FL_EOT;
1682
1683 #if 0
1684 for (i= 0; i<j; i++)
1685 {
1686 printf("prdt[%d]: base 0x%x, size %d, flags 0x%x\n",
1687 i, prdt[i].prdte_base, prdt[i].prdte_count,
1688 prdt[i].prdte_flags);
1689 }
1690 #endif
1691 }
1692
1693 /* The caller needs to perform a copy-out from the dma buffer if
1694 * this is a read request and we can't DMA directly to the user's
1695 * buffers.
1696 */
1697 *do_copyoutp= (!do_write && bad);
1698
1699 if (bad)
1700 {
1701 /* Adjust request size */
1702 size= *sizep;
1703 if (size > ATA_DMA_BUF_SIZE)
1704 *sizep= size= ATA_DMA_BUF_SIZE;
1705
1706 if (do_write)
1707 {
1708 /* Copy-in */
1709 for (offset= 0; offset < size; offset += n)
1710 {
1711 n= size-offset;
1712 if (n > iov->iov_size)
1713 n= iov->iov_size;
1714
1715 if(safe) {
1716 r= sys_safecopyfrom(proc_nr, iov->iov_addr,
1717 0, (vir_bytes)dma_buf+offset, n, D);
1718 } else {
1719 r= sys_vircopy(proc_nr, D, iov->iov_addr,
1720 SELF, D, (vir_bytes)dma_buf+offset,
1721 n);
1722 }
1723 if (r != OK)
1724 {
1725 panic(w_name(),
1726 "setup_dma: sys_vircopy failed",
1727 r);
1728 }
1729 iov++;
1730 }
1731 }
1732
1733 /* Fill-in the physical region descriptor table */
1734 phys= dma_buf_phys;
1735 if (phys & 1)
1736 {
1737 /* Two byte alignment is required */
1738 panic("at_wini", "bad buffer alignment in setup_dma",
1739 phys);
1740 }
1741 for (j= 0; j<N_PRDTE; i++)
1742 {
1743 if (size == 0)
1744 {
1745 panic("at_wini", "bad size in setup_dma",
1746 size);
1747 }
1748 if (size & 1)
1749 {
1750 /* Two byte alignment is required for size */
1751 panic("at_wini",
1752 "bad size alignment in setup_dma",
1753 size);
1754 }
1755 n= size;
1756
1757 /* Buffer is not allowed to cross a 64K boundary */
1758 if (phys / 0x10000 != (phys+n-1) / 0x10000)
1759 {
1760 n= ((phys/0x10000)+1)*0x10000 - phys;
1761 }
1762 prdt[j].prdte_base= phys;
1763 prdt[j].prdte_count= n;
1764 prdt[j].prdte_reserved= 0;
1765 prdt[j].prdte_flags= 0;
1766
1767 size -= n;
1768 if (size == 0)
1769 {
1770 prdt[j].prdte_flags |= PRDTE_FL_EOT;
1771 break;
1772 }
1773 }
1774 if (size != 0)
1775 panic("at_wini", "size to large for prdt", NO_NUM);
1776
1777 #if 0
1778 for (i= 0; i<=j; i++)
1779 {
1780 printf("prdt[%d]: base 0x%x, size %d, flags 0x%x\n",
1781 i, prdt[i].prdte_base, prdt[i].prdte_count,
1782 prdt[i].prdte_flags);
1783 }
1784 #endif
1785 }
1786
1787 /* Stop bus master operation */
1788 r= sys_outb(wn->base_dma + DMA_COMMAND, 0);
1789 if (r != 0) panic("at_wini", "setup_dma: sys_outb failed", r);
1790
1791 /* Verify that the bus master is not active */
1792 r= sys_inb(wn->base_dma + DMA_STATUS, &v);
1793 if (r != 0) panic("at_wini", "setup_dma: sys_inb failed", r);
1794 if (v & DMA_ST_BM_ACTIVE)
1795 panic("at_wini", "Bus master IDE active", NO_NUM);
1796
1797 if (prdt_phys & 3)
1798 panic("at_wini", "prdt not aligned", prdt_phys);
1799 r= sys_outl(wn->base_dma + DMA_PRDTP, prdt_phys);
1800 if (r != 0) panic("at_wini", "setup_dma: sys_outl failed", r);
1801
1802 /* Clear interrupt and error flags */
1803 r= sys_outb(wn->base_dma + DMA_STATUS, DMA_ST_INT | DMA_ST_ERROR);
1804 if (r != 0) panic("at_wini", "setup_dma: sys_outb failed", r);
1805
1806 /* Assume disk reads. Start DMA */
1807 v= DMA_CMD_START;
1808 if (!do_write)
1809 {
1810 /* Disk reads generate PCI write cycles. */
1811 v |= DMA_CMD_WRITE;
1812 }
1813 r= sys_outb(wn->base_dma + DMA_COMMAND, v);
1814 if (r != 0) panic("at_wini", "setup_dma: sys_outb failed", r);
1815
1816 #if 0
1817 r= sys_inb(wn->base_dma + DMA_STATUS, &v);
1818 if (r != 0) panic("at_wini", "setup_dma: sys_inb failed", r);
1819 printf("dma status: 0x%x\n", v);
1820 #endif
1821 }
1822
1823
1824 /*===========================================================================*
1825 * w_need_reset *
1826 *===========================================================================*/
1827 PRIVATE void w_need_reset()
1828 {
1829 /* The controller needs to be reset. */
1830 struct wini *wn;
1831 int dr = 0;
1832
1833 for (wn = wini; wn < &wini[MAX_DRIVES]; wn++, dr++) {
1834 if (wn->base_cmd == w_wn->base_cmd) {
1835 wn->state |= DEAF;
1836 wn->state &= ~INITIALIZED;
1837 }
1838 }
1839 }
1840
1841 /*===========================================================================*
1842 * w_do_close *
1843 *===========================================================================*/
1844 PRIVATE int w_do_close(dp, m_ptr)
1845 struct driver *dp;
1846 message *m_ptr;
1847 {
1848 /* Device close: Release a device. */
1849 if (w_prepare(m_ptr->DEVICE) == NIL_DEV)
1850 return(ENXIO);
1851 w_wn->open_ct--;
1852 #if ENABLE_ATAPI
1853 if (w_wn->open_ct == 0 && (w_wn->state & ATAPI)) atapi_close();
1854 #endif
1855 return(OK);
1856 }
1857
1858 /*===========================================================================*
1859 * com_simple *
1860 *===========================================================================*/
1861 PRIVATE int com_simple(cmd)
1862 struct command *cmd; /* Command block */
1863 {
1864 /* A simple controller command, only one interrupt and no data-out phase. */
1865 int r;
1866
1867 if (w_wn->state & IGNORING) return ERR;
1868
1869 if ((r = com_out(cmd)) == OK) r = at_intr_wait();
1870 w_command = CMD_IDLE;
1871 return(r);
1872 }
1873
1874 /*===========================================================================*
1875 * w_timeout *
1876 *===========================================================================*/
1877 PRIVATE void w_timeout(void)
1878 {
1879 struct wini *wn = w_wn;
1880
1881 switch (w_command) {
1882 case CMD_IDLE:
1883 break; /* fine */
1884 case CMD_READ:
1885 case CMD_READ_EXT:
1886 case CMD_WRITE:
1887 case CMD_WRITE_EXT:
1888 /* Impossible, but not on PC's: The controller does not respond. */
1889
1890 /* Limiting multisector I/O seems to help. */
1891 if (wn->max_count > 8 * SECTOR_SIZE) {
1892 wn->max_count = 8 * SECTOR_SIZE;
1893 } else {
1894 wn->max_count = SECTOR_SIZE;
1895 }
1896 /*FALL THROUGH*/
1897 default:
1898 /* Some other command. */
1899 if (w_testing) wn->state |= IGNORING; /* Kick out this drive. */
1900 else if (!w_silent) printf("%s: timeout on command 0x%02x\n",
1901 w_name(), w_command);
1902 w_need_reset();
1903 wn->w_status = 0;
1904 }
1905 }
1906
1907 /*===========================================================================*
1908 * w_reset *
1909 *===========================================================================*/
1910 PRIVATE int w_reset()
1911 {
1912 /* Issue a reset to the controller. This is done after any catastrophe,
1913 * like the controller refusing to respond.
1914 */
1915 int s;
1916 struct wini *wn = w_wn;
1917
1918 /* Don't bother if this drive is forgotten. */
1919 if (w_wn->state & IGNORING) return ERR;
1920
1921 /* Wait for any internal drive recovery. */
1922 tickdelay(RECOVERY_TICKS);
1923
1924 /* Strobe reset bit */
1925 if ((s=sys_outb(wn->base_ctl + REG_CTL, CTL_RESET)) != OK)
1926 panic(w_name(),"Couldn't strobe reset bit",s);
1927 tickdelay(DELAY_TICKS);
1928 if ((s=sys_outb(wn->base_ctl + REG_CTL, 0)) != OK)
1929 panic(w_name(),"Couldn't strobe reset bit",s);
1930 tickdelay(DELAY_TICKS);
1931
1932 /* Wait for controller ready */
1933 if (!w_waitfor(STATUS_BSY, 0)) {
1934 printf("%s: reset failed, drive busy\n", w_name());
1935 return(ERR);
1936 }
1937
1938 /* The error register should be checked now, but some drives mess it up. */
1939
1940 for (wn = wini; wn < &wini[MAX_DRIVES]; wn++) {
1941 if (wn->base_cmd == w_wn->base_cmd) {
1942 wn->state &= ~DEAF;
1943 if (w_wn->irq_need_ack) {
1944 /* Make sure irq is actually enabled.. */
1945 sys_irqenable(&w_wn->irq_hook_id);
1946 }
1947 }
1948 }
1949
1950
1951 return(OK);
1952 }
1953
1954 /*===========================================================================*
1955 * w_intr_wait *
1956 *===========================================================================*/
1957 PRIVATE void w_intr_wait()
1958 {
1959 /* Wait for a task completion interrupt. */
1960
1961 int r;
1962 unsigned long w_status;
1963 message m;
1964
1965 if (w_wn->irq != NO_IRQ) {
1966 /* Wait for an interrupt that sets w_status to "not busy".
1967 * (w_timeout() also clears w_status.)
1968 */
1969 while (w_wn->w_status & (STATUS_ADMBSY|STATUS_BSY)) {
1970 int rr;
1971 if((rr=receive(ANY, &m)) != OK)
1972 panic("at_wini", "receive(ANY) failed", rr);
1973 switch(m.m_type) {
1974 case SYN_ALARM:
1975 /* Timeout. */
1976 w_timeout(); /* a.o. set w_status */
1977 break;
1978 case HARD_INT:
1979 /* Interrupt. */
1980 r= sys_inb(w_wn->base_cmd + REG_STATUS, &w_status);
1981 if (r != 0)
1982 panic("at_wini", "sys_inb failed", r);
1983 w_wn->w_status= w_status;
1984 ack_irqs(m.NOTIFY_ARG);
1985 break;
1986 case DEV_PING:
1987 /* RS monitor ping. */
1988 notify(m.m_source);
1989 break;
1990 default:
1991 /* unhandled message.
1992 * queue it and handle it in the libdriver loop.
1993 */
1994 mq_queue(&m);
1995 }
1996 }
1997 } else {
1998 /* Interrupt not yet allocated; use polling. */
1999 (void) w_waitfor(STATUS_BSY, 0);
2000 }
2001 }
2002
2003 /*===========================================================================*
2004 * at_intr_wait *
2005 *===========================================================================*/
2006 PRIVATE int at_intr_wait()
2007 {
2008 /* Wait for an interrupt, study the status bits and return error/success. */
2009 int r, s;
2010 unsigned long inbval;
2011
2012 w_intr_wait();
2013 if ((w_wn->w_status & (STATUS_BSY | STATUS_WF | STATUS_ERR)) == 0) {
2014 r = OK;
2015 } else {
2016 if ((s=sys_inb(w_wn->base_cmd + REG_ERROR, &inbval)) != OK)
2017 panic(w_name(),"Couldn't read register",s);
2018 if ((w_wn->w_status & STATUS_ERR) && (inbval & ERROR_BB)) {
2019 r = ERR_BAD_SECTOR; /* sector marked bad, retries won't help */
2020 } else {
2021 r = ERR; /* any other error */
2022 }
2023 }
2024 w_wn->w_status |= STATUS_ADMBSY; /* assume still busy with I/O */
2025 return(r);
2026 }
2027
2028 /*===========================================================================*
2029 * w_waitfor *
2030 *===========================================================================*/
2031 PRIVATE int w_waitfor(mask, value)
2032 int mask; /* status mask */
2033 int value; /* required status */
2034 {
2035 /* Wait until controller is in the required state. Return zero on timeout.
2036 * An alarm that set a timeout flag is used. TIMEOUT is in micros, we need
2037 * ticks. Disabling the alarm is not needed, because a static flag is used
2038 * and a leftover timeout cannot do any harm.
2039 */
2040 unsigned long w_status;
2041 clock_t t0, t1;
2042 int s;
2043
2044 getuptime(&t0);
2045 do {
2046 if ((s=sys_inb(w_wn->base_cmd + REG_STATUS, &w_status)) != OK)
2047 panic(w_name(),"Couldn't read register",s);
2048 w_wn->w_status= w_status;
2049 if ((w_wn->w_status & mask) == value) {
2050 return 1;
2051 }
2052 } while ((s=getuptime(&t1)) == OK && (t1-t0) < timeout_ticks );
2053 if (OK != s) printf("AT_WINI: warning, get_uptime failed: %d\n",s);
2054
2055 w_need_reset(); /* controller gone deaf */
2056 return(0);
2057 }
2058
2059 /*===========================================================================*
2060 * w_waitfor_dma *
2061 *===========================================================================*/
2062 PRIVATE int w_waitfor_dma(mask, value)
2063 int mask; /* status mask */
2064 int value; /* required status */
2065 {
2066 /* Wait until controller is in the required state. Return zero on timeout.
2067 * An alarm that set a timeout flag is used. TIMEOUT is in micros, we need
2068 * ticks. Disabling the alarm is not needed, because a static flag is used
2069 * and a leftover timeout cannot do any harm.
2070 */
2071 unsigned long w_status;
2072 clock_t t0, t1;
2073 int s;
2074
2075 getuptime(&t0);
2076 do {
2077 if ((s=sys_inb(w_wn->base_dma + DMA_STATUS, &w_status)) != OK)
2078 panic(w_name(),"Couldn't read register",s);
2079 if ((w_status & mask) == value) {
2080 return 1;
2081 }
2082 } while ((s=getuptime(&t1)) == OK && (t1-t0) < timeout_ticks );
2083 if (OK != s) printf("AT_WINI: warning, get_uptime failed: %d\n",s);
2084
2085 return(0);
2086 }
2087
2088 /*===========================================================================*
2089 * w_geometry *
2090 *===========================================================================*/
2091 PRIVATE void w_geometry(entry)
2092 struct partition *entry;
2093 {
2094 struct wini *wn = w_wn;
2095
2096 if (wn->state & ATAPI) { /* Make up some numbers. */
2097 entry->cylinders = div64u(wn->part[0].dv_size, SECTOR_SIZE) / (64*32);
2098 entry->heads = 64;
2099 entry->sectors = 32;
2100 } else { /* Return logical geometry. */
2101 entry->cylinders = wn->lcylinders;
2102 entry->heads = wn->lheads;
2103 entry->sectors = wn->lsectors;
2104 }
2105 }
2106
2107 #if ENABLE_ATAPI
2108 /*===========================================================================*
2109 * atapi_open *
2110 *===========================================================================*/
2111 PRIVATE int atapi_open()
2112 {
2113 /* Should load and lock the device and obtain its size. For now just set the
2114 * size of the device to something big. What is really needed is a generic
2115 * SCSI layer that does all this stuff for ATAPI and SCSI devices (kjb). (XXX)
2116 */
2117 w_wn->part[0].dv_size = mul64u(800L*1024, 1024);
2118 return(OK);
2119 }
2120
2121 /*===========================================================================*
2122 * atapi_close *
2123 *===========================================================================*/
2124 PRIVATE void atapi_close()
2125 {
2126 /* Should unlock the device. For now do nothing. (XXX) */
2127 }
2128
2129 void sense_request(void)
2130 {
2131 int r, i;
2132 static u8_t sense[100], packet[ATAPI_PACKETSIZE];
2133
2134 packet[0] = SCSI_SENSE;
2135 packet[1] = 0;
2136 packet[2] = 0;
2137 packet[3] = 0;
2138 packet[4] = SENSE_PACKETSIZE;
2139 packet[5] = 0;
2140 packet[7] = 0;
2141 packet[8] = 0;
2142 packet[9] = 0;
2143 packet[10] = 0;
2144 packet[11] = 0;
2145
2146 for(i = 0; i < SENSE_PACKETSIZE; i++) sense[i] = 0xff;
2147 r = atapi_sendpacket(packet, SENSE_PACKETSIZE);
2148 if (r != OK) { printf("request sense command failed\n"); return; }
2149 if (atapi_intr_wait() <= 0) { printf("WARNING: request response failed\n"); }
2150
2151 if (sys_insw(w_wn->base_cmd + REG_DATA, SELF, (void *) sense, SENSE_PACKETSIZE) != OK)
2152 printf("WARNING: sense reading failed\n");
2153
2154 printf("sense data:");
2155 for(i = 0; i < SENSE_PACKETSIZE; i++) printf(" %02x", sense[i]);
2156 printf("\n");
2157 }
2158
2159 /*===========================================================================*
2160 * atapi_transfer *
2161 *===========================================================================*/
2162 PRIVATE int atapi_transfer(proc_nr, opcode, position, iov, nr_req, safe)
2163 int proc_nr; /* process doing the request */
2164 int opcode; /* DEV_GATHER_S or DEV_SCATTER_S */
2165 u64_t position; /* offset on device to read or write */
2166 iovec_t *iov; /* pointer to read or write request vector */
2167 unsigned nr_req; /* length of request vector */
2168 int safe; /* use safecopies? */
2169 {
2170 struct wini *wn = w_wn;
2171 iovec_t *iop, *iov_end = iov + nr_req;
2172 int r, s, errors, fresh;
2173 u64_t pos;
2174 unsigned long block;
2175 u64_t dv_size = w_dv->dv_size;
2176 unsigned nbytes, nblocks, count, before, chunk;
2177 static u8_t packet[ATAPI_PACKETSIZE];
2178 size_t addr_offset = 0;
2179
2180 errors = fresh = 0;
2181
2182 while (nr_req > 0 && !fresh) {
2183 /* The Minix block size is smaller than the CD block size, so we
2184 * may have to read extra before or after the good data.
2185 */
2186 pos = add64(w_dv->dv_base, position);
2187 block = div64u(pos, CD_SECTOR_SIZE);
2188 before = rem64u(pos, CD_SECTOR_SIZE);
2189
2190 /* How many bytes to transfer? */
2191 nbytes = count = 0;
2192 for (iop = iov; iop < iov_end; iop++) {
2193 nbytes += iop->iov_size;
2194 if ((before + nbytes) % CD_SECTOR_SIZE == 0) count = nbytes;
2195 }
2196
2197 /* Does one of the memory chunks end nicely on a CD sector multiple? */
2198 if (count != 0) nbytes = count;
2199
2200 /* Data comes in as words, so we have to enforce even byte counts. */
2201 if ((before | nbytes) & 1) return(EINVAL);
2202
2203 /* Which block on disk and how close to EOF? */
2204 if (cmp64(position, dv_size) >= 0) return(OK); /* At EOF */
2205 if (cmp64(add64ul(position, nbytes), dv_size) > 0)
2206 nbytes = diff64(dv_size, position);
2207
2208 nblocks = (before + nbytes + CD_SECTOR_SIZE - 1) / CD_SECTOR_SIZE;
2209 if (ATAPI_DEBUG) {
2210 printf("block=%lu, before=%u, nbytes=%u, nblocks=%u\n",
2211 block, before, nbytes, nblocks);
2212 }
2213
2214 /* First check to see if a reinitialization is needed. */
2215 if (!(wn->state & INITIALIZED) && w_specify() != OK) return(EIO);
2216
2217 /* Build an ATAPI command packet. */
2218 packet[0] = SCSI_READ10;
2219 packet[1] = 0;
2220 packet[2] = (block >> 24) & 0xFF;
2221 packet[3] = (block >> 16) & 0xFF;
2222 packet[4] = (block >> 8) & 0xFF;
2223 packet[5] = (block >> 0) & 0xFF;
2224 packet[6] = 0;
2225 packet[7] = (nblocks >> 8) & 0xFF;
2226 packet[8] = (nblocks >> 0) & 0xFF;
2227 packet[9] = 0;
2228 packet[10] = 0;
2229 packet[11] = 0;
2230
2231 /* Tell the controller to execute the packet command. */
2232 r = atapi_sendpacket(packet, nblocks * CD_SECTOR_SIZE);
2233 if (r != OK) goto err;
2234
2235 /* Read chunks of data. */
2236 while ((r = atapi_intr_wait()) > 0) {
2237 count = r;
2238
2239 if (ATAPI_DEBUG) {
2240 printf("before=%u, nbytes=%u, count=%u\n",
2241 before, nbytes, count);
2242 }
2243
2244 while (before > 0 && count > 0) { /* Discard before. */
2245 chunk = before;
2246 if (chunk > count) chunk = count;
2247 if (chunk > DMA_BUF_SIZE) chunk = DMA_BUF_SIZE;
2248 if ((s=sys_insw(wn->base_cmd + REG_DATA, SELF, tmp_buf, chunk)) != OK)
2249 panic(w_name(),"Call to sys_insw() failed", s);
2250 before -= chunk;
2251 count -= chunk;
2252 }
2253
2254 while (nbytes > 0 && count > 0) { /* Requested data. */
2255 chunk = nbytes;
2256 if (chunk > count) chunk = count;
2257 if (chunk > iov->iov_size) chunk = iov->iov_size;
2258 if(safe) {
2259 s=sys_safe_insw(wn->base_cmd + REG_DATA, proc_nr,
2260 (void *) iov->iov_addr, addr_offset, chunk);
2261 } else {
2262 s=sys_insw(wn->base_cmd + REG_DATA, proc_nr,
2263 (void *) (iov->iov_addr + addr_offset), chunk);
2264 }
2265 if (s != OK)
2266 panic(w_name(),"Call to sys_insw() failed", s);
2267 position= add64ul(position, chunk);
2268 nbytes -= chunk;
2269 count -= chunk;
2270 addr_offset += chunk;
2271 fresh = 0;
2272 if ((iov->iov_size -= chunk) == 0) {
2273 iov++;
2274 nr_req--;
2275 fresh = 1; /* new element is optional */
2276 addr_offset = 0;
2277 }
2278 }
2279
2280 while (count > 0) { /* Excess data. */
2281 chunk = count;
2282 if (chunk > DMA_BUF_SIZE) chunk = DMA_BUF_SIZE;
2283 if ((s=sys_insw(wn->base_cmd + REG_DATA, SELF, tmp_buf, chunk)) != OK)
2284 panic(w_name(),"Call to sys_insw() failed", s);
2285 count -= chunk;
2286 }
2287 }
2288
2289 if (r < 0) {
2290 err: /* Don't retry if too many errors. */
2291 if (atapi_debug) sense_request();
2292 if (++errors == max_errors) {
2293 w_command = CMD_IDLE;
2294 if (atapi_debug) printf("giving up (%d)\n", errors);
2295 return(EIO);
2296 }
2297 if (atapi_debug) printf("retry (%d)\n", errors);
2298 }
2299 }
2300
2301 w_command = CMD_IDLE;
2302 return(OK);
2303 }
2304
2305 /*===========================================================================*
2306 * atapi_sendpacket *
2307 *===========================================================================*/
2308 PRIVATE int atapi_sendpacket(packet, cnt)
2309 u8_t *packet;
2310 unsigned cnt;
2311 {
2312 /* Send an Atapi Packet Command */
2313 struct wini *wn = w_wn;
2314 pvb_pair_t outbyte[6]; /* vector for sys_voutb() */
2315 int s;
2316
2317 if (wn->state & IGNORING) return ERR;
2318
2319 /* Select Master/Slave drive */
2320 if ((s=sys_outb(wn->base_cmd + REG_DRIVE, wn->ldhpref)) != OK)
2321 panic(w_name(),"Couldn't select master/ slave drive",s);
2322
2323 if (!w_waitfor(STATUS_BSY | STATUS_DRQ, 0)) {
2324 printf("%s: atapi_sendpacket: drive not ready\n", w_name());
2325 return(ERR);
2326 }
2327
2328 /* Schedule a wakeup call, some controllers are flaky. This is done with
2329 * a synchronous alarm. If a timeout occurs a SYN_ALARM message is sent
2330 * from HARDWARE, so that w_intr_wait() can call w_timeout() in case the
2331 * controller was not able to execute the command. Leftover timeouts are
2332 * simply ignored by the main loop.
2333 */
2334 sys_setalarm(wakeup_ticks, 0);
2335
2336 #if _WORD_SIZE > 2
2337 if (cnt > 0xFFFE) cnt = 0xFFFE; /* Max data per interrupt. */
2338 #endif
2339
2340 w_command = ATAPI_PACKETCMD;
2341 pv_set(outbyte[0], wn->base_cmd + REG_FEAT, 0);
2342 pv_set(outbyte[1], wn->base_cmd + REG_IRR, 0);
2343 pv_set(outbyte[2], wn->base_cmd + REG_SAMTAG, 0);
2344 pv_set(outbyte[3], wn->base_cmd + REG_CNT_LO, (cnt >> 0) & 0xFF);
2345 pv_set(outbyte[4], wn->base_cmd + REG_CNT_HI, (cnt >> 8) & 0xFF);
2346 pv_set(outbyte[5], wn->base_cmd + REG_COMMAND, w_command);
2347 if (atapi_debug) printf("cmd: %x ", w_command);
2348 if ((s=sys_voutb(outbyte,6)) != OK)
2349 panic(w_name(),"Couldn't write registers with sys_voutb()",s);
2350
2351 if (!w_waitfor(STATUS_BSY | STATUS_DRQ, STATUS_DRQ)) {
2352 printf("%s: timeout (BSY|DRQ -> DRQ)\n", w_name());
2353 return(ERR);
2354 }
2355 wn->w_status |= STATUS_ADMBSY; /* Command not at all done yet. */
2356
2357 /* Send the command packet to the device. */
2358 if ((s=sys_outsw(wn->base_cmd + REG_DATA, SELF, packet, ATAPI_PACKETSIZE)) != OK)
2359 panic(w_name(),"sys_outsw() failed", s);
2360
2361 {
2362 int p;
2363 if (atapi_debug) {
2364 printf("sent command:");
2365 for(p = 0; p < ATAPI_PACKETSIZE; p++) { printf(" %02x", packet[p]); }
2366 printf("\n");
2367 }
2368 }
2369 return(OK);
2370 }
2371
2372
2373 #endif /* ENABLE_ATAPI */
2374
2375 /*===========================================================================*
2376 * w_other *
2377 *===========================================================================*/
2378 PRIVATE int w_other(dr, m, safe)
2379 struct driver *dr;
2380 message *m;
2381 int safe;
2382 {
2383 int r, timeout, prev;
2384
2385 if (m->m_type != DEV_IOCTL_S )
2386 return EINVAL;
2387
2388 if (m->REQUEST == DIOCTIMEOUT) {
2389 if(safe) {
2390 r= sys_safecopyfrom(m->IO_ENDPT, (vir_bytes) m->IO_GRANT,
2391 0, (vir_bytes)&timeout, sizeof(timeout), D);
2392 } else {
2393 r= sys_datacopy(m->IO_ENDPT, (vir_bytes)m->ADDRESS,
2394 SELF, (vir_bytes)&timeout, sizeof(timeout));
2395 }
2396
2397 if(r != OK)
2398 return r;
2399
2400 if (timeout == 0) {
2401 /* Restore defaults. */
2402 timeout_ticks = DEF_TIMEOUT_TICKS;
2403 max_errors = MAX_ERRORS;
2404 wakeup_ticks = WAKEUP_TICKS;
2405 w_silent = 0;
2406 } else if (timeout < 0) {
2407 return EINVAL;
2408 } else {
2409 prev = wakeup_ticks;
2410
2411 if (!w_standard_timeouts) {
2412 /* Set (lower) timeout, lower error
2413 * tolerance and set silent mode.
2414 */
2415 wakeup_ticks = timeout;
2416 max_errors = 3;
2417 w_silent = 1;
2418
2419 if (timeout_ticks > timeout)
2420 timeout_ticks = timeout;
2421 }
2422
2423 if(safe) {
2424 r= sys_safecopyto(m->IO_ENDPT,
2425 (vir_bytes) m->IO_GRANT,
2426 0, (vir_bytes)&prev, sizeof(prev), D);
2427 } else {
2428 r=sys_datacopy(SELF, (vir_bytes)&prev,
2429 m->IO_ENDPT, (vir_bytes)m->ADDRESS,
2430 sizeof(prev));
2431 }
2432
2433 if(r != OK)
2434 return r;
2435 }
2436
2437 return OK;
2438 } else if (m->REQUEST == DIOCOPENCT) {
2439 int count;
2440 if (w_prepare(m->DEVICE) == NIL_DEV) return ENXIO;
2441 count = w_wn->open_ct;
2442 if(safe) {
2443 r= sys_safecopyto(m->IO_ENDPT, (vir_bytes) m->IO_GRANT,
2444 0, (vir_bytes)&count, sizeof(count), D);
2445 } else {
2446 r=sys_datacopy(SELF, (vir_bytes)&count,
2447 m->IO_ENDPT, (vir_bytes)m->ADDRESS, sizeof(count));
2448 }
2449
2450 if(r != OK)
2451 return r;
2452
2453 return OK;
2454 }
2455 return EINVAL;
2456 }
2457
2458 /*===========================================================================*
2459 * w_hw_int *
2460 *===========================================================================*/
2461 PRIVATE int w_hw_int(dr, m)
2462 struct driver *dr;
2463 message *m;
2464 {
2465 /* Leftover interrupt(s) received; ack it/them. */
2466 ack_irqs(m->NOTIFY_ARG);
2467
2468 return OK;
2469 }
2470
2471
2472 /*===========================================================================*
2473 * ack_irqs *
2474 *===========================================================================*/
2475 PRIVATE void ack_irqs(unsigned int irqs)
2476 {
2477 unsigned int drive;
2478 unsigned long w_status;
2479
2480 for (drive = 0; drive < MAX_DRIVES && irqs; drive++) {
2481 if (!(wini[drive].state & IGNORING) && wini[drive].irq_need_ack &&
2482 (wini[drive].irq_mask & irqs)) {
2483 if (sys_inb((wini[drive].base_cmd + REG_STATUS),
2484 &w_status) != OK)
2485 {
2486 panic(w_name(), "couldn't ack irq on drive %d\n",
2487 drive);
2488 }
2489 wini[drive].w_status= w_status;
2490 if (sys_irqenable(&wini[drive].irq_hook_id) != OK)
2491 printf("couldn't re-enable drive %d\n", drive);
2492 irqs &= ~wini[drive].irq_mask;
2493 }
2494 }
2495 }
2496
2497
2498 #define STSTR(a) if (status & STATUS_ ## a) { strcat(str, #a); strcat(str, " "); }
2499 #define ERRSTR(a) if (e & ERROR_ ## a) { strcat(str, #a); strcat(str, " "); }
2500 char *strstatus(int status)
2501 {
2502 static char str[200];
2503 str[0] = '\0';
2504
2505 STSTR(BSY);
2506 STSTR(DRDY);
2507 STSTR(DMADF);
2508 STSTR(SRVCDSC);
2509 STSTR(DRQ);
2510 STSTR(CORR);
2511 STSTR(CHECK);
2512 return str;
2513 }
2514
2515 char *strerr(int e)
2516 {
2517 static char str[200];
2518 str[0] = '\0';
2519
2520 ERRSTR(BB);
2521 ERRSTR(ECC);
2522 ERRSTR(ID);
2523 ERRSTR(AC);
2524 ERRSTR(TK);
2525 ERRSTR(DM);
2526
2527 return str;
2528 }
2529
2530 #if ENABLE_ATAPI
2531
2532 /*===========================================================================*
2533 * atapi_intr_wait *
2534 *===========================================================================*/
2535 PRIVATE int atapi_intr_wait()
2536 {
2537 /* Wait for an interrupt and study the results. Returns a number of bytes
2538 * that need to be transferred, or an error code.
2539 */
2540 struct wini *wn = w_wn;
2541 pvb_pair_t inbyte[4]; /* vector for sys_vinb() */
2542 int s; /* status for sys_vinb() */
2543 int e;
2544 int len;
2545 int irr;
2546 int r;
2547 int phase;
2548
2549 w_intr_wait();
2550
2551 /* Request series of device I/O. */
2552 inbyte[0].port = wn->base_cmd + REG_ERROR;
2553 inbyte[1].port = wn->base_cmd + REG_CNT_LO;
2554 inbyte[2].port = wn->base_cmd + REG_CNT_HI;
2555 inbyte[3].port = wn->base_cmd + REG_IRR;
2556 if ((s=sys_vinb(inbyte, 4)) != OK)
2557 panic(w_name(),"ATAPI failed sys_vinb()", s);
2558 e = inbyte[0].value;
2559 len = inbyte[1].value;
2560 len |= inbyte[2].value << 8;
2561 irr = inbyte[3].value;
2562
2563 #if ATAPI_DEBUG
2564 printf("wn %p S=%x=%s E=%02x=%s L=%04x I=%02x\n", wn, wn->w_status, strstatus(wn->w_status), e, strerr(e), len, irr);
2565 #endif
2566 if (wn->w_status & (STATUS_BSY | STATUS_CHECK)) {
2567 if (atapi_debug) {
2568 printf("atapi fail: S=%x=%s E=%02x=%s L=%04x I=%02x\n", wn->w_status, strstatus(wn->w_status), e, strerr(e), len, irr);
2569 }
2570 return ERR;
2571 }
2572
2573 phase = (wn->w_status & STATUS_DRQ) | (irr & (IRR_COD | IRR_IO));
2574
2575 switch (phase) {
2576 case IRR_COD | IRR_IO:
2577 if (ATAPI_DEBUG) printf("ACD: Phase Command Complete\n");
2578 r = OK;
2579 break;
2580 case 0:
2581 if (ATAPI_DEBUG) printf("ACD: Phase Command Aborted\n");
2582 r = ERR;
2583 break;
2584 case STATUS_DRQ | IRR_COD:
2585 if (ATAPI_DEBUG) printf("ACD: Phase Command Out\n");
2586 r = ERR;
2587 break;
2588 case STATUS_DRQ:
2589 if (ATAPI_DEBUG) printf("ACD: Phase Data Out %d\n", len);
2590 r = len;
2591 break;
2592 case STATUS_DRQ | IRR_IO:
2593 if (ATAPI_DEBUG) printf("ACD: Phase Data In %d\n", len);
2594 r = len;
2595 break;
2596 default:
2597 if (ATAPI_DEBUG) printf("ACD: Phase Unknown\n");
2598 r = ERR;
2599 break;
2600 }
2601
2602 #if 0
2603 /* retry if the media changed */
2604 XXX while (phase == (IRR_IO | IRR_COD) && (wn->w_status & STATUS_CHECK)
2605 && (e & ERROR_SENSE) == SENSE_UATTN && --try > 0);
2606 #endif
2607
2608 wn->w_status |= STATUS_ADMBSY; /* Assume not done yet. */
2609 return(r);
2610 }
2611
2612 #endif /* ENABLE_ATAPI */
2613
MINIX 3 (repo.or.cz mirror)