tools/llvm: Do not build with symbols
[minix3.git] / external / bsd / llvm / lib / libLLVMARMCodeGen / Makefile
bloba52540a8ab5d00b89ba17137526690efecd1feb0
1 # $NetBSD: Makefile,v 1.12 2013/03/24 13:02:17 joerg Exp $
3 LIB= LLVMARMCodeGen
5 .include <bsd.init.mk>
7 .PATH: ${LLVM_SRCDIR}/lib/Target/ARM
9 SRCS+= ARMAsmPrinter.cpp \
10 ARMBaseInstrInfo.cpp \
11 ARMBaseRegisterInfo.cpp \
12 ARMCodeEmitter.cpp \
13 ARMConstantIslandPass.cpp \
14 ARMConstantPoolValue.cpp \
15 ARMExpandPseudoInsts.cpp \
16 ARMFastISel.cpp \
17 ARMFrameLowering.cpp \
18 ARMHazardRecognizer.cpp \
19 ARMISelDAGToDAG.cpp \
20 ARMISelLowering.cpp \
21 ARMInstrInfo.cpp \
22 ARMJITInfo.cpp \
23 ARMLoadStoreOptimizer.cpp \
24 ARMMCInstLower.cpp \
25 ARMMachineFunctionInfo.cpp \
26 ARMRegisterInfo.cpp \
27 ARMSelectionDAGInfo.cpp \
28 ARMSubtarget.cpp \
29 ARMTargetMachine.cpp \
30 ARMTargetObjectFile.cpp \
31 ARMTargetTransformInfo.cpp \
32 A15SDOptimizer.cpp \
33 MLxExpansionPass.cpp \
34 Thumb1InstrInfo.cpp \
35 Thumb1FrameLowering.cpp \
36 Thumb1RegisterInfo.cpp \
37 Thumb2ITBlockPass.cpp \
38 Thumb2InstrInfo.cpp \
39 Thumb2RegisterInfo.cpp \
40 Thumb2SizeReduction.cpp
42 TABLEGEN_SRC= ARM.td
43 TABLEGEN_INCLUDES= -I${LLVM_SRCDIR}/lib/Target/ARM
44 TABLEGEN_OUTPUT= \
45 ARMGenRegisterInfo.inc|-gen-register-info \
46 ARMGenInstrInfo.inc|-gen-instr-info \
47 ARMGenCodeEmitter.inc|-gen-emitter \
48 ARMGenMCCodeEmitter.inc|-gen-emitter^-mc-emitter \
49 ARMGenMCPseudoLowering.inc|-gen-pseudo-lowering \
50 ARMGenAsmWriter.inc|-gen-asm-writer \
51 ARMGenAsmMatcher.inc|-gen-asm-matcher \
52 ARMGenDAGISel.inc|-gen-dag-isel \
53 ARMGenFastISel.inc|-gen-fast-isel \
54 ARMGenCallingConv.inc|-gen-callingconv \
55 ARMGenSubtargetInfo.inc|-gen-subtarget \
56 ARMGenDisassemblerTables.inc|-gen-disassembler
58 .include "${.PARSEDIR}/../../tablegen.mk"
60 .if defined(HOSTLIB)
61 .include <bsd.hostlib.mk>
62 .else
63 .include <bsd.lib.mk>
64 .endif