minix/drivers/bus/pci/pci.c

   1 /*
   2 pci.c
   3
   4 Configure devices on the PCI bus
   5
   6 Created:        Jan 2000 by Philip Homburg <philip@cs.vu.nl>
   7 */
   8
   9 #include <assert.h>
  10 #include <machine/pci.h>
  11 #include <machine/vm.h>
  12 #include <machine/vmparam.h>
  13 #include <minix/com.h>
  14 #include <minix/ds.h>
  15 #include <minix/syslib.h>
  16 #include <minix/param.h>
  17
  18 #include "pci.h"
  19 #include <machine/pci_amd.h>
  20 #include <machine/pci_intel.h>
  21 #include <machine/pci_sis.h>
  22 #include <machine/pci_via.h>
  23 #if __minix_vmd
  24 #include "config.h"
  25 #endif
  26
  27 #if !__minix_vmd
  28 #define irq_mode_pci(irq) ((void)0)
  29 #endif
  30
  31 #include <stdlib.h>
  32 #include <stdio.h>
  33 #include <minix/sysutil.h>
  34 #include <minix/acpi.h>
  35
  36 #define PBT_INTEL_HOST   1
  37 #define PBT_PCIBRIDGE    2
  38 #define PBT_CARDBUS      3
  39
  40 #define BAM_NR          6       /* Number of base-address registers */
  41
  42 int debug= 0;
  43
  44 static struct pcibus
  45 {
  46         int pb_type;
  47         int pb_needinit;
  48         int pb_isabridge_dev;
  49         int pb_isabridge_type;
  50
  51         int pb_devind;
  52         int pb_busnr;
  53         u8_t (*pb_rreg8)(int busind, int devind, int port);
  54         u16_t (*pb_rreg16)(int busind, int devind, int port);
  55         u32_t (*pb_rreg32)(int busind, int devind, int port);
  56         void (*pb_wreg8)(int busind, int devind, int port, u8_t value);
  57         void (*pb_wreg16)(int busind, int devind, int port, u16_t value);
  58         void (*pb_wreg32)(int busind, int devind, int port, u32_t value);
  59         u16_t (*pb_rsts)(int busind);
  60         void (*pb_wsts)(int busind, u16_t value);
  61 } pcibus[NR_PCIBUS];
  62 static int nr_pcibus= 0;
  63
  64 static struct pcidev
  65 {
  66         u8_t pd_busnr;
  67         u8_t pd_dev;
  68         u8_t pd_func;
  69         u8_t pd_baseclass;
  70         u8_t pd_subclass;
  71         u8_t pd_infclass;
  72         u16_t pd_vid;
  73         u16_t pd_did;
  74         u16_t pd_sub_vid;
  75         u16_t pd_sub_did;
  76         u8_t pd_ilr;
  77
  78         u8_t pd_inuse;
  79         endpoint_t pd_proc;
  80
  81         struct bar
  82         {
  83                 int pb_flags;
  84                 int pb_nr;
  85                 u32_t pb_base;
  86                 u32_t pb_size;
  87         } pd_bar[BAM_NR];
  88         int pd_bar_nr;
  89 } pcidev[NR_PCIDEV];
  90
  91 EXTERN struct pci_acl pci_acl[NR_DRIVERS];
  92
  93 /* pb_flags */
  94 #define PBF_IO          1       /* I/O else memory */
  95 #define PBF_INCOMPLETE  2       /* not allocated */
  96
  97 static int nr_pcidev= 0;
  98
  99 static void pci_intel_init(void);
 100 static void probe_bus(int busind);
 101 static int is_duplicate(u8_t busnr, u8_t dev, u8_t func);
 102 static void record_irq(int devind);
 103 static void record_bars_normal(int devind);
 104 static void record_bars_bridge(int devind);
 105 static void record_bars_cardbus(int devind);
 106 static void record_bars(int devind, int last_reg);
 107 static int record_bar(int devind, int bar_nr, int last);
 108 static void complete_bridges(void);
 109 static void complete_bars(void);
 110 static void update_bridge4dev_io(int devind, u32_t io_base, u32_t
 111         io_size);
 112 static int get_freebus(void);
 113 static int do_isabridge(int busind);
 114 static void do_pcibridge(int busind);
 115 static int get_busind(int busnr);
 116 static int do_piix(int devind);
 117 static int do_amd_isabr(int devind);
 118 static int do_sis_isabr(int devind);
 119 static int do_via_isabr(int devind);
 120 #if 0
 121 static void report_vga(int devind);
 122 #endif
 123 static char *pci_vid_name(u16_t vid);
 124 static char *pci_baseclass_name(u8_t baseclass);
 125 static char *pci_subclass_name(u8_t baseclass, u8_t subclass, u8_t
 126         infclass);
 127 static void ntostr(unsigned n, char **str, const char *end);
 128
 129 static u8_t pci_attr_r8_u(int devind, int port);
 130 static u32_t pci_attr_r32_u(int devind, int port);
 131
 132 static u16_t pci_attr_rsts(int devind);
 133 static void pci_attr_wsts(int devind, u16_t value);
 134 static u16_t pcibr_std_rsts(int busind);
 135 static void pcibr_std_wsts(int busind, u16_t value);
 136 static u16_t pcibr_cb_rsts(int busind);
 137 static void pcibr_cb_wsts(int busind, u16_t value);
 138 static u16_t pcibr_via_rsts(int busind);
 139 static void pcibr_via_wsts(int busind, u16_t value);
 140 static u8_t pcii_rreg8(int busind, int devind, int port);
 141 static u16_t pcii_rreg16(int busind, int devind, int port);
 142 static u32_t pcii_rreg32(int busind, int devind, int port);
 143 static void pcii_wreg8(int busind, int devind, int port, u8_t value);
 144 static void pcii_wreg16(int busind, int devind, int port, u16_t value);
 145 static void pcii_wreg32(int busind, int devind, int port, u32_t value);
 146 static u16_t pcii_rsts(int busind);
 147 static void pcii_wsts(int busind, u16_t value);
 148 static void print_capabilities(int devind);
 149 static int visible(struct rs_pci *aclp, int devind);
 150 static void print_hyper_cap(int devind, u8_t capptr);
 151
 152 static struct machine machine;
 153 static endpoint_t acpi_ep;
 154
 155 /*===========================================================================*
 156  *                              sef_cb_init_fresh                            *
 157  *===========================================================================*/
 158 int sef_cb_init_fresh(int type, sef_init_info_t *info)
 159 {
 160 /* Initialize the pci driver. */
 161         long v;
 162         int i, r;
 163         struct rprocpub rprocpub[NR_BOOT_PROCS];
 164
 165         v= 0;
 166         env_parse("pci_debug", "d", 0, &v, 0, 1);
 167         debug= v;
 168
 169         if (sys_getmachine(&machine)) {
 170                 printf("PCI: no machine\n");
 171                 return ENODEV;
 172         }
 173         if (machine.apic_enabled &&
 174                         ds_retrieve_label_endpt("acpi", &acpi_ep) != OK) {
 175                 panic("PCI: Cannot use APIC mode without ACPI!\n");
 176         }
 177
 178         /* Only Intel (compatible) PCI controllers are supported at the
 179          * moment.
 180          */
 181         pci_intel_init();
 182
 183         /* Map all the services in the boot image. */
 184         if((r = sys_safecopyfrom(RS_PROC_NR, info->rproctab_gid, 0,
 185                 (vir_bytes) rprocpub, sizeof(rprocpub))) != OK) {
 186                 panic("sys_safecopyfrom failed: %d", r);
 187         }
 188         for(i=0;i < NR_BOOT_PROCS;i++) {
 189                 if(rprocpub[i].in_use) {
 190                         if((r = map_service(&rprocpub[i])) != OK) {
 191                                 panic("unable to map service: %d", r);
 192                         }
 193                 }
 194         }
 195
 196         return(OK);
 197 }
 198
 199 /*===========================================================================*
 200  *                             map_service                                   *
 201  *===========================================================================*/
 202 int map_service(rpub)
 203 struct rprocpub *rpub;
 204 {
 205 /* Map a new service by registering a new acl entry if required. */
 206         int i;
 207
 208         /* Stop right now if no pci device or class is found. */
 209         if(rpub->pci_acl.rsp_nr_device == 0
 210                 && rpub->pci_acl.rsp_nr_class == 0) {
 211                 return(OK);
 212         }
 213
 214         /* Find a free acl slot. */
 215         for (i= 0; i<NR_DRIVERS; i++)
 216         {
 217                 if (!pci_acl[i].inuse)
 218                         break;
 219         }
 220         if (i >= NR_DRIVERS)
 221         {
 222                 printf("PCI: map_service: table is full\n");
 223                 return ENOMEM;
 224         }
 225
 226         /* Initialize acl slot. */
 227         pci_acl[i].inuse = 1;
 228         pci_acl[i].acl = rpub->pci_acl;
 229
 230         return(OK);
 231 }
 232
 233 /*===========================================================================*
 234  *                      helper functions for I/O                             *
 235  *===========================================================================*/
 236 unsigned pci_inb(u16_t port) {
 237         u32_t value;
 238         int s;
 239         if ((s=sys_inb(port, &value)) !=OK)
 240                 printf("PCI: warning, sys_inb failed: %d\n", s);
 241         return value;
 242 }
 243 unsigned pci_inw(u16_t port) {
 244         u32_t value;
 245         int s;
 246         if ((s=sys_inw(port, &value)) !=OK)
 247                 printf("PCI: warning, sys_inw failed: %d\n", s);
 248         return value;
 249 }
 250 unsigned pci_inl(u16_t port) {
 251         u32_t value;
 252         int s;
 253         if ((s=sys_inl(port, &value)) !=OK)
 254                 printf("PCI: warning, sys_inl failed: %d\n", s);
 255         return value;
 256 }
 257 void pci_outb(u16_t port, u8_t value) {
 258         int s;
 259         if ((s=sys_outb(port, value)) !=OK)
 260                 printf("PCI: warning, sys_outb failed: %d\n", s);
 261 }
 262 void pci_outw(u16_t port, u16_t value) {
 263         int s;
 264         if ((s=sys_outw(port, value)) !=OK)
 265                 printf("PCI: warning, sys_outw failed: %d\n", s);
 266 }
 267 void pci_outl(u16_t port, u32_t value) {
 268         int s;
 269         if ((s=sys_outl(port, value)) !=OK)
 270                 printf("PCI: warning, sys_outl failed: %d\n", s);
 271 }
 272
 273 /*===========================================================================*
 274  *                              pci_find_dev                                 *
 275  *===========================================================================*/
 276 int pci_find_dev(u8_t bus, u8_t dev, u8_t func, int *devindp)
 277 {
 278         int devind;
 279
 280         for (devind= 0; devind < nr_pcidev; devind++)
 281         {
 282                 if (pcidev[devind].pd_busnr == bus &&
 283                         pcidev[devind].pd_dev == dev &&
 284                         pcidev[devind].pd_func == func)
 285                 {
 286                         break;
 287                 }
 288         }
 289         if (devind >= nr_pcidev)
 290                 return 0;
 291 #if 0
 292         if (pcidev[devind].pd_inuse)
 293                 return 0;
 294 #endif
 295         *devindp= devind;
 296         return 1;
 297 }
 298
 299 /*===========================================================================*
 300  *                              pci_first_dev_a                              *
 301  *===========================================================================*/
 302 int pci_first_dev_a(
 303   struct rs_pci *aclp,
 304   int *devindp,
 305   u16_t *vidp,
 306   u16_t *didp
 307 )
 308 {
 309         int devind;
 310
 311         for (devind= 0; devind < nr_pcidev; devind++)
 312         {
 313 #if 0
 314                 if (pcidev[devind].pd_inuse)
 315                         continue;
 316 #endif
 317                 if (!visible(aclp, devind))
 318                         continue;
 319                 break;
 320         }
 321         if (devind >= nr_pcidev)
 322                 return 0;
 323         *devindp= devind;
 324         *vidp= pcidev[devind].pd_vid;
 325         *didp= pcidev[devind].pd_did;
 326         return 1;
 327 }
 328
 329 /*===========================================================================*
 330  *                              pci_next_dev                                 *
 331  *===========================================================================*/
 332 int pci_next_dev_a(
 333   struct rs_pci *aclp,
 334   int *devindp,
 335   u16_t *vidp,
 336   u16_t *didp
 337 )
 338 {
 339         int devind;
 340
 341         for (devind= *devindp+1; devind < nr_pcidev; devind++)
 342         {
 343 #if 0
 344                 if (pcidev[devind].pd_inuse)
 345                         continue;
 346 #endif
 347                 if (!visible(aclp, devind))
 348                         continue;
 349                 break;
 350         }
 351         if (devind >= nr_pcidev)
 352                 return 0;
 353         *devindp= devind;
 354         *vidp= pcidev[devind].pd_vid;
 355         *didp= pcidev[devind].pd_did;
 356         return 1;
 357 }
 358
 359 /*===========================================================================*
 360  *                              pci_reserve_a                                *
 361  *===========================================================================*/
 362 int pci_reserve_a(devind, proc, aclp)
 363 int devind;
 364 endpoint_t proc;
 365 struct rs_pci *aclp;
 366 {
 367         int i, r;
 368         int ilr;
 369         struct io_range ior;
 370         struct minix_mem_range mr;
 371
 372         if (devind < 0 || devind >= nr_pcidev)
 373         {
 374                 printf("pci_reserve_a: bad devind: %d\n", devind);
 375                 return EINVAL;
 376         }
 377         if (!visible(aclp, devind))
 378         {
 379                 printf("pci_reserve_a: %u is not allowed to reserve %d\n",
 380                         proc, devind);
 381                 return EPERM;
 382         }
 383
 384         if(pcidev[devind].pd_inuse && pcidev[devind].pd_proc != proc)
 385                 return EBUSY;
 386         pcidev[devind].pd_inuse= 1;
 387         pcidev[devind].pd_proc= proc;
 388
 389         for (i= 0; i<pcidev[devind].pd_bar_nr; i++)
 390         {
 391                 if (pcidev[devind].pd_bar[i].pb_flags & PBF_INCOMPLETE)
 392                 {
 393                         printf("pci_reserve_a: BAR %d is incomplete\n", i);
 394                         continue;
 395                 }
 396                 if (pcidev[devind].pd_bar[i].pb_flags & PBF_IO)
 397                 {
 398                         ior.ior_base= pcidev[devind].pd_bar[i].pb_base;
 399                         ior.ior_limit= ior.ior_base +
 400                                 pcidev[devind].pd_bar[i].pb_size-1;
 401
 402                         if(debug) {
 403                            printf(
 404                 "pci_reserve_a: for proc %d, adding I/O range [0x%x..0x%x]\n",
 405                                 proc, ior.ior_base, ior.ior_limit);
 406                         }
 407                         r= sys_privctl(proc, SYS_PRIV_ADD_IO, &ior);
 408                         if (r != OK)
 409                         {
 410                                 printf("sys_privctl failed for proc %d: %d\n",
 411                                         proc, r);
 412                         }
 413                 }
 414                 else
 415                 {
 416                         mr.mr_base= pcidev[devind].pd_bar[i].pb_base;
 417                         mr.mr_limit= mr.mr_base +
 418                                 pcidev[devind].pd_bar[i].pb_size-1;
 419
 420                         r= sys_privctl(proc, SYS_PRIV_ADD_MEM, &mr);
 421                         if (r != OK)
 422                         {
 423                                 printf("sys_privctl failed for proc %d: %d\n",
 424                                         proc, r);
 425                         }
 426                 }
 427         }
 428         ilr= pcidev[devind].pd_ilr;
 429         if (ilr != PCI_ILR_UNKNOWN)
 430         {
 431                 if(debug) printf("pci_reserve_a: adding IRQ %d\n", ilr);
 432                 r= sys_privctl(proc, SYS_PRIV_ADD_IRQ, &ilr);
 433                 if (r != OK)
 434                 {
 435                         printf("sys_privctl failed for proc %d: %d\n",
 436                                 proc, r);
 437                 }
 438         }
 439
 440         return OK;
 441 }
 442
 443 /*===========================================================================*
 444  *                              pci_release                                  *
 445  *===========================================================================*/
 446 void pci_release(proc)
 447 endpoint_t proc;
 448 {
 449         int i;
 450
 451         for (i= 0; i<nr_pcidev; i++)
 452         {
 453                 if (!pcidev[i].pd_inuse)
 454                         continue;
 455                 if (pcidev[i].pd_proc != proc)
 456                         continue;
 457                 pcidev[i].pd_inuse= 0;
 458         }
 459 }
 460
 461 /*===========================================================================*
 462  *                              pci_ids_s                                    *
 463  *===========================================================================*/
 464 int pci_ids_s(int devind, u16_t *vidp, u16_t *didp)
 465 {
 466         if (devind < 0 || devind >= nr_pcidev)
 467                 return EINVAL;
 468
 469         *vidp= pcidev[devind].pd_vid;
 470         *didp= pcidev[devind].pd_did;
 471         return OK;
 472 }
 473
 474 /*===========================================================================*
 475  *                              pci_rescan_bus                               *
 476  *===========================================================================*/
 477 void pci_rescan_bus(u8_t busnr)
 478 {
 479         int busind;
 480
 481         busind= get_busind(busnr);
 482         probe_bus(busind);
 483
 484         /* Allocate bus numbers for uninitialized bridges */
 485         complete_bridges();
 486
 487         /* Allocate I/O and memory resources for uninitialized devices */
 488         complete_bars();
 489 }
 490
 491 /*===========================================================================*
 492  *                              pci_slot_name_s                              *
 493  *===========================================================================*/
 494 int pci_slot_name_s(devind, cpp)
 495 int devind;
 496 char **cpp;
 497 {
 498         static char label[]= "ddd.ddd.ddd";
 499         char *end;
 500         char *p;
 501
 502         if (devind < 0 || devind >= nr_pcidev)
 503                 return EINVAL;
 504
 505         p= label;
 506         end= label+sizeof(label);
 507
 508         ntostr(pcidev[devind].pd_busnr, &p, end);
 509         *p++= '.';
 510
 511         ntostr(pcidev[devind].pd_dev, &p, end);
 512         *p++= '.';
 513
 514         ntostr(pcidev[devind].pd_func, &p, end);
 515
 516         *cpp= label;
 517         return OK;
 518 }
 519
 520 /*===========================================================================*
 521  *                              pci_dev_name                                 *
 522  *===========================================================================*/
 523 char *pci_dev_name(u16_t vid, u16_t did)
 524 {
 525         int i;
 526
 527         for (i= 0; pci_device_table[i].name; i++)
 528         {
 529                 if (pci_device_table[i].vid == vid &&
 530                         pci_device_table[i].did == did)
 531                 {
 532                         return pci_device_table[i].name;
 533                 }
 534         }
 535         return NULL;
 536 }
 537
 538 /*===========================================================================*
 539  *                              pci_get_bar_s                                *
 540  *===========================================================================*/
 541 int pci_get_bar_s(int devind, int port, u32_t *base, u32_t *size,
 542         int *ioflag)
 543 {
 544         int i, reg;
 545
 546         if (devind < 0 || devind >= nr_pcidev)
 547                 return EINVAL;
 548
 549         for (i= 0; i < pcidev[devind].pd_bar_nr; i++)
 550         {
 551                 reg= PCI_BAR+4*pcidev[devind].pd_bar[i].pb_nr;
 552
 553                 if (reg == port)
 554                 {
 555                         if (pcidev[devind].pd_bar[i].pb_flags & PBF_INCOMPLETE)
 556                                 return EINVAL;
 557
 558                         *base= pcidev[devind].pd_bar[i].pb_base;
 559                         *size= pcidev[devind].pd_bar[i].pb_size;
 560                         *ioflag=
 561                                 !!(pcidev[devind].pd_bar[i].pb_flags & PBF_IO);
 562                         return OK;
 563                 }
 564         }
 565         return EINVAL;
 566 }
 567
 568 /*===========================================================================*
 569  *                              pci_attr_r8_s                                *
 570  *===========================================================================*/
 571 int pci_attr_r8_s(int devind, int port, u8_t *vp)
 572 {
 573         if (devind < 0 || devind >= nr_pcidev)
 574                 return EINVAL;
 575         if (port < 0 || port > 255)
 576                 return EINVAL;
 577
 578         *vp= pci_attr_r8_u(devind, port);
 579         return OK;
 580 }
 581
 582 /*===========================================================================*
 583  *                              pci_attr_r8_u                                *
 584  *===========================================================================*/
 585 static u8_t pci_attr_r8_u(devind, port)
 586 int devind;
 587 int port;
 588 {
 589         int busnr, busind;
 590
 591         busnr= pcidev[devind].pd_busnr;
 592         busind= get_busind(busnr);
 593         return pcibus[busind].pb_rreg8(busind, devind, port);
 594 }
 595
 596 /*===========================================================================*
 597  *                              pci_attr_r16                                 *
 598  *===========================================================================*/
 599 u16_t pci_attr_r16(devind, port)
 600 int devind;
 601 int port;
 602 {
 603         int busnr, busind;
 604
 605         busnr= pcidev[devind].pd_busnr;
 606         busind= get_busind(busnr);
 607         return pcibus[busind].pb_rreg16(busind, devind, port);
 608 }
 609
 610 /*===========================================================================*
 611  *                              pci_attr_r32_s                               *
 612  *===========================================================================*/
 613 int pci_attr_r32_s(int devind, int port, u32_t *vp)
 614 {
 615         if (devind < 0 || devind >= nr_pcidev)
 616                 return EINVAL;
 617         if (port < 0 || port > 256-4)
 618                 return EINVAL;
 619
 620         *vp= pci_attr_r32_u(devind, port);
 621         return OK;
 622 }
 623
 624 /*===========================================================================*
 625  *                              pci_attr_r32_u                               *
 626  *===========================================================================*/
 627 static u32_t pci_attr_r32_u(devind, port)
 628 int devind;
 629 int port;
 630 {
 631         int busnr, busind;
 632
 633         busnr= pcidev[devind].pd_busnr;
 634         busind= get_busind(busnr);
 635         return pcibus[busind].pb_rreg32(busind, devind, port);
 636 }
 637
 638 /*===========================================================================*
 639  *                              pci_attr_w8                                  *
 640  *===========================================================================*/
 641 void pci_attr_w8(int devind, int port, u8_t value)
 642 {
 643         int busnr, busind;
 644
 645         busnr= pcidev[devind].pd_busnr;
 646         busind= get_busind(busnr);
 647         pcibus[busind].pb_wreg8(busind, devind, port, value);
 648 }
 649
 650 /*===========================================================================*
 651  *                              pci_attr_w16                                 *
 652  *===========================================================================*/
 653 void pci_attr_w16(int devind, int port, u16_t value)
 654 {
 655         int busnr, busind;
 656
 657         busnr= pcidev[devind].pd_busnr;
 658         busind= get_busind(busnr);
 659         pcibus[busind].pb_wreg16(busind, devind, port, value);
 660 }
 661
 662 /*===========================================================================*
 663  *                              pci_attr_w32                                 *
 664  *===========================================================================*/
 665 void pci_attr_w32(int devind, int port, u32_t value)
 666 {
 667         int busnr, busind;
 668
 669         busnr= pcidev[devind].pd_busnr;
 670         busind= get_busind(busnr);
 671         pcibus[busind].pb_wreg32(busind, devind, port, value);
 672 }
 673
 674 /*===========================================================================*
 675  *                              pci_intel_init                               *
 676  *===========================================================================*/
 677 static void pci_intel_init()
 678 {
 679         /* Try to detect a know PCI controller. Read the Vendor ID and
 680          * the Device ID for function 0 of device 0.
 681          * Two times the value 0xffff suggests a system without a (compatible)
 682          * PCI controller.
 683          */
 684         u32_t bus, dev, func;
 685         u16_t vid, did;
 686         int s, i, r, busind, busnr;
 687         char *dstr;
 688
 689         bus= 0;
 690         dev= 0;
 691         func= 0;
 692
 693         vid= PCII_RREG16_(bus, dev, func, PCI_VID);
 694         did= PCII_RREG16_(bus, dev, func, PCI_DID);
 695         if (OK != (s=sys_outl(PCII_CONFADD, PCII_UNSEL)))
 696                 printf("PCI: warning, sys_outl failed: %d\n", s);
 697
 698 #if 0
 699         if (vid == 0xffff && did == 0xffff)
 700                 return; /* Nothing here */
 701
 702         for (i= 0; pci_intel_ctrl[i].vid; i++)
 703         {
 704                 if (pci_intel_ctrl[i].vid == vid &&
 705                         pci_intel_ctrl[i].did == did)
 706                 {
 707                         break;
 708                 }
 709         }
 710
 711         if (!pci_intel_ctrl[i].vid)
 712         {
 713                 printf("pci_intel_init (warning): unknown PCI-controller:\n"
 714                         "\tvendor %04X (%s), device %04X\n",
 715                         vid, pci_vid_name(vid), did);
 716         }
 717 #endif
 718
 719         if (nr_pcibus >= NR_PCIBUS)
 720                 panic("too many PCI busses: %d", nr_pcibus);
 721         busind= nr_pcibus;
 722         nr_pcibus++;
 723         pcibus[busind].pb_type= PBT_INTEL_HOST;
 724         pcibus[busind].pb_needinit= 0;
 725         pcibus[busind].pb_isabridge_dev= -1;
 726         pcibus[busind].pb_isabridge_type= 0;
 727         pcibus[busind].pb_devind= -1;
 728         pcibus[busind].pb_busnr= 0;
 729         pcibus[busind].pb_rreg8= pcii_rreg8;
 730         pcibus[busind].pb_rreg16= pcii_rreg16;
 731         pcibus[busind].pb_rreg32= pcii_rreg32;
 732         pcibus[busind].pb_wreg8= pcii_wreg8;
 733         pcibus[busind].pb_wreg16= pcii_wreg16;
 734         pcibus[busind].pb_wreg32= pcii_wreg32;
 735         pcibus[busind].pb_rsts= pcii_rsts;
 736         pcibus[busind].pb_wsts= pcii_wsts;
 737
 738         dstr= pci_dev_name(vid, did);
 739         if (!dstr)
 740                 dstr= "unknown device";
 741         if (debug)
 742         {
 743                 printf("pci_intel_init: %s (%04X:%04X)\n",
 744                         dstr, vid, did);
 745         }
 746
 747         probe_bus(busind);
 748
 749         r= do_isabridge(busind);
 750         if (r != OK)
 751         {
 752                 busnr= pcibus[busind].pb_busnr;
 753
 754                 /* Disable all devices for this bus */
 755                 for (i= 0; i<nr_pcidev; i++)
 756                 {
 757                         if (pcidev[i].pd_busnr != busnr)
 758                                 continue;
 759                         pcidev[i].pd_inuse= 1;
 760                 }
 761                 return;
 762         }
 763
 764         /* Look for PCI bridges */
 765         do_pcibridge(busind);
 766
 767         /* Allocate bus numbers for uninitialized bridges */
 768         complete_bridges();
 769
 770         /* Allocate I/O and memory resources for uninitialized devices */
 771         complete_bars();
 772 }
 773
 774 /*===========================================================================*
 775  *                              probe_bus                                    *
 776  *===========================================================================*/
 777 static void probe_bus(int busind)
 778 {
 779         u32_t dev, func, t3;
 780         u16_t vid, did, sts, sub_vid, sub_did;
 781         u8_t headt;
 782         u8_t baseclass, subclass, infclass;
 783         int devind, busnr;
 784         char *s, *dstr;
 785
 786         if (debug)
 787                 printf("probe_bus(%d)\n", busind);
 788         if (nr_pcidev >= NR_PCIDEV)
 789                 panic("too many PCI devices: %d", nr_pcidev);
 790         devind= nr_pcidev;
 791
 792         busnr= pcibus[busind].pb_busnr;
 793         for (dev= 0; dev<32; dev++)
 794         {
 795
 796                 for (func= 0; func < 8; func++)
 797                 {
 798                         pcidev[devind].pd_busnr= busnr;
 799                         pcidev[devind].pd_dev= dev;
 800                         pcidev[devind].pd_func= func;
 801
 802                         pci_attr_wsts(devind,
 803                                 PSR_SSE|PSR_RMAS|PSR_RTAS);
 804                         vid= pci_attr_r16(devind, PCI_VID);
 805                         did= pci_attr_r16(devind, PCI_DID);
 806                         headt= pci_attr_r8_u(devind, PCI_HEADT);
 807                         sts= pci_attr_rsts(devind);
 808
 809 #if 0
 810                         printf("vid 0x%x, did 0x%x, headt 0x%x, sts 0x%x\n",
 811                                 vid, did, headt, sts);
 812 #endif
 813
 814                         if (vid == NO_VID && did == NO_VID)
 815                         {
 816                                 if (func == 0)
 817                                         break;  /* Nothing here */
 818
 819                                 /* Scan all functions of a multifunction
 820                                  * device.
 821                                  */
 822                                 continue;
 823                         }
 824
 825                         if (sts & (PSR_SSE|PSR_RMAS|PSR_RTAS))
 826                         {
 827                             static int warned = 0;
 828
 829                             if(!warned) {
 830                                 printf(
 831                                         "PCI: ignoring bad value 0x%x in sts for QEMU\n",
 832                                         sts & (PSR_SSE|PSR_RMAS|PSR_RTAS));
 833                                 warned = 1;
 834                             }
 835                         }
 836
 837                         sub_vid= pci_attr_r16(devind, PCI_SUBVID);
 838                         sub_did= pci_attr_r16(devind, PCI_SUBDID);
 839
 840                         dstr= pci_dev_name(vid, did);
 841                         if (debug)
 842                         {
 843                                 if (dstr)
 844                                 {
 845                                         printf("%d.%lu.%lu: %s (%04X:%04X)\n",
 846                                                 busnr, (unsigned long)dev,
 847                                                 (unsigned long)func, dstr,
 848                                                 vid, did);
 849                                 }
 850                                 else
 851                                 {
 852                                         printf(
 853                 "%d.%lu.%lu: Unknown device, vendor %04X (%s), device %04X\n",
 854                                                 busnr, (unsigned long)dev,
 855                                                 (unsigned long)func, vid,
 856                                                 pci_vid_name(vid), did);
 857                                 }
 858                                 printf("Device index: %d\n", devind);
 859                                 printf("Subsystem: Vid 0x%x, did 0x%x\n",
 860                                         sub_vid, sub_did);
 861                         }
 862
 863                         baseclass= pci_attr_r8_u(devind, PCI_BCR);
 864                         subclass= pci_attr_r8_u(devind, PCI_SCR);
 865                         infclass= pci_attr_r8_u(devind, PCI_PIFR);
 866                         s= pci_subclass_name(baseclass, subclass, infclass);
 867                         if (!s)
 868                                 s= pci_baseclass_name(baseclass);
 869                         {
 870                                 if (!s)
 871                                         s= "(unknown class)";
 872                         }
 873                         if (debug)
 874                         {
 875                                 printf("\tclass %s (%X/%X/%X)\n", s,
 876                                         baseclass, subclass, infclass);
 877                         }
 878
 879                         if (is_duplicate(busnr, dev, func))
 880                         {
 881                                 printf("\tduplicate!\n");
 882                                 if (func == 0 && !(headt & PHT_MULTIFUNC))
 883                                         break;
 884                                 continue;
 885                         }
 886
 887                         devind= nr_pcidev;
 888                         nr_pcidev++;
 889                         pcidev[devind].pd_baseclass= baseclass;
 890                         pcidev[devind].pd_subclass= subclass;
 891                         pcidev[devind].pd_infclass= infclass;
 892                         pcidev[devind].pd_vid= vid;
 893                         pcidev[devind].pd_did= did;
 894                         pcidev[devind].pd_sub_vid= sub_vid;
 895                         pcidev[devind].pd_sub_did= sub_did;
 896                         pcidev[devind].pd_inuse= 0;
 897                         pcidev[devind].pd_bar_nr= 0;
 898                         record_irq(devind);
 899                         switch(headt & PHT_MASK)
 900                         {
 901                         case PHT_NORMAL:
 902                                 record_bars_normal(devind);
 903                                 break;
 904                         case PHT_BRIDGE:
 905                                 record_bars_bridge(devind);
 906                                 break;
 907                         case PHT_CARDBUS:
 908                                 record_bars_cardbus(devind);
 909                                 break;
 910                         default:
 911                                 printf("\t%d.%d.%d: unknown header type %d\n",
 912                                         busind, dev, func,
 913                                         headt & PHT_MASK);
 914                                 break;
 915                         }
 916                         if (debug)
 917                                 print_capabilities(devind);
 918
 919                         t3= ((baseclass << 16) | (subclass << 8) | infclass);
 920 #if 0
 921                         if (t3 == PCI_T3_VGA || t3 == PCI_T3_VGA_OLD)
 922                                 report_vga(devind);
 923 #endif
 924
 925                         if (nr_pcidev >= NR_PCIDEV)
 926                           panic("too many PCI devices: %d", nr_pcidev);
 927                         devind= nr_pcidev;
 928
 929                         if (func == 0 && !(headt & PHT_MULTIFUNC))
 930                                 break;
 931                 }
 932         }
 933 }
 934
 935 /*===========================================================================*
 936  *                              is_duplicate                                 *
 937  *===========================================================================*/
 938 static int is_duplicate(u8_t busnr, u8_t dev, u8_t func)
 939 {
 940         int i;
 941
 942         for (i= 0; i<nr_pcidev; i++)
 943         {
 944                 if (pcidev[i].pd_busnr == busnr &&
 945                         pcidev[i].pd_dev == dev &&
 946                         pcidev[i].pd_func == func)
 947                 {
 948                         return 1;
 949                 }
 950         }
 951         return 0;
 952 }
 953
 954 static int acpi_get_irq(unsigned bus, unsigned dev, unsigned pin)
 955 {
 956         int err;
 957         message m;
 958
 959         ((struct acpi_get_irq_req *)&m)->hdr.request = ACPI_REQ_GET_IRQ;
 960         ((struct acpi_get_irq_req *)&m)->bus = bus;
 961         ((struct acpi_get_irq_req *)&m)->dev = dev;
 962         ((struct acpi_get_irq_req *)&m)->pin = pin;
 963
 964         if ((err = ipc_sendrec(acpi_ep, &m)) != OK)
 965                 panic("PCI: error %d while receiveing from ACPI\n", err);
 966
 967         return ((struct acpi_get_irq_resp *)&m)->irq;
 968 }
 969
 970 static int derive_irq(struct pcidev * dev, int pin)
 971 {
 972         struct pcidev * parent_bridge;
 973         int slot;
 974
 975         parent_bridge = &pcidev[pcibus[get_busind(dev->pd_busnr)].pb_devind];
 976
 977         /*
 978          * We don't support PCI-Express, no ARI, decode the slot of the device
 979          * and mangle the pin as the device is behind a bridge
 980          */
 981         slot = ((dev->pd_func) >> 3) & 0x1f;
 982
 983         return acpi_get_irq(parent_bridge->pd_busnr,
 984                         parent_bridge->pd_dev, (pin + slot) % 4);
 985 }
 986
 987 /*===========================================================================*
 988  *                              record_irq                                   *
 989  *===========================================================================*/
 990 static void record_irq(devind)
 991 int devind;
 992 {
 993         int ilr, ipr, busnr, busind, cb_devind;
 994
 995         ilr= pci_attr_r8_u(devind, PCI_ILR);
 996         ipr= pci_attr_r8_u(devind, PCI_IPR);
 997
 998         if (ipr && machine.apic_enabled) {
 999                 int irq;
1000
1001                 irq = acpi_get_irq(pcidev[devind].pd_busnr,
1002                                 pcidev[devind].pd_dev, ipr - 1);
1003
1004                 if (irq < 0)
1005                         irq = derive_irq(&pcidev[devind], ipr - 1);
1006
1007                 if (irq >= 0) {
1008                         ilr = irq;
1009                         pci_attr_w8(devind, PCI_ILR, ilr);
1010                         if (debug)
1011                                 printf("PCI: ACPI IRQ %d for "
1012                                                 "device %d.%d.%d INT%c\n",
1013                                                 irq,
1014                                                 pcidev[devind].pd_busnr,
1015                                                 pcidev[devind].pd_dev,
1016                                                 pcidev[devind].pd_func,
1017                                                 'A' + ipr-1);
1018                 }
1019                 else if (debug) {
1020                         printf("PCI: no ACPI IRQ routing for "
1021                                         "device %d.%d.%d INT%c\n",
1022                                         pcidev[devind].pd_busnr,
1023                                         pcidev[devind].pd_dev,
1024                                         pcidev[devind].pd_func,
1025                                         'A' + ipr-1);
1026                 }
1027         }
1028
1029         if (ilr == 0)
1030         {
1031                 static int first= 1;
1032                 if (ipr && first && debug)
1033                 {
1034                         first= 0;
1035                         printf("PCI: strange, BIOS assigned IRQ0\n");
1036                 }
1037                 ilr= PCI_ILR_UNKNOWN;
1038         }
1039         pcidev[devind].pd_ilr= ilr;
1040         if (ilr == PCI_ILR_UNKNOWN && !ipr)
1041         {
1042         }
1043         else if (ilr != PCI_ILR_UNKNOWN && ipr)
1044         {
1045                 if (debug)
1046                         printf("\tIRQ %d for INT%c\n", ilr, 'A' + ipr-1);
1047         }
1048         else if (ilr != PCI_ILR_UNKNOWN)
1049         {
1050                 printf(
1051         "PCI: IRQ %d is assigned, but device %d.%d.%d does not need it\n",
1052                         ilr, pcidev[devind].pd_busnr, pcidev[devind].pd_dev,
1053                         pcidev[devind].pd_func);
1054         }
1055         else
1056         {
1057                 /* Check for cardbus devices */
1058                 busnr= pcidev[devind].pd_busnr;
1059                 busind= get_busind(busnr);
1060                 if (pcibus[busind].pb_type == PBT_CARDBUS)
1061                 {
1062                         cb_devind= pcibus[busind].pb_devind;
1063                         ilr= pcidev[cb_devind].pd_ilr;
1064                         if (ilr != PCI_ILR_UNKNOWN)
1065                         {
1066                                 if (debug)
1067                                 {
1068                                         printf(
1069                                         "assigning IRQ %d to Cardbus device\n",
1070                                                 ilr);
1071                                 }
1072                                 pci_attr_w8(devind, PCI_ILR, ilr);
1073                                 pcidev[devind].pd_ilr= ilr;
1074                                 return;
1075                         }
1076                 }
1077                 if(debug) {
1078                         printf(
1079                 "PCI: device %d.%d.%d uses INT%c but is not assigned any IRQ\n",
1080                         pcidev[devind].pd_busnr, pcidev[devind].pd_dev,
1081                         pcidev[devind].pd_func, 'A' + ipr-1);
1082                 }
1083         }
1084 }
1085
1086 /*===========================================================================*
1087  *                              record_bars_normal                           *
1088  *===========================================================================*/
1089 static void record_bars_normal(devind)
1090 int devind;
1091 {
1092         int i, j, clear_01, clear_23, pb_nr;
1093
1094         /* The BAR area of normal devices is six DWORDs in size. */
1095         record_bars(devind, PCI_BAR_6);
1096
1097         /* Special case code for IDE controllers in compatibility mode */
1098         if (pcidev[devind].pd_baseclass == PCI_BCR_MASS_STORAGE &&
1099                 pcidev[devind].pd_subclass == PCI_MS_IDE)
1100         {
1101                 /* IDE device */
1102                 clear_01= 0;
1103                 clear_23= 0;
1104                 if (!(pcidev[devind].pd_infclass & PCI_IDE_PRI_NATIVE))
1105                 {
1106                         if (debug)
1107                         {
1108                                 printf(
1109         "primary channel is not in native mode, clearing BARs 0 and 1\n");
1110                         }
1111                         clear_01= 1;
1112                 }
1113                 if (!(pcidev[devind].pd_infclass & PCI_IDE_SEC_NATIVE))
1114                 {
1115                         if (debug)
1116                         {
1117                                 printf(
1118         "secondary channel is not in native mode, clearing BARs 2 and 3\n");
1119                         }
1120                         clear_23= 1;
1121                 }
1122
1123                 j= 0;
1124                 for (i= 0; i<pcidev[devind].pd_bar_nr; i++)
1125                 {
1126                         pb_nr= pcidev[devind].pd_bar[i].pb_nr;
1127                         if ((pb_nr == 0 || pb_nr == 1) && clear_01)
1128                         {
1129                                 if (debug) printf("skipping bar %d\n", pb_nr);
1130                                 continue;       /* Skip */
1131                         }
1132                         if ((pb_nr == 2 || pb_nr == 3) && clear_23)
1133                         {
1134                                 if (debug) printf("skipping bar %d\n", pb_nr);
1135                                 continue;       /* Skip */
1136                         }
1137                         if (i == j)
1138                         {
1139                                 j++;
1140                                 continue;       /* No need to copy */
1141                         }
1142                         pcidev[devind].pd_bar[j]=
1143                                 pcidev[devind].pd_bar[i];
1144                         j++;
1145                 }
1146                 pcidev[devind].pd_bar_nr= j;
1147         }
1148 }
1149
1150 /*===========================================================================*
1151  *                              record_bars_bridge                           *
1152  *===========================================================================*/
1153 static void record_bars_bridge(devind)
1154 int devind;
1155 {
1156         u32_t base, limit, size;
1157
1158         /* The generic BAR area of PCI-to-PCI bridges is two DWORDs in size.
1159          * It may contain up to two 32-bit BARs, or one 64-bit BAR.
1160          */
1161         record_bars(devind, PCI_BAR_2);
1162
1163         base= ((pci_attr_r8_u(devind, PPB_IOBASE) & PPB_IOB_MASK) << 8) |
1164                 (pci_attr_r16(devind, PPB_IOBASEU16) << 16);
1165         limit= 0xff |
1166                 ((pci_attr_r8_u(devind, PPB_IOLIMIT) & PPB_IOL_MASK) << 8) |
1167                 ((~PPB_IOL_MASK & 0xff) << 8) |
1168                 (pci_attr_r16(devind, PPB_IOLIMITU16) << 16);
1169         size= limit-base + 1;
1170         if (debug)
1171         {
1172                 printf("\tI/O window: base 0x%x, limit 0x%x, size %d\n",
1173                         base, limit, size);
1174         }
1175
1176         base= ((pci_attr_r16(devind, PPB_MEMBASE) & PPB_MEMB_MASK) << 16);
1177         limit= 0xffff |
1178                 ((pci_attr_r16(devind, PPB_MEMLIMIT) & PPB_MEML_MASK) << 16) |
1179                 ((~PPB_MEML_MASK & 0xffff) << 16);
1180         size= limit-base + 1;
1181         if (debug)
1182         {
1183                 printf("\tMemory window: base 0x%x, limit 0x%x, size 0x%x\n",
1184                         base, limit, size);
1185         }
1186
1187         /* Ignore the upper 32 bits */
1188         base= ((pci_attr_r16(devind, PPB_PFMEMBASE) & PPB_PFMEMB_MASK) << 16);
1189         limit= 0xffff |
1190                 ((pci_attr_r16(devind, PPB_PFMEMLIMIT) &
1191                         PPB_PFMEML_MASK) << 16) |
1192                 ((~PPB_PFMEML_MASK & 0xffff) << 16);
1193         size= limit-base + 1;
1194         if (debug)
1195         {
1196                 printf(
1197         "\tPrefetchable memory window: base 0x%x, limit 0x%x, size 0x%x\n",
1198                         base, limit, size);
1199         }
1200 }
1201
1202 /*===========================================================================*
1203  *                              record_bars_cardbus                          *
1204  *===========================================================================*/
1205 static void record_bars_cardbus(devind)
1206 int devind;
1207 {
1208         u32_t base, limit, size;
1209
1210         /* The generic BAR area of CardBus devices is one DWORD in size. */
1211         record_bars(devind, PCI_BAR);
1212
1213         base= pci_attr_r32_u(devind, CBB_MEMBASE_0);
1214         limit= pci_attr_r32_u(devind, CBB_MEMLIMIT_0) |
1215                 (~CBB_MEML_MASK & 0xffffffff);
1216         size= limit-base + 1;
1217         if (debug)
1218         {
1219                 printf("\tMemory window 0: base 0x%x, limit 0x%x, size %d\n",
1220                         base, limit, size);
1221         }
1222
1223         base= pci_attr_r32_u(devind, CBB_MEMBASE_1);
1224         limit= pci_attr_r32_u(devind, CBB_MEMLIMIT_1) |
1225                 (~CBB_MEML_MASK & 0xffffffff);
1226         size= limit-base + 1;
1227         if (debug)
1228         {
1229                 printf("\tMemory window 1: base 0x%x, limit 0x%x, size %d\n",
1230                         base, limit, size);
1231         }
1232
1233         base= pci_attr_r32_u(devind, CBB_IOBASE_0);
1234         limit= pci_attr_r32_u(devind, CBB_IOLIMIT_0) |
1235                 (~CBB_IOL_MASK & 0xffffffff);
1236         size= limit-base + 1;
1237         if (debug)
1238         {
1239                 printf("\tI/O window 0: base 0x%x, limit 0x%x, size %d\n",
1240                         base, limit, size);
1241         }
1242
1243         base= pci_attr_r32_u(devind, CBB_IOBASE_1);
1244         limit= pci_attr_r32_u(devind, CBB_IOLIMIT_1) |
1245                 (~CBB_IOL_MASK & 0xffffffff);
1246         size= limit-base + 1;
1247         if (debug)
1248         {
1249                 printf("\tI/O window 1: base 0x%x, limit 0x%x, size %d\n",
1250                         base, limit, size);
1251         }
1252 }
1253
1254 /*===========================================================================*
1255  *                              record_bars                                  *
1256  *===========================================================================*/
1257 static void record_bars(int devind, int last_reg)
1258 {
1259         int i, reg, width;
1260
1261         for (i= 0, reg= PCI_BAR; reg <= last_reg; i += width, reg += 4 * width)
1262         {
1263                 width = record_bar(devind, i, reg == last_reg);
1264         }
1265 }
1266
1267 /*===========================================================================*
1268  *                              record_bar                                   *
1269  *===========================================================================*/
1270 static int record_bar(devind, bar_nr, last)
1271 int devind;
1272 int bar_nr;
1273 int last;
1274 {
1275         int reg, prefetch, type, dev_bar_nr, width;
1276         u32_t bar, bar2;
1277         u16_t cmd;
1278
1279         /* Start by assuming that this is a 32-bit bar, taking up one DWORD. */
1280         width = 1;
1281
1282         reg= PCI_BAR+4*bar_nr;
1283
1284         bar= pci_attr_r32_u(devind, reg);
1285         if (bar & PCI_BAR_IO)
1286         {
1287                 /* Disable I/O access before probing for BAR's size */
1288                 cmd = pci_attr_r16(devind, PCI_CR);
1289                 pci_attr_w16(devind, PCI_CR, cmd & ~PCI_CR_IO_EN);
1290
1291                 /* Probe BAR's size */
1292                 pci_attr_w32(devind, reg, 0xffffffff);
1293                 bar2= pci_attr_r32_u(devind, reg);
1294
1295                 /* Restore original state */
1296                 pci_attr_w32(devind, reg, bar);
1297                 pci_attr_w16(devind, PCI_CR, cmd);
1298
1299                 bar &= PCI_BAR_IO_MASK;         /* Clear non-address bits */
1300                 bar2 &= PCI_BAR_IO_MASK;
1301                 bar2= (~bar2 & 0xffff)+1;
1302                 if (debug)
1303                 {
1304                         printf("\tbar_%d: %d bytes at 0x%x I/O\n",
1305                                 bar_nr, bar2, bar);
1306                 }
1307
1308                 dev_bar_nr= pcidev[devind].pd_bar_nr++;
1309                 pcidev[devind].pd_bar[dev_bar_nr].pb_flags= PBF_IO;
1310                 pcidev[devind].pd_bar[dev_bar_nr].pb_base= bar;
1311                 pcidev[devind].pd_bar[dev_bar_nr].pb_size= bar2;
1312                 pcidev[devind].pd_bar[dev_bar_nr].pb_nr= bar_nr;
1313                 if (bar == 0)
1314                 {
1315                         pcidev[devind].pd_bar[dev_bar_nr].pb_flags |=
1316                                 PBF_INCOMPLETE;
1317                 }
1318         }
1319         else
1320         {
1321                 type= (bar & PCI_BAR_TYPE);
1322
1323                 switch(type) {
1324                 case PCI_TYPE_32:
1325                 case PCI_TYPE_32_1M:
1326                         break;
1327
1328                 case PCI_TYPE_64:
1329                         /* A 64-bit BAR takes up two consecutive DWORDs. */
1330                         if (last)
1331                         {
1332                                 printf("PCI: device %d.%d.%d BAR %d extends"
1333                                         " beyond designated area\n",
1334                                         pcidev[devind].pd_busnr,
1335                                         pcidev[devind].pd_dev,
1336                                         pcidev[devind].pd_func, bar_nr);
1337
1338                                 return width;
1339                         }
1340                         width++;
1341
1342                         bar2= pci_attr_r32_u(devind, reg+4);
1343
1344                         /* If the upper 32 bits of the BAR are not zero, the
1345                          * memory is inaccessible to us; ignore the BAR.
1346                          */
1347                         if (bar2 != 0)
1348                         {
1349                                 if (debug)
1350                                 {
1351                                         printf("\tbar_%d: (64-bit BAR with"
1352                                                 " high bits set)\n", bar_nr);
1353                                 }
1354
1355                                 return width;
1356                         }
1357
1358                         break;
1359
1360                 default:
1361                         /* Ignore the BAR. */
1362                         if (debug)
1363                         {
1364                                 printf("\tbar_%d: (unknown type %x)\n",
1365                                         bar_nr, type);
1366                         }
1367
1368                         return width;
1369                 }
1370
1371                 /* Disable mem access before probing for BAR's size */
1372                 cmd = pci_attr_r16(devind, PCI_CR);
1373                 pci_attr_w16(devind, PCI_CR, cmd & ~PCI_CR_MEM_EN);
1374
1375                 /* Probe BAR's size */
1376                 pci_attr_w32(devind, reg, 0xffffffff);
1377                 bar2= pci_attr_r32_u(devind, reg);
1378
1379                 /* Restore original values */
1380                 pci_attr_w32(devind, reg, bar);
1381                 pci_attr_w16(devind, PCI_CR, cmd);
1382
1383                 if (bar2 == 0)
1384                         return width;   /* Reg. is not implemented */
1385
1386                 prefetch= !!(bar & PCI_BAR_PREFETCH);
1387                 bar &= PCI_BAR_MEM_MASK;        /* Clear non-address bits */
1388                 bar2 &= PCI_BAR_MEM_MASK;
1389                 bar2= (~bar2)+1;
1390                 if (debug)
1391                 {
1392                         printf("\tbar_%d: 0x%x bytes at 0x%x%s memory%s\n",
1393                                 bar_nr, bar2, bar,
1394                                 prefetch ? " prefetchable" : "",
1395                                 type == PCI_TYPE_64 ? ", 64-bit" : "");
1396                 }
1397
1398                 dev_bar_nr= pcidev[devind].pd_bar_nr++;
1399                 pcidev[devind].pd_bar[dev_bar_nr].pb_flags= 0;
1400                 pcidev[devind].pd_bar[dev_bar_nr].pb_base= bar;
1401                 pcidev[devind].pd_bar[dev_bar_nr].pb_size= bar2;
1402                 pcidev[devind].pd_bar[dev_bar_nr].pb_nr= bar_nr;
1403                 if (bar == 0)
1404                 {
1405                         pcidev[devind].pd_bar[dev_bar_nr].pb_flags |=
1406                                 PBF_INCOMPLETE;
1407                 }
1408         }
1409
1410         return width;
1411 }
1412
1413 /*===========================================================================*
1414  *                              complete_bridges                             *
1415  *===========================================================================*/
1416 static void complete_bridges()
1417 {
1418         int i, freebus, devind, prim_busnr;
1419
1420         for (i= 0; i<nr_pcibus; i++)
1421         {
1422                 if (!pcibus[i].pb_needinit)
1423                         continue;
1424                 printf("should allocate bus number for bus %d\n", i);
1425                 freebus= get_freebus();
1426                 printf("got bus number %d\n", freebus);
1427
1428                 devind= pcibus[i].pb_devind;
1429
1430                 prim_busnr= pcidev[devind].pd_busnr;
1431                 if (prim_busnr != 0)
1432                 {
1433                         printf(
1434         "complete_bridge: updating subordinate bus number not implemented\n");
1435                 }
1436
1437                 pcibus[i].pb_needinit= 0;
1438                 pcibus[i].pb_busnr= freebus;
1439
1440                 printf("devind = %d\n", devind);
1441                 printf("prim_busnr= %d\n", prim_busnr);
1442
1443                 pci_attr_w8(devind, PPB_PRIMBN, prim_busnr);
1444                 pci_attr_w8(devind, PPB_SECBN, freebus);
1445                 pci_attr_w8(devind, PPB_SUBORDBN, freebus);
1446
1447                 printf("CR = 0x%x\n", pci_attr_r16(devind, PCI_CR));
1448                 printf("SECBLT = 0x%x\n", pci_attr_r8_u(devind, PPB_SECBLT));
1449                 printf("BRIDGECTRL = 0x%x\n",
1450                         pci_attr_r16(devind, PPB_BRIDGECTRL));
1451         }
1452 }
1453
1454 /*===========================================================================*
1455  *                              complete_bars                                *
1456  *===========================================================================*/
1457 static void complete_bars(void)
1458 {
1459         int i, j, bar_nr, reg;
1460         u32_t memgap_low, memgap_high, iogap_low, iogap_high, io_high,
1461                 base, size, v32, diff1, diff2;
1462         kinfo_t kinfo;
1463
1464         if(OK != sys_getkinfo(&kinfo))
1465                 panic("can't get kinfo");
1466
1467         /* Set memgap_low to just above physical memory */
1468         memgap_low= kinfo.mem_high_phys;
1469         memgap_high= 0xfe000000;        /* Leave space for the CPU (APIC) */
1470
1471         if (debug)
1472         {
1473                 printf("complete_bars: initial gap: [0x%x .. 0x%x>\n",
1474                         memgap_low, memgap_high);
1475         }
1476
1477         /* Find the lowest memory base */
1478         for (i= 0; i<nr_pcidev; i++)
1479         {
1480                 for (j= 0; j<pcidev[i].pd_bar_nr; j++)
1481                 {
1482                         if (pcidev[i].pd_bar[j].pb_flags & PBF_IO)
1483                                 continue;
1484                         if (pcidev[i].pd_bar[j].pb_flags & PBF_INCOMPLETE)
1485                                 continue;
1486                         base= pcidev[i].pd_bar[j].pb_base;
1487                         size= pcidev[i].pd_bar[j].pb_size;
1488
1489                         if (base >= memgap_high)
1490                                 continue;       /* Not in the gap */
1491                         if (base+size <= memgap_low)
1492                                 continue;       /* Not in the gap */
1493
1494                         /* Reduce the gap by the smallest amount */
1495                         diff1= base+size-memgap_low;
1496                         diff2= memgap_high-base;
1497
1498                         if (diff1 < diff2)
1499                                 memgap_low= base+size;
1500                         else
1501                                 memgap_high= base;
1502                 }
1503         }
1504
1505         if (debug)
1506         {
1507                 printf("complete_bars: intermediate gap: [0x%x .. 0x%x>\n",
1508                         memgap_low, memgap_high);
1509         }
1510
1511         /* Should check main memory size */
1512         if (memgap_high < memgap_low)
1513         {
1514                 printf("PCI: bad memory gap: [0x%x .. 0x%x>\n",
1515                         memgap_low, memgap_high);
1516                 panic(NULL);
1517         }
1518
1519         iogap_high= 0x10000;
1520         iogap_low= 0x400;
1521
1522         /* Find the free I/O space */
1523         for (i= 0; i<nr_pcidev; i++)
1524         {
1525                 for (j= 0; j<pcidev[i].pd_bar_nr; j++)
1526                 {
1527                         if (!(pcidev[i].pd_bar[j].pb_flags & PBF_IO))
1528                                 continue;
1529                         if (pcidev[i].pd_bar[j].pb_flags & PBF_INCOMPLETE)
1530                                 continue;
1531                         base= pcidev[i].pd_bar[j].pb_base;
1532                         size= pcidev[i].pd_bar[j].pb_size;
1533                         if (base >= iogap_high)
1534                                 continue;
1535                         if (base+size <= iogap_low)
1536                                 continue;
1537 #if 0
1538                         if (debug)
1539                         {
1540                                 printf(
1541                 "pci device %d (%04x:%04x), bar %d: base 0x%x, size 0x%x\n",
1542                                         i, pcidev[i].pd_vid, pcidev[i].pd_did,
1543                                         j, base, size);
1544                         }
1545 #endif
1546                         if (base+size-iogap_low < iogap_high-base)
1547                                 iogap_low= base+size;
1548                         else
1549                                 iogap_high= base;
1550                 }
1551         }
1552
1553         if (iogap_high < iogap_low)
1554         {
1555                 if (debug)
1556                 {
1557                         printf("iogap_high too low, should panic\n");
1558                 }
1559                 else
1560                         panic("iogap_high too low: %d", iogap_high);
1561         }
1562         if (debug)
1563                 printf("I/O range = [0x%x..0x%x>\n", iogap_low, iogap_high);
1564
1565         for (i= 0; i<nr_pcidev; i++)
1566         {
1567                 for (j= 0; j<pcidev[i].pd_bar_nr; j++)
1568                 {
1569                         if (pcidev[i].pd_bar[j].pb_flags & PBF_IO)
1570                                 continue;
1571                         if (!(pcidev[i].pd_bar[j].pb_flags & PBF_INCOMPLETE))
1572                                 continue;
1573                         size= pcidev[i].pd_bar[j].pb_size;
1574                         if (size < PAGE_SIZE)
1575                                 size= PAGE_SIZE;
1576                         base= memgap_high-size;
1577                         base &= ~(u32_t)(size-1);
1578                         if (base < memgap_low)
1579                                 panic("memory base too low: %d", base);
1580                         memgap_high= base;
1581                         bar_nr= pcidev[i].pd_bar[j].pb_nr;
1582                         reg= PCI_BAR + 4*bar_nr;
1583                         v32= pci_attr_r32_u(i, reg);
1584                         pci_attr_w32(i, reg, v32 | base);
1585                         if (debug)
1586                         {
1587                                 printf(
1588                 "complete_bars: allocated 0x%x size %d to %d.%d.%d, bar_%d\n",
1589                                         base, size, pcidev[i].pd_busnr,
1590                                         pcidev[i].pd_dev, pcidev[i].pd_func,
1591                                         bar_nr);
1592                         }
1593                         pcidev[i].pd_bar[j].pb_base= base;
1594                         pcidev[i].pd_bar[j].pb_flags &= ~PBF_INCOMPLETE;
1595                 }
1596
1597                 io_high= iogap_high;
1598                 for (j= 0; j<pcidev[i].pd_bar_nr; j++)
1599                 {
1600                         if (!(pcidev[i].pd_bar[j].pb_flags & PBF_IO))
1601                                 continue;
1602                         if (!(pcidev[i].pd_bar[j].pb_flags & PBF_INCOMPLETE))
1603                                 continue;
1604                         size= pcidev[i].pd_bar[j].pb_size;
1605                         base= iogap_high-size;
1606                         base &= ~(u32_t)(size-1);
1607
1608                         /* Assume that ISA compatibility is required. Only
1609                          * use the lowest 256 bytes out of every 1024 bytes.
1610                          */
1611                         base &= 0xfcff;
1612
1613                         if (base < iogap_low)
1614                                 panic("I/O base too low: %d", base);
1615
1616                         iogap_high= base;
1617                         bar_nr= pcidev[i].pd_bar[j].pb_nr;
1618                         reg= PCI_BAR + 4*bar_nr;
1619                         v32= pci_attr_r32_u(i, reg);
1620                         pci_attr_w32(i, reg, v32 | base);
1621                         if (debug)
1622                         {
1623                                 printf(
1624                 "complete_bars: allocated 0x%x size %d to %d.%d.%d, bar_%d\n",
1625                                         base, size, pcidev[i].pd_busnr,
1626                                         pcidev[i].pd_dev, pcidev[i].pd_func,
1627                                         bar_nr);
1628                         }
1629                         pcidev[i].pd_bar[j].pb_base= base;
1630                         pcidev[i].pd_bar[j].pb_flags &= ~PBF_INCOMPLETE;
1631
1632                 }
1633                 if (iogap_high != io_high)
1634                 {
1635                         update_bridge4dev_io(i, iogap_high,
1636                                 io_high-iogap_high);
1637                 }
1638         }
1639
1640         for (i= 0; i<nr_pcidev; i++)
1641         {
1642                 for (j= 0; j<pcidev[i].pd_bar_nr; j++)
1643                 {
1644                         if (!(pcidev[i].pd_bar[j].pb_flags & PBF_INCOMPLETE))
1645                                 continue;
1646                         printf("should allocate resources for device %d\n", i);
1647                 }
1648         }
1649         return;
1650 }
1651
1652 /*===========================================================================*
1653  *                              update_bridge4dev_io                         *
1654  *===========================================================================*/
1655 static void update_bridge4dev_io(
1656   int devind,
1657   u32_t io_base,
1658   u32_t io_size
1659 )
1660 {
1661         int busnr, busind, type, br_devind;
1662         u16_t v16;
1663
1664         busnr= pcidev[devind].pd_busnr;
1665         busind= get_busind(busnr);
1666         type= pcibus[busind].pb_type;
1667         if (type == PBT_INTEL_HOST)
1668                 return; /* Nothing to do for host controller */
1669         if (type == PBT_PCIBRIDGE)
1670         {
1671                 printf(
1672                 "update_bridge4dev_io: not implemented for PCI bridges\n");
1673                 return;
1674         }
1675         if (type != PBT_CARDBUS)
1676                 panic("update_bridge4dev_io: strange bus type: %d", type);
1677
1678         if (debug)
1679         {
1680                 printf("update_bridge4dev_io: adding 0x%x at 0x%x\n",
1681                         io_size, io_base);
1682         }
1683         br_devind= pcibus[busind].pb_devind;
1684         pci_attr_w32(br_devind, CBB_IOLIMIT_0, io_base+io_size-1);
1685         pci_attr_w32(br_devind, CBB_IOBASE_0, io_base);
1686
1687         /* Enable I/O access. Enable busmaster access as well. */
1688         v16= pci_attr_r16(devind, PCI_CR);
1689         pci_attr_w16(devind, PCI_CR, v16 | PCI_CR_IO_EN | PCI_CR_MAST_EN);
1690 }
1691
1692 /*===========================================================================*
1693  *                              get_freebus                                  *
1694  *===========================================================================*/
1695 static int get_freebus()
1696 {
1697         int i, freebus;
1698
1699         freebus= 1;
1700         for (i= 0; i<nr_pcibus; i++)
1701         {
1702                 if (pcibus[i].pb_needinit)
1703                         continue;
1704                 if (pcibus[i].pb_type == PBT_INTEL_HOST)
1705                         continue;
1706                 if (pcibus[i].pb_busnr <= freebus)
1707                         freebus= pcibus[i].pb_busnr+1;
1708                 printf("get_freebus: should check suboridinate bus number\n");
1709         }
1710         return freebus;
1711 }
1712
1713 /*===========================================================================*
1714  *                              do_isabridge                                 *
1715  *===========================================================================*/
1716 static int do_isabridge(busind)
1717 int busind;
1718 {
1719         int i, j, r, type, busnr, unknown_bridge, bridge_dev;
1720         u16_t vid, did;
1721         u32_t t3;
1722         char *dstr;
1723
1724         unknown_bridge= -1;
1725         bridge_dev= -1;
1726         j= 0;   /* lint */
1727         vid= did= 0;    /* lint */
1728         busnr= pcibus[busind].pb_busnr;
1729         for (i= 0; i< nr_pcidev; i++)
1730         {
1731                 if (pcidev[i].pd_busnr != busnr)
1732                         continue;
1733                 t3= ((pcidev[i].pd_baseclass << 16) |
1734                         (pcidev[i].pd_subclass << 8) | pcidev[i].pd_infclass);
1735                 if (t3 == PCI_T3_ISA)
1736                 {
1737                         /* ISA bridge. Report if no supported bridge is
1738                          * found.
1739                          */
1740                         unknown_bridge= i;
1741                 }
1742
1743                 vid= pcidev[i].pd_vid;
1744                 did= pcidev[i].pd_did;
1745                 for (j= 0; pci_isabridge[j].vid != 0; j++)
1746                 {
1747                         if (pci_isabridge[j].vid != vid)
1748                                 continue;
1749                         if (pci_isabridge[j].did != did)
1750                                 continue;
1751                         if (pci_isabridge[j].checkclass &&
1752                                 unknown_bridge != i)
1753                         {
1754                                 /* This part of multifunction device is
1755                                  * not the bridge.
1756                                  */
1757                                 continue;
1758                         }
1759                         break;
1760                 }
1761                 if (pci_isabridge[j].vid)
1762                 {
1763                         bridge_dev= i;
1764                         break;
1765                 }
1766         }
1767
1768         if (bridge_dev != -1)
1769         {
1770                 dstr= pci_dev_name(vid, did);
1771                 if (!dstr)
1772                         dstr= "unknown device";
1773                 if (debug)
1774                 {
1775                         printf("found ISA bridge (%04X:%04X) %s\n",
1776                                 vid, did, dstr);
1777                 }
1778                 pcibus[busind].pb_isabridge_dev= bridge_dev;
1779                 type= pci_isabridge[j].type;
1780                 pcibus[busind].pb_isabridge_type= type;
1781                 switch(type)
1782                 {
1783                 case PCI_IB_PIIX:
1784                         r= do_piix(bridge_dev);
1785                         break;
1786                 case PCI_IB_VIA:
1787                         r= do_via_isabr(bridge_dev);
1788                         break;
1789                 case PCI_IB_AMD:
1790                         r= do_amd_isabr(bridge_dev);
1791                         break;
1792                 case PCI_IB_SIS:
1793                         r= do_sis_isabr(bridge_dev);
1794                         break;
1795                 default:
1796                         panic("unknown ISA bridge type: %d", type);
1797                 }
1798                 return r;
1799         }
1800
1801         if (unknown_bridge == -1)
1802         {
1803                 if (debug)
1804                 {
1805                         printf("(warning) no ISA bridge found on bus %d\n",
1806                                 busind);
1807                 }
1808                 return 0;
1809         }
1810         if (debug)
1811         {
1812                 printf(
1813                 "(warning) unsupported ISA bridge %04X:%04X for bus %d\n",
1814                         pcidev[unknown_bridge].pd_vid,
1815                         pcidev[unknown_bridge].pd_did, busind);
1816         }
1817         return 0;
1818 }
1819
1820 /*
1821  * tells acpi which two busses are connected by this bridge. The primary bus
1822  * (pbnr) must be already known to acpi and it must map dev as the connection to
1823  * the secondary (sbnr) bus
1824  */
1825 static void acpi_map_bridge(unsigned pbnr, unsigned dev, unsigned sbnr)
1826 {
1827         int err;
1828         message m;
1829
1830         ((struct acpi_map_bridge_req *)&m)->hdr.request = ACPI_REQ_MAP_BRIDGE;
1831         ((struct acpi_map_bridge_req *)&m)->primary_bus = pbnr;
1832         ((struct acpi_map_bridge_req *)&m)->secondary_bus = sbnr;
1833         ((struct acpi_map_bridge_req *)&m)->device = dev;
1834
1835         if ((err = ipc_sendrec(acpi_ep, &m)) != OK)
1836                 panic("PCI: error %d while receiveing from ACPI\n", err);
1837
1838         if (((struct acpi_map_bridge_resp *)&m)->err != OK)
1839                 printf("PCI: acpi failed to map pci (%d) to pci (%d) bridge\n",
1840                                                                 pbnr, sbnr);
1841 }
1842
1843 /*===========================================================================*
1844  *                              do_pcibridge                                 *
1845  *===========================================================================*/
1846 static void do_pcibridge(busind)
1847 int busind;
1848 {
1849         int i, devind, busnr;
1850         int ind, type;
1851         u16_t vid, did;
1852         u8_t sbusn, baseclass, subclass, infclass, headt;
1853         u32_t t3;
1854
1855         vid= did= 0;    /* lint */
1856         busnr= pcibus[busind].pb_busnr;
1857         for (devind= 0; devind< nr_pcidev; devind++)
1858         {
1859 #if 0
1860                 printf("do_pcibridge: trying %u.%u.%u\n",
1861                         pcidev[devind].pd_busnr, pcidev[devind].pd_dev,
1862                         pcidev[devind].pd_func);
1863 #endif
1864
1865                 if (pcidev[devind].pd_busnr != busnr)
1866                 {
1867 #if 0
1868                         printf("wrong bus\n");
1869 #endif
1870                         continue;
1871                 }
1872
1873                 vid= pcidev[devind].pd_vid;
1874                 did= pcidev[devind].pd_did;
1875                 for (i= 0; pci_pcibridge[i].vid != 0; i++)
1876                 {
1877                         if (pci_pcibridge[i].vid != vid)
1878                                 continue;
1879                         if (pci_pcibridge[i].did != did)
1880                                 continue;
1881                         break;
1882                 }
1883                 type= pci_pcibridge[i].type;
1884                 if (pci_pcibridge[i].vid == 0)
1885                 {
1886                         headt= pci_attr_r8_u(devind, PCI_HEADT);
1887                         type= 0;
1888                         if ((headt & PHT_MASK) == PHT_BRIDGE)
1889                                 type= PCI_PPB_STD;
1890                         else if ((headt & PHT_MASK) == PHT_CARDBUS)
1891                                 type= PCI_PPB_CB;
1892                         else
1893                         {
1894 #if 0
1895                                 printf("not a bridge\n");
1896 #endif
1897                                 continue;       /* Not a bridge */
1898                         }
1899
1900                         baseclass= pci_attr_r8_u(devind, PCI_BCR);
1901                         subclass= pci_attr_r8_u(devind, PCI_SCR);
1902                         infclass= pci_attr_r8_u(devind, PCI_PIFR);
1903                         t3= ((baseclass << 16) | (subclass << 8) | infclass);
1904                         if (type == PCI_PPB_STD &&
1905                                 t3 != PCI_T3_PCI2PCI &&
1906                                 t3 != PCI_T3_PCI2PCI_SUBTR)
1907                         {
1908                                 printf(
1909 "Unknown PCI class %02x/%02x/%02x for PCI-to-PCI bridge, device %04X:%04X\n",
1910                                         baseclass, subclass, infclass,
1911                                         vid, did);
1912                                 continue;
1913                          }
1914                         if (type == PCI_PPB_CB &&
1915                                 t3 != PCI_T3_CARDBUS)
1916                         {
1917                                 printf(
1918 "Unknown PCI class %02x/%02x/%02x for Cardbus bridge, device %04X:%04X\n",
1919                                         baseclass, subclass, infclass,
1920                                         vid, did);
1921                                 continue;
1922                          }
1923                 }
1924
1925                 if (debug)
1926                 {
1927                         printf("%u.%u.%u: PCI-to-PCI bridge: %04X:%04X\n",
1928                                 pcidev[devind].pd_busnr,
1929                                 pcidev[devind].pd_dev,
1930                                 pcidev[devind].pd_func, vid, did);
1931                 }
1932
1933                 /* Assume that the BIOS initialized the secondary bus
1934                  * number.
1935                  */
1936                 sbusn= pci_attr_r8_u(devind, PPB_SECBN);
1937
1938                 if (nr_pcibus >= NR_PCIBUS)
1939                         panic("too many PCI busses: %d", nr_pcibus);
1940                 ind= nr_pcibus;
1941                 nr_pcibus++;
1942                 pcibus[ind].pb_type= PBT_PCIBRIDGE;
1943                 pcibus[ind].pb_needinit= 1;
1944                 pcibus[ind].pb_isabridge_dev= -1;
1945                 pcibus[ind].pb_isabridge_type= 0;
1946                 pcibus[ind].pb_devind= devind;
1947                 pcibus[ind].pb_busnr= sbusn;
1948                 pcibus[ind].pb_rreg8= pcibus[busind].pb_rreg8;
1949                 pcibus[ind].pb_rreg16= pcibus[busind].pb_rreg16;
1950                 pcibus[ind].pb_rreg32= pcibus[busind].pb_rreg32;
1951                 pcibus[ind].pb_wreg8= pcibus[busind].pb_wreg8;
1952                 pcibus[ind].pb_wreg16= pcibus[busind].pb_wreg16;
1953                 pcibus[ind].pb_wreg32= pcibus[busind].pb_wreg32;
1954                 switch(type)
1955                 {
1956                 case PCI_PPB_STD:
1957                         pcibus[ind].pb_rsts= pcibr_std_rsts;
1958                         pcibus[ind].pb_wsts= pcibr_std_wsts;
1959                         break;
1960                 case PCI_PPB_CB:
1961                         pcibus[ind].pb_type= PBT_CARDBUS;
1962                         pcibus[ind].pb_rsts= pcibr_cb_rsts;
1963                         pcibus[ind].pb_wsts= pcibr_cb_wsts;
1964                         break;
1965                 case PCI_AGPB_VIA:
1966                         pcibus[ind].pb_rsts= pcibr_via_rsts;
1967                         pcibus[ind].pb_wsts= pcibr_via_wsts;
1968                         break;
1969                 default:
1970                     panic("unknown PCI-PCI bridge type: %d", type);
1971                 }
1972
1973                 if (machine.apic_enabled)
1974                         acpi_map_bridge(pcidev[devind].pd_busnr,
1975                                         pcidev[devind].pd_dev, sbusn);
1976
1977                 if (debug)
1978                 {
1979                         printf(
1980                         "bus(table) = %d, bus(sec) = %d, bus(subord) = %d\n",
1981                                 ind, sbusn, pci_attr_r8_u(devind, PPB_SUBORDBN));
1982                 }
1983                 if (sbusn == 0)
1984                 {
1985                         printf("Secondary bus number not initialized\n");
1986                         continue;
1987                 }
1988                 pcibus[ind].pb_needinit= 0;
1989
1990                 probe_bus(ind);
1991
1992                 /* Look for PCI bridges */
1993                 do_pcibridge(ind);
1994         }
1995 }
1996
1997 /*===========================================================================*
1998  *                              get_busind                                           *
1999  *===========================================================================*/
2000 static int get_busind(busnr)
2001 int busnr;
2002 {
2003         int i;
2004
2005         for (i= 0; i<nr_pcibus; i++)
2006         {
2007                 if (pcibus[i].pb_busnr == busnr)
2008                         return i;
2009         }
2010         panic("get_busind: can't find bus: %d", busnr);
2011 }
2012
2013 /*===========================================================================*
2014  *                              do_piix                                      *
2015  *===========================================================================*/
2016 static int do_piix(int devind)
2017 {
2018         int i, s, irqrc, irq;
2019         u32_t elcr1, elcr2, elcr;
2020
2021 #if DEBUG
2022         printf("in piix\n");
2023 #endif
2024         if (OK != (s=sys_inb(PIIX_ELCR1, &elcr1)))
2025                 printf("Warning, sys_inb failed: %d\n", s);
2026         if (OK != (s=sys_inb(PIIX_ELCR2, &elcr2)))
2027                 printf("Warning, sys_inb failed: %d\n", s);
2028         elcr= elcr1 | (elcr2 << 8);
2029         for (i= 0; i<4; i++)
2030         {
2031                 irqrc= pci_attr_r8_u(devind, PIIX_PIRQRCA+i);
2032                 if (irqrc & PIIX_IRQ_DI)
2033                 {
2034                         if (debug)
2035                                 printf("INT%c: disabled\n", 'A'+i);
2036                 }
2037                 else
2038                 {
2039                         irq= irqrc & PIIX_IRQ_MASK;
2040                         if (debug)
2041                                 printf("INT%c: %d\n", 'A'+i, irq);
2042                         if (!(elcr & (1 << irq)))
2043                         {
2044                                 if (debug)
2045                                 {
2046                                         printf(
2047                                 "(warning) IRQ %d is not level triggered\n",
2048                                                 irq);
2049                                 }
2050                         }
2051                         irq_mode_pci(irq);
2052                 }
2053         }
2054         return 0;
2055 }
2056
2057 /*===========================================================================*
2058  *                              do_amd_isabr                                 *
2059  *===========================================================================*/
2060 static int do_amd_isabr(int devind)
2061 {
2062         int i, busnr, dev, func, xdevind, irq, edge;
2063         u8_t levmask;
2064         u16_t pciirq;
2065
2066         /* Find required function */
2067         func= AMD_ISABR_FUNC;
2068         busnr= pcidev[devind].pd_busnr;
2069         dev= pcidev[devind].pd_dev;
2070
2071         /* Fake a device with the required function */
2072         if (nr_pcidev >= NR_PCIDEV)
2073                 panic("too many PCI devices: %d", nr_pcidev);
2074         xdevind= nr_pcidev;
2075         pcidev[xdevind].pd_busnr= busnr;
2076         pcidev[xdevind].pd_dev= dev;
2077         pcidev[xdevind].pd_func= func;
2078         pcidev[xdevind].pd_inuse= 1;
2079         nr_pcidev++;
2080
2081         levmask= pci_attr_r8_u(xdevind, AMD_ISABR_PCIIRQ_LEV);
2082         pciirq= pci_attr_r16(xdevind, AMD_ISABR_PCIIRQ_ROUTE);
2083         for (i= 0; i<4; i++)
2084         {
2085                 edge= (levmask >> i) & 1;
2086                 irq= (pciirq >> (4*i)) & 0xf;
2087                 if (!irq)
2088                 {
2089                         if (debug)
2090                                 printf("INT%c: disabled\n", 'A'+i);
2091                 }
2092                 else
2093                 {
2094                         if (debug)
2095                                 printf("INT%c: %d\n", 'A'+i, irq);
2096                         if (edge && debug)
2097                         {
2098                                 printf(
2099                                 "(warning) IRQ %d is not level triggered\n",
2100                                         irq);
2101                         }
2102                         irq_mode_pci(irq);
2103                 }
2104         }
2105         nr_pcidev--;
2106         return 0;
2107 }
2108
2109 /*===========================================================================*
2110  *                              do_sis_isabr                                 *
2111  *===========================================================================*/
2112 static int do_sis_isabr(int devind)
2113 {
2114         int i, irq;
2115
2116         irq= 0; /* lint */
2117         for (i= 0; i<4; i++)
2118         {
2119                 irq= pci_attr_r8_u(devind, SIS_ISABR_IRQ_A+i);
2120                 if (irq & SIS_IRQ_DISABLED)
2121                 {
2122                         if (debug)
2123                                 printf("INT%c: disabled\n", 'A'+i);
2124                 }
2125                 else
2126                 {
2127                         irq &= SIS_IRQ_MASK;
2128                         if (debug)
2129                                 printf("INT%c: %d\n", 'A'+i, irq);
2130                         irq_mode_pci(irq);
2131                 }
2132         }
2133         return 0;
2134 }
2135
2136 /*===========================================================================*
2137  *                              do_via_isabr                                 *
2138  *===========================================================================*/
2139 static int do_via_isabr(int devind)
2140 {
2141         int i, irq, edge;
2142         u8_t levmask;
2143
2144         levmask= pci_attr_r8_u(devind, VIA_ISABR_EL);
2145         irq= 0; /* lint */
2146         edge= 0; /* lint */
2147         for (i= 0; i<4; i++)
2148         {
2149                 switch(i)
2150                 {
2151                 case 0:
2152                         edge= (levmask & VIA_ISABR_EL_INTA);
2153                         irq= pci_attr_r8_u(devind, VIA_ISABR_IRQ_R2) >> 4;
2154                         break;
2155                 case 1:
2156                         edge= (levmask & VIA_ISABR_EL_INTB);
2157                         irq= pci_attr_r8_u(devind, VIA_ISABR_IRQ_R2);
2158                         break;
2159                 case 2:
2160                         edge= (levmask & VIA_ISABR_EL_INTC);
2161                         irq= pci_attr_r8_u(devind, VIA_ISABR_IRQ_R3) >> 4;
2162                         break;
2163                 case 3:
2164                         edge= (levmask & VIA_ISABR_EL_INTD);
2165                         irq= pci_attr_r8_u(devind, VIA_ISABR_IRQ_R1) >> 4;
2166                         break;
2167                 default:
2168                         assert(0);
2169                 }
2170                 irq &= 0xf;
2171                 if (!irq)
2172                 {
2173                         if (debug)
2174                                 printf("INT%c: disabled\n", 'A'+i);
2175                 }
2176                 else
2177                 {
2178                         if (debug)
2179                                 printf("INT%c: %d\n", 'A'+i, irq);
2180                         if (edge && debug)
2181                         {
2182                                 printf(
2183                                 "(warning) IRQ %d is not level triggered\n",
2184                                         irq);
2185                         }
2186                         irq_mode_pci(irq);
2187                 }
2188         }
2189         return 0;
2190 }
2191
2192
2193 #if 0
2194 /*===========================================================================*
2195  *                              report_vga                                   *
2196  *===========================================================================*/
2197 static void report_vga(devind)
2198 int devind;
2199 {
2200         /* Report the amount of video memory. This is needed by the X11R6
2201          * postinstall script to chmem the X server. Hopefully this can be
2202          * removed when we get virtual memory.
2203          */
2204         size_t amount, size;
2205         int i;
2206
2207         amount= 0;
2208         for (i= 0; i<pcidev[devind].pd_bar_nr; i++)
2209         {
2210                 if (pcidev[devind].pd_bar[i].pb_flags & PBF_IO)
2211                         continue;
2212                 size= pcidev[devind].pd_bar[i].pb_size;
2213                 if (size < amount)
2214                         continue;
2215                 amount= size;
2216         }
2217         if (size != 0)
2218         {
2219                 printf("PCI: video memory for device at %d.%d.%d: %d bytes\n",
2220                         pcidev[devind].pd_busnr,
2221                         pcidev[devind].pd_dev,
2222                         pcidev[devind].pd_func,
2223                         amount);
2224         }
2225 }
2226 #endif
2227
2228
2229 /*===========================================================================*
2230  *                              pci_vid_name                                 *
2231  *===========================================================================*/
2232 static char *pci_vid_name(u16_t vid)
2233 {
2234         int i;
2235
2236         for (i= 0; pci_vendor_table[i].name; i++)
2237         {
2238                 if (pci_vendor_table[i].vid == vid)
2239                         return pci_vendor_table[i].name;
2240         }
2241         return "unknown";
2242 }
2243
2244 /*===========================================================================*
2245  *                              pci_baseclass_name                           *
2246  *===========================================================================*/
2247 static char *pci_baseclass_name(u8_t baseclass)
2248 {
2249         int i;
2250
2251         for (i= 0; pci_baseclass_table[i].name; i++)
2252         {
2253                 if (pci_baseclass_table[i].baseclass == baseclass)
2254                         return pci_baseclass_table[i].name;
2255         }
2256         return NULL;
2257 }
2258
2259 /*===========================================================================*
2260  *                              pci_subclass_name                            *
2261  *===========================================================================*/
2262 static char *pci_subclass_name(u8_t baseclass, u8_t subclass, u8_t infclass)
2263 {
2264         int i;
2265
2266         for (i= 0; pci_subclass_table[i].name; i++)
2267         {
2268                 if (pci_subclass_table[i].baseclass != baseclass)
2269                         continue;
2270                 if (pci_subclass_table[i].subclass != subclass)
2271                         continue;
2272                 if (pci_subclass_table[i].infclass != infclass &&
2273                         pci_subclass_table[i].infclass != (u16_t)-1)
2274                 {
2275                         continue;
2276                 }
2277                 return pci_subclass_table[i].name;
2278         }
2279         return NULL;
2280 }
2281
2282 /*===========================================================================*
2283  *                              ntostr                                       *
2284  *===========================================================================*/
2285 static void ntostr(n, str, end)
2286 unsigned n;
2287 char **str;
2288 const char *end;
2289 {
2290         char tmpstr[20];
2291         int i;
2292
2293         if (n == 0)
2294         {
2295                 tmpstr[0]= '0';
2296                 i= 1;
2297         }
2298         else
2299         {
2300                 for (i= 0; n; i++)
2301                 {
2302                         tmpstr[i]= '0' + (n%10);
2303                         n /= 10;
2304                 }
2305         }
2306         for (; i>0; i--)
2307         {
2308                 if (*str == end)
2309                 {
2310                         break;
2311                 }
2312                 **str= tmpstr[i-1];
2313                 (*str)++;
2314         }
2315         if (*str == end)
2316                 (*str)[-1]= '\0';
2317         else
2318                 **str= '\0';
2319 }
2320
2321 /*===========================================================================*
2322  *                              pci_attr_rsts                                *
2323  *===========================================================================*/
2324 static u16_t pci_attr_rsts(devind)
2325 int devind;
2326 {
2327         int busnr, busind;
2328
2329         busnr= pcidev[devind].pd_busnr;
2330         busind= get_busind(busnr);
2331         return pcibus[busind].pb_rsts(busind);
2332 }
2333
2334
2335 /*===========================================================================*
2336  *                              pcibr_std_rsts                               *
2337  *===========================================================================*/
2338 static u16_t pcibr_std_rsts(busind)
2339 int busind;
2340 {
2341         int devind;
2342
2343         devind= pcibus[busind].pb_devind;
2344         return pci_attr_r16(devind, PPB_SSTS);
2345 }
2346
2347 /*===========================================================================*
2348  *                              pcibr_std_wsts                               *
2349  *===========================================================================*/
2350 static void pcibr_std_wsts(int busind, u16_t value)
2351 {
2352         int devind;
2353         devind= pcibus[busind].pb_devind;
2354
2355 #if 0
2356         printf("pcibr_std_wsts(%d, 0x%X), devind= %d\n",
2357                 busind, value, devind);
2358 #endif
2359         pci_attr_w16(devind, PPB_SSTS, value);
2360 }
2361
2362 /*===========================================================================*
2363  *                              pcibr_cb_rsts                                *
2364  *===========================================================================*/
2365 static u16_t pcibr_cb_rsts(busind)
2366 int busind;
2367 {
2368         int devind;
2369         devind= pcibus[busind].pb_devind;
2370
2371         return pci_attr_r16(devind, CBB_SSTS);
2372 }
2373
2374 /*===========================================================================*
2375  *                              pcibr_cb_wsts                                *
2376  *===========================================================================*/
2377 static void pcibr_cb_wsts(int busind, u16_t value)
2378 {
2379         int devind;
2380         devind= pcibus[busind].pb_devind;
2381
2382 #if 0
2383         printf("pcibr_cb_wsts(%d, 0x%X), devind= %d\n",
2384                 busind, value, devind);
2385 #endif
2386         pci_attr_w16(devind, CBB_SSTS, value);
2387 }
2388
2389 /*===========================================================================*
2390  *                              pcibr_via_rsts                               *
2391  *===========================================================================*/
2392 static u16_t pcibr_via_rsts(int busind)
2393 {
2394         return 0;
2395 }
2396
2397 /*===========================================================================*
2398  *                              pcibr_via_wsts                               *
2399  *===========================================================================*/
2400 static void pcibr_via_wsts(int busind, u16_t value)
2401 {
2402         int devind;
2403         devind= pcibus[busind].pb_devind;
2404
2405 #if 0
2406         printf("pcibr_via_wsts(%d, 0x%X), devind= %d (not implemented)\n",
2407                 busind, value, devind);
2408 #endif
2409 }
2410
2411 /*===========================================================================*
2412  *                              pci_attr_wsts                                *
2413  *===========================================================================*/
2414 static void pci_attr_wsts(int devind, u16_t value)
2415 {
2416         int busnr, busind;
2417
2418         busnr= pcidev[devind].pd_busnr;
2419         busind= get_busind(busnr);
2420         pcibus[busind].pb_wsts(busind, value);
2421 }
2422
2423
2424 /*===========================================================================*
2425  *                              pcii_rreg8                                   *
2426  *===========================================================================*/
2427 static u8_t pcii_rreg8(busind, devind, port)
2428 int busind;
2429 int devind;
2430 int port;
2431 {
2432         u8_t v;
2433         int s;
2434
2435         v= PCII_RREG8_(pcibus[busind].pb_busnr,
2436                 pcidev[devind].pd_dev, pcidev[devind].pd_func,
2437                 port);
2438         if (OK != (s=sys_outl(PCII_CONFADD, PCII_UNSEL)))
2439                 printf("PCI: warning, sys_outl failed: %d\n", s);
2440 #if 0
2441         printf("pcii_rreg8(%d, %d, 0x%X): %d.%d.%d= 0x%X\n",
2442                 busind, devind, port,
2443                 pcibus[busind].pb_bus, pcidev[devind].pd_dev,
2444                 pcidev[devind].pd_func, v);
2445 #endif
2446         return v;
2447 }
2448
2449 /*===========================================================================*
2450  *                              pcii_rreg16                                  *
2451  *===========================================================================*/
2452 static u16_t pcii_rreg16(int busind, int devind, int port)
2453 {
2454         u16_t v;
2455         int s;
2456
2457         v= PCII_RREG16_(pcibus[busind].pb_busnr,
2458                 pcidev[devind].pd_dev, pcidev[devind].pd_func,
2459                 port);
2460         if (OK != (s=sys_outl(PCII_CONFADD, PCII_UNSEL)))
2461                 printf("PCI: warning, sys_outl failed: %d\n", s);
2462 #if 0
2463         printf("pcii_rreg16(%d, %d, 0x%X): %d.%d.%d= 0x%X\n",
2464                 busind, devind, port,
2465                 pcibus[busind].pb_bus, pcidev[devind].pd_dev,
2466                 pcidev[devind].pd_func, v);
2467 #endif
2468         return v;
2469 }
2470
2471 /*===========================================================================*
2472  *                              pcii_rreg32                                  *
2473  *===========================================================================*/
2474 static u32_t pcii_rreg32(int busind, int devind, int port)
2475 {
2476         u32_t v;
2477         int s;
2478
2479         v= PCII_RREG32_(pcibus[busind].pb_busnr,
2480                 pcidev[devind].pd_dev, pcidev[devind].pd_func,
2481                 port);
2482         if (OK != (s=sys_outl(PCII_CONFADD, PCII_UNSEL)))
2483                 printf("PCI: warning, sys_outl failed: %d\n", s);
2484 #if 0
2485         printf("pcii_rreg32(%d, %d, 0x%X): %d.%d.%d= 0x%X\n",
2486                 busind, devind, port,
2487                 pcibus[busind].pb_bus, pcidev[devind].pd_dev,
2488                 pcidev[devind].pd_func, v);
2489 #endif
2490         return v;
2491 }
2492
2493 /*===========================================================================*
2494  *                              pcii_wreg8                                   *
2495  *===========================================================================*/
2496 static void pcii_wreg8(
2497   int busind,
2498   int devind,
2499   int port,
2500   u8_t value
2501 )
2502 {
2503         int s;
2504 #if 0
2505         printf("pcii_wreg8(%d, %d, 0x%X, 0x%X): %d.%d.%d\n",
2506                 busind, devind, port, value,
2507                 pcibus[busind].pb_bus, pcidev[devind].pd_dev,
2508                 pcidev[devind].pd_func);
2509 #endif
2510         PCII_WREG8_(pcibus[busind].pb_busnr,
2511                 pcidev[devind].pd_dev, pcidev[devind].pd_func,
2512                 port, value);
2513         if (OK != (s=sys_outl(PCII_CONFADD, PCII_UNSEL)))
2514                 printf("PCI: warning, sys_outl failed: %d\n", s);
2515 }
2516
2517 /*===========================================================================*
2518  *                              pcii_wreg16                                  *
2519  *===========================================================================*/
2520 static void pcii_wreg16(
2521   int busind,
2522   int devind,
2523   int port,
2524   u16_t value
2525 )
2526 {
2527         int s;
2528 #if 0
2529         printf("pcii_wreg16(%d, %d, 0x%X, 0x%X): %d.%d.%d\n",
2530                 busind, devind, port, value,
2531                 pcibus[busind].pb_bus, pcidev[devind].pd_dev,
2532                 pcidev[devind].pd_func);
2533 #endif
2534         PCII_WREG16_(pcibus[busind].pb_busnr,
2535                 pcidev[devind].pd_dev, pcidev[devind].pd_func,
2536                 port, value);
2537         if (OK != (s=sys_outl(PCII_CONFADD, PCII_UNSEL)))
2538                 printf("PCI: warning, sys_outl failed: %d\n", s);
2539 }
2540
2541 /*===========================================================================*
2542  *                              pcii_wreg32                                  *
2543  *===========================================================================*/
2544 static void pcii_wreg32(
2545   int busind,
2546   int devind,
2547   int port,
2548   u32_t value
2549 )
2550 {
2551         int s;
2552 #if 0
2553         printf("pcii_wreg32(%d, %d, 0x%X, 0x%X): %d.%d.%d\n",
2554                 busind, devind, port, value,
2555                 pcibus[busind].pb_busnr, pcidev[devind].pd_dev,
2556                 pcidev[devind].pd_func);
2557 #endif
2558         PCII_WREG32_(pcibus[busind].pb_busnr,
2559                 pcidev[devind].pd_dev, pcidev[devind].pd_func,
2560                 port, value);
2561         if (OK != (s=sys_outl(PCII_CONFADD, PCII_UNSEL)))
2562                 printf("PCI: warning, sys_outl failed: %d\n",s);
2563 }
2564
2565 /*===========================================================================*
2566  *                              pcii_rsts                                    *
2567  *===========================================================================*/
2568 static u16_t pcii_rsts(int busind)
2569 {
2570         u16_t v;
2571         int s;
2572
2573         v= PCII_RREG16_(pcibus[busind].pb_busnr, 0, 0, PCI_SR);
2574         if (OK != (s=sys_outl(PCII_CONFADD, PCII_UNSEL)))
2575                 printf("PCI: warning, sys_outl failed: %d\n", s);
2576         return v;
2577 }
2578
2579 /*===========================================================================*
2580  *                              pcii_wsts                                    *
2581  *===========================================================================*/
2582 static void pcii_wsts(int busind, u16_t value)
2583 {
2584         int s;
2585         PCII_WREG16_(pcibus[busind].pb_busnr, 0, 0, PCI_SR, value);
2586         if (OK != (s=sys_outl(PCII_CONFADD, PCII_UNSEL)))
2587                 printf("PCI: warning, sys_outl failed: %d\n", s);
2588 }
2589
2590
2591 /*===========================================================================*
2592  *                              print_capabilities                           *
2593  *===========================================================================*/
2594 static void print_capabilities(int devind)
2595 {
2596         u8_t status, capptr, type, next, subtype;
2597         char *str;
2598
2599         /* Check capabilities bit in the device status register */
2600         status= pci_attr_r16(devind, PCI_SR);
2601         if (!(status & PSR_CAPPTR))
2602                 return;
2603
2604         capptr= (pci_attr_r8_u(devind, PCI_CAPPTR) & PCI_CP_MASK);
2605         while (capptr != 0)
2606         {
2607                 type = pci_attr_r8_u(devind, capptr+CAP_TYPE);
2608                 next= (pci_attr_r8_u(devind, capptr+CAP_NEXT) & PCI_CP_MASK);
2609                 switch(type)
2610                 {
2611                 case 1: str= "PCI Power Management"; break;
2612                 case 2: str= "AGP"; break;
2613                 case 3: str= "Vital Product Data"; break;
2614                 case 4: str= "Slot Identification"; break;
2615                 case 5: str= "Message Signaled Interrupts"; break;
2616                 case 6: str= "CompactPCI Hot Swap"; break;
2617                 case 8: str= "AMD HyperTransport"; break;
2618                 case 0xf: str= "Secure Device"; break;
2619                 default: str= "(unknown type)"; break;
2620                 }
2621
2622                 printf(" @0x%x (0x%08x): capability type 0x%x: %s",
2623                         capptr, pci_attr_r32_u(devind, capptr), type, str);
2624                 if (type == 0x08)
2625                         print_hyper_cap(devind, capptr);
2626                 else if (type == 0x0f)
2627                 {
2628                         subtype= (pci_attr_r8_u(devind, capptr+2) & 0x07);
2629                         switch(subtype)
2630                         {
2631                         case 0: str= "Device Exclusion Vector"; break;
2632                         case 3: str= "IOMMU"; break;
2633                         default: str= "(unknown type)"; break;
2634                         }
2635                         printf(", sub type 0%o: %s", subtype, str);
2636                 }
2637                 printf("\n");
2638                 capptr= next;
2639         }
2640 }
2641
2642
2643 /*===========================================================================*
2644  *                              visible                                      *
2645  *===========================================================================*/
2646 static int visible(aclp, devind)
2647 struct rs_pci *aclp;
2648 int devind;
2649 {
2650         u16_t acl_sub_vid, acl_sub_did;
2651         int i;
2652         u32_t class_id;
2653
2654         if (!aclp)
2655                 return TRUE;    /* Should be changed when ACLs become
2656                                  * mandatory. Do note that procfs relies
2657                                  * on being able to see all devices.
2658                                  */
2659         /* Check whether the caller is allowed to get this device. */
2660         for (i= 0; i<aclp->rsp_nr_device; i++)
2661         {
2662                 acl_sub_vid = aclp->rsp_device[i].sub_vid;
2663                 acl_sub_did = aclp->rsp_device[i].sub_did;
2664                 if (aclp->rsp_device[i].vid == pcidev[devind].pd_vid &&
2665                         aclp->rsp_device[i].did == pcidev[devind].pd_did &&
2666                         (acl_sub_vid == NO_SUB_VID ||
2667                         acl_sub_vid == pcidev[devind].pd_sub_vid) &&
2668                         (acl_sub_did == NO_SUB_DID ||
2669                         acl_sub_did == pcidev[devind].pd_sub_did))
2670                 {
2671                         return TRUE;
2672                 }
2673         }
2674         if (!aclp->rsp_nr_class)
2675                 return FALSE;
2676
2677         class_id= (pcidev[devind].pd_baseclass << 16) |
2678                 (pcidev[devind].pd_subclass << 8) |
2679                 pcidev[devind].pd_infclass;
2680         for (i= 0; i<aclp->rsp_nr_class; i++)
2681         {
2682                 if (aclp->rsp_class[i].pciclass ==
2683                         (class_id & aclp->rsp_class[i].mask))
2684                 {
2685                         return TRUE;
2686                 }
2687         }
2688
2689         return FALSE;
2690 }
2691
2692 /*===========================================================================*
2693  *                              print_hyper_cap                              *
2694  *===========================================================================*/
2695 static void print_hyper_cap(int devind, u8_t capptr)
2696 {
2697         u32_t v;
2698         u16_t cmd;
2699         int type0, type1;
2700
2701         printf("\n");
2702         v= pci_attr_r32_u(devind, capptr);
2703         printf("print_hyper_cap: @0x%x, off 0 (cap):", capptr);
2704         cmd= (v >> 16) & 0xffff;
2705 #if 0
2706         if (v & 0x10000)
2707         {
2708                 printf(" WarmReset");
2709                 v &= ~0x10000;
2710         }
2711         if (v & 0x20000)
2712         {
2713                 printf(" DblEnded");
2714                 v &= ~0x20000;
2715         }
2716         printf(" DevNum %d", (v & 0x7C0000) >> 18);
2717         v &= ~0x7C0000;
2718 #endif
2719         type0= (cmd & 0xE000) >> 13;
2720         type1= (cmd & 0xF800) >> 11;
2721         if (type0 == 0 || type0 == 1)
2722         {
2723                 printf("Capability Type: %s\n",
2724                         type0 == 0 ? "Slave or Primary Interface" :
2725                         "Host or Secondary Interface");
2726                 cmd &= ~0xE000;
2727         }
2728         else
2729         {
2730                 printf(" Capability Type 0x%x", type1);
2731                 cmd &= ~0xF800;
2732         }
2733         if (cmd)
2734                 printf(" undecoded 0x%x\n", cmd);
2735
2736 #if 0
2737         printf("print_hyper_cap: off 4 (ctl): 0x%x\n",
2738                 pci_attr_r32_u(devind, capptr+4));
2739         printf("print_hyper_cap: off 8 (freq/rev): 0x%x\n",
2740                 pci_attr_r32_u(devind, capptr+8));
2741         printf("print_hyper_cap: off 12 (cap): 0x%x\n",
2742                 pci_attr_r32_u(devind, capptr+12));
2743         printf("print_hyper_cap: off 16 (buf count): 0x%x\n",
2744                 pci_attr_r32_u(devind, capptr+16));
2745         v= pci_attr_r32_u(devind, capptr+20);
2746         printf("print_hyper_cap: @0x%x, off 20 (bus nr): ",
2747                 capptr+20);
2748         printf("prim %d", v & 0xff);
2749         printf(", sec %d", (v >> 8) & 0xff);
2750         printf(", sub %d", (v >> 16) & 0xff);
2751         if (v >> 24)
2752                 printf(", reserved %d", (v >> 24) & 0xff);
2753         printf("\n");
2754         printf("print_hyper_cap: off 24 (type): 0x%x\n",
2755                 pci_attr_r32_u(devind, capptr+24));
2756 #endif
2757 }
2758
2759 /*
2760  * $PchId: pci.c,v 1.7 2003/08/07 09:06:51 philip Exp $
2761  */