3 #include <machine/cpu.h>
4 #include <minix/type.h>
5 #include <minix/board.h>
8 #include "kernel/kernel.h"
9 #include "kernel/proc.h"
10 #include "kernel/vm.h"
11 #include "kernel/proto.h"
12 #include "arch_proto.h"
13 #include "bsp_reset.h"
15 #include "omap_timer_registers.h"
18 #define AM335X_CM_BASE 0x44E00000
19 #define AM335X_CM_SIZE 0x1000
21 #define AM335X_PRM_DEVICE_OFFSET 0xf00
22 #define AM335X_PRM_RSTCTRL_REG 0x00
23 #define AM335X_RST_GLOBAL_WARM_SW_BIT 0
25 #define DM37XX_CM_BASE 0x48307000
26 #define DM37XX_CM_SIZE 0x1000
27 #define DM37XX_PRM_RSTCTRL_REG 0x250
28 #define DM37XX_RST_DPLL3_BIT 2
36 static struct omap_reset omap_reset
;
38 static kern_phys_map reset_phys_map
;
43 if (BOARD_IS_BBXM(machine
.board_id
)) {
44 omap_reset
.base
= DM37XX_CM_BASE
;
45 omap_reset
.size
= DM37XX_CM_SIZE
;
46 } else if (BOARD_IS_BB(machine
.board_id
)) {
47 omap_reset
.base
= AM335X_CM_BASE
;
48 omap_reset
.size
= AM335X_CM_SIZE
;
51 kern_phys_map_ptr(omap_reset
.base
, omap_reset
.size
,
52 VMMF_UNCACHED
| VMMF_WRITE
,
53 &reset_phys_map
, (vir_bytes
) & omap_reset
.base
);
59 if (BOARD_IS_BBXM(machine
.board_id
)) {
60 mmio_set((omap_reset
.base
+ DM37XX_PRM_RSTCTRL_REG
),
61 (1 << DM37XX_RST_DPLL3_BIT
));
62 } else if (BOARD_IS_BB(machine
.board_id
)) {
63 mmio_set((omap_reset
.base
+ AM335X_PRM_DEVICE_OFFSET
+
64 AM335X_PRM_RSTCTRL_REG
),
65 (1 << AM335X_RST_GLOBAL_WARM_SW_BIT
));
74 * The am335x can signal an external power management chip to cut the power
75 * by toggling the PMIC_POWER_EN pin. It might fail if there isn't an
76 * external PMIC or if the PMIC hasn't been configured to respond to toggles.
77 * The only way to pull the pin low is via ALARM2 (see TRM 20.3.3.8).
78 * At this point PM should have already signaled readclock to set the alarm.
80 if (BOARD_IS_BB(machine
.board_id
)) {
81 /* rtc was frozen to prevent premature power-off, unfreeze it
85 /* wait for the alarm to go off and PMIC to disable power to
91 void bsp_disable_watchdog(void)
93 if(BOARD_IS_BB(machine
.board_id
)) {
94 mmio_write(AM335X_WDT_BASE
+AM335X_WDT_WSPR
, 0xAAAA);
95 while(mmio_read(AM335X_WDT_BASE
+AM335X_WDT_WWPS
) != 0) ;
96 mmio_write(AM335X_WDT_BASE
+AM335X_WDT_WSPR
, 0x5555);
97 while(mmio_read(AM335X_WDT_BASE
+AM335X_WDT_WWPS
) != 0) ;