sys/arch/x86/include/i8259.h

   1 /*      $NetBSD: i8259.h,v 1.4 2003/08/07 16:30:32 agc Exp $    */
   2
   3 /*-
   4  * Copyright (c) 1990 The Regents of the University of California.
   5  * All rights reserved.
   6  *
   7  * This code is derived from software contributed to Berkeley by
   8  * William Jolitz.
   9  *
  10  * Redistribution and use in source and binary forms, with or without
  11  * modification, are permitted provided that the following conditions
  12  * are met:
  13  * 1. Redistributions of source code must retain the above copyright
  14  *    notice, this list of conditions and the following disclaimer.
  15  * 2. Redistributions in binary form must reproduce the above copyright
  16  *    notice, this list of conditions and the following disclaimer in the
  17  *    documentation and/or other materials provided with the distribution.
  18  * 3. Neither the name of the University nor the names of its contributors
  19  *    may be used to endorse or promote products derived from this software
  20  *    without specific prior written permission.
  21  *
  22  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
  23  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  25  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
  26  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  27  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  28  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  31  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  32  * SUCH DAMAGE.
  33  *
  34  *      @(#)icu.h       5.6 (Berkeley) 5/9/91
  35  */
  36
  37 #ifndef _X86_I8259_H_
  38 #define _X86_I8259_H_
  39
  40 #include <dev/isa/isareg.h>
  41
  42 #ifndef _LOCORE
  43
  44 /*
  45  * Interrupt "level" mechanism variables, masks, and macros
  46  */
  47 extern  unsigned i8259_imen;            /* interrupt mask enable */
  48 extern unsigned i8259_setmask(unsigned);
  49
  50 #define SET_ICUS()      (outb(IO_ICU1 + 1, imen), outb(IO_ICU2 + 1, imen >> 8))
  51
  52 extern void i8259_default_setup(void);
  53 extern void i8259_reinit(void);
  54
  55 #endif /* !_LOCORE */
  56
  57 /*
  58  * Interrupt enable bits -- in order of priority
  59  */
  60 #define IRQ_SLAVE       2
  61
  62 /*
  63  * Interrupt Control offset into Interrupt descriptor table (IDT)
  64  */
  65 #define ICU_OFFSET      32              /* 0-31 are processor exceptions */
  66 #define ICU_LEN         16              /* 32-47 are ISA interrupts */
  67
  68
  69 #define ICU_HARDWARE_MASK
  70
  71 /*
  72  * These macros are fairly self explanatory.  If ICU_SPECIAL_MASK_MODE is
  73  * defined, we try to take advantage of the ICU's `special mask mode' by only
  74  * EOIing the interrupts on return.  This avoids the requirement of masking and
  75  * unmasking.  We can't do this without special mask mode, because the ICU
  76  * would also hold interrupts that it thinks are of lower priority.
  77  *
  78  * Many machines do not support special mask mode, so by default we don't try
  79  * to use it.
  80  */
  81
  82 #define IRQ_BIT(num)    (1 << ((num) % 8))
  83 #define IRQ_BYTE(num)   ((num) >> 3)
  84
  85 #define i8259_late_ack(num)
  86
  87 #ifdef ICU_SPECIAL_MASK_MODE
  88
  89 #define i8259_asm_ack1(num)
  90 #define i8259_asm_ack2(num) \
  91         movb    $(0x60|IRQ_SLAVE),%al   /* specific EOI for IRQ2 */     ;\
  92         outb    %al,$IO_ICU1
  93 #define i8259_asm_mask(num)
  94 #define i8259_asm_unmask(num) \
  95         movb    $(0x60|(num%8)),%al     /* specific EOI */              ;\
  96         outb    %al,$ICUADDR
  97
  98 #else /* ICU_SPECIAL_MASK_MODE */
  99
 100 #ifndef AUTO_EOI_1
 101 #define i8259_asm_ack1(num) \
 102         movb    $(0x60|(num%8)),%al     /* specific EOI */              ;\
 103         outb    %al,$IO_ICU1
 104 #else
 105 #define i8259_asm_ack1(num)
 106 #endif
 107
 108 #ifndef AUTO_EOI_2
 109 #define i8259_asm_ack2(num) \
 110         movb    $(0x60|(num%8)),%al     /* specific EOI */              ;\
 111         outb    %al,$IO_ICU2            /* do the second ICU first */   ;\
 112         movb    $(0x60|IRQ_SLAVE),%al   /* specific EOI for IRQ2 */     ;\
 113         outb    %al,$IO_ICU1
 114 #else
 115 #define i8259_asm_ack2(num)
 116 #endif
 117
 118 #ifdef PIC_MASKDELAY
 119 #define MASKDELAY       pushl %eax ; inb $0x84,%al ; popl %eax
 120 #else
 121 #define MASKDELAY
 122 #endif
 123
 124 #ifdef ICU_HARDWARE_MASK
 125
 126 #define i8259_asm_mask(num) \
 127         movb    CVAROFF(i8259_imen, IRQ_BYTE(num)),%al                  ;\
 128         orb     $IRQ_BIT(num),%al                                       ;\
 129         movb    %al,CVAROFF(i8259_imen, IRQ_BYTE(num))                  ;\
 130         MASKDELAY                                                       ;\
 131         outb    %al,$(ICUADDR+1)
 132 #define i8259_asm_unmask(num) \
 133         movb    CVAROFF(i8259_imen, IRQ_BYTE(num)),%al                  ;\
 134         andb    $~IRQ_BIT(num),%al                                      ;\
 135         movb    %al,CVAROFF(i8259_imen, IRQ_BYTE(num))                  ;\
 136         MASKDELAY                                                       ;\
 137         outb    %al,$(ICUADDR+1)
 138
 139 #else /* ICU_HARDWARE_MASK */
 140
 141 #define i8259_asm_mask(num)
 142 #define i8259_asm_unmask(num)
 143
 144 #endif /* ICU_HARDWARE_MASK */
 145 #endif /* ICU_SPECIAL_MASK_MODE */
 146
 147 #endif /* !_X86_I8259_H_ */