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Uninitialized vector entry?
[minix3.git] / drivers / at_wini / at_wini.c
blobe1c0a121aee29fcdefbf1d27ae4648f6e4561276
1 /* This file contains the device dependent part of a driver for the IBM-AT
2 * winchester controller. Written by Adri Koppes.
3 *
4 * The file contains one entry point:
5 *
6 * at_winchester_task: main entry when system is brought up
7 *
8 * Changes:
9 * Aug 19, 2005 ATA PCI support, supports SATA (Ben Gras)
10 * Nov 18, 2004 moved AT disk driver to user-space (Jorrit N. Herder)
11 * Aug 20, 2004 watchdogs replaced by sync alarms (Jorrit N. Herder)
12 * Mar 23, 2000 added ATAPI CDROM support (Michael Temari)
13 * May 14, 2000 d-d/i rewrite (Kees J. Bot)
14 * Apr 13, 1992 device dependent/independent split (Kees J. Bot)
15 */
16
17 #include "at_wini.h"
18
19 #include <minix/sysutil.h>
20 #include <minix/keymap.h>
21 #include <sys/ioc_disk.h>
22 #include <ibm/pci.h>
23
24 #define ATAPI_DEBUG 0 /* To debug ATAPI code. */
25
26 /* I/O Ports used by winchester disk controllers. */
27
28 /* Read and write registers */
29 #define REG_CMD_BASE0 0x1F0 /* command base register of controller 0 */
30 #define REG_CMD_BASE1 0x170 /* command base register of controller 1 */
31 #define REG_CTL_BASE0 0x3F6 /* control base register of controller 0 */
32 #define REG_CTL_BASE1 0x376 /* control base register of controller 1 */
33
34 #define PCI_CTL_OFF 2 /* Offset of control registers from BAR2 */
35 #define PCI_DMA_2ND_OFF 8 /* Offset of DMA registers from BAR4 for
36 * secondary channel
37 */
38
39 #define REG_DATA 0 /* data register (offset from the base reg.) */
40 #define REG_PRECOMP 1 /* start of write precompensation */
41 #define REG_COUNT 2 /* sectors to transfer */
42 #define REG_SECTOR 3 /* sector number */
43 #define REG_CYL_LO 4 /* low byte of cylinder number */
44 #define REG_CYL_HI 5 /* high byte of cylinder number */
45 #define REG_LDH 6 /* lba, drive and head */
46 #define LDH_DEFAULT 0xA0 /* ECC enable, 512 bytes per sector */
47 #define LDH_LBA 0x40 /* Use LBA addressing */
48 #define LDH_DEV 0x10 /* Drive 1 iff set */
49 #define ldh_init(drive) (LDH_DEFAULT | ((drive) << 4))
50
51 /* Read only registers */
52 #define REG_STATUS 7 /* status */
53 #define STATUS_BSY 0x80 /* controller busy */
54 #define STATUS_RDY 0x40 /* drive ready */
55 #define STATUS_WF 0x20 /* write fault */
56 #define STATUS_SC 0x10 /* seek complete (obsolete) */
57 #define STATUS_DRQ 0x08 /* data transfer request */
58 #define STATUS_CRD 0x04 /* corrected data */
59 #define STATUS_IDX 0x02 /* index pulse */
60 #define STATUS_ERR 0x01 /* error */
61 #define STATUS_ADMBSY 0x100 /* administratively busy (software) */
62 #define REG_ERROR 1 /* error code */
63 #define ERROR_BB 0x80 /* bad block */
64 #define ERROR_ECC 0x40 /* bad ecc bytes */
65 #define ERROR_ID 0x10 /* id not found */
66 #define ERROR_AC 0x04 /* aborted command */
67 #define ERROR_TK 0x02 /* track zero error */
68 #define ERROR_DM 0x01 /* no data address mark */
69
70 /* Write only registers */
71 #define REG_COMMAND 7 /* command */
72 #define CMD_IDLE 0x00 /* for w_command: drive idle */
73 #define CMD_RECALIBRATE 0x10 /* recalibrate drive */
74 #define CMD_READ 0x20 /* read data */
75 #define CMD_READ_EXT 0x24 /* read data (LBA48 addressed) */
76 #define CMD_READ_DMA_EXT 0x25 /* read data using DMA (w/ LBA48) */
77 #define CMD_WRITE 0x30 /* write data */
78 #define CMD_WRITE_EXT 0x34 /* write data (LBA48 addressed) */
79 #define CMD_WRITE_DMA_EXT 0x35 /* write data using DMA (w/ LBA48) */
80 #define CMD_READVERIFY 0x40 /* read verify */
81 #define CMD_FORMAT 0x50 /* format track */
82 #define CMD_SEEK 0x70 /* seek cylinder */
83 #define CMD_DIAG 0x90 /* execute device diagnostics */
84 #define CMD_SPECIFY 0x91 /* specify parameters */
85 #define CMD_READ_DMA 0xC8 /* read data using DMA */
86 #define CMD_WRITE_DMA 0xCA /* write data using DMA */
87 #define ATA_IDENTIFY 0xEC /* identify drive */
88 /* #define REG_CTL 0x206 */ /* control register */
89 #define REG_CTL 0 /* control register */
90 #define CTL_NORETRY 0x80 /* disable access retry */
91 #define CTL_NOECC 0x40 /* disable ecc retry */
92 #define CTL_EIGHTHEADS 0x08 /* more than eight heads */
93 #define CTL_RESET 0x04 /* reset controller */
94 #define CTL_INTDISABLE 0x02 /* disable interrupts */
95 #define REG_CTL_ALTSTAT 0 /* alternate status register */
96
97 /* Identify words */
98 #define ID_GENERAL 0x00 /* General configuration information */
99 #define ID_GEN_NOT_ATA 0x8000 /* Not an ATA device */
100 #define ID_CAPABILITIES 0x31 /* Capabilities (49)*/
101 #define ID_CAP_LBA 0x0200 /* LBA supported */
102 #define ID_CAP_DMA 0x0100 /* DMA supported */
103 #define ID_FIELD_VALIDITY 0x35 /* Field Validity (53) */
104 #define ID_FV_88 0x04 /* Word 88 is valid (UDMA) */
105 #define ID_MULTIWORD_DMA 0x3f /* Multiword DMA (63) */
106 #define ID_MWDMA_2_SEL 0x0400 /* Mode 2 is selected */
107 #define ID_MWDMA_1_SEL 0x0200 /* Mode 1 is selected */
108 #define ID_MWDMA_0_SEL 0x0100 /* Mode 0 is selected */
109 #define ID_MWDMA_2_SUP 0x0004 /* Mode 2 is supported */
110 #define ID_MWDMA_1_SUP 0x0002 /* Mode 1 is supported */
111 #define ID_MWDMA_0_SUP 0x0001 /* Mode 0 is supported */
112 #define ID_CSS 0x53 /* Command Sets Supported (83) */
113 #define ID_CSS_LBA48 0x0400
114 #define ID_ULTRA_DMA 0x58 /* Ultra DMA (88) */
115 #define ID_UDMA_5_SEL 0x2000 /* Mode 5 is selected */
116 #define ID_UDMA_4_SEL 0x1000 /* Mode 4 is selected */
117 #define ID_UDMA_3_SEL 0x0800 /* Mode 3 is selected */
118 #define ID_UDMA_2_SEL 0x0400 /* Mode 2 is selected */
119 #define ID_UDMA_1_SEL 0x0200 /* Mode 1 is selected */
120 #define ID_UDMA_0_SEL 0x0100 /* Mode 0 is selected */
121 #define ID_UDMA_5_SUP 0x0020 /* Mode 5 is supported */
122 #define ID_UDMA_4_SUP 0x0010 /* Mode 4 is supported */
123 #define ID_UDMA_3_SUP 0x0008 /* Mode 3 is supported */
124 #define ID_UDMA_2_SUP 0x0004 /* Mode 2 is supported */
125 #define ID_UDMA_1_SUP 0x0002 /* Mode 1 is supported */
126 #define ID_UDMA_0_SUP 0x0001 /* Mode 0 is supported */
127
128 /* DMA registers */
129 #define DMA_COMMAND 0 /* Command register */
130 #define DMA_CMD_WRITE 0x08 /* PCI bus master writes */
131 #define DMA_CMD_START 0x01 /* Start Bus Master */
132 #define DMA_STATUS 2 /* Status register */
133 #define DMA_ST_D1_DMACAP 0x40 /* Drive 1 is DMA capable */
134 #define DMA_ST_D0_DMACAP 0x20 /* Drive 0 is DMA capable */
135 #define DMA_ST_INT 0x04 /* Interrupt */
136 #define DMA_ST_ERROR 0x02 /* Error */
137 #define DMA_ST_BM_ACTIVE 0x01 /* Bus Master IDE Active */
138 #define DMA_PRDTP 4 /* PRD Table Pointer */
139
140 /* Check for the presence of LBA48 only on drives that are 'big'. */
141 #define LBA48_CHECK_SIZE 0x0f000000
142 #define LBA_MAX_SIZE 0x0fffffff /* Highest sector size for
143 * regular LBA.
144 */
145
146 #if ENABLE_ATAPI
147 #define ERROR_SENSE 0xF0 /* sense key mask */
148 #define SENSE_NONE 0x00 /* no sense key */
149 #define SENSE_RECERR 0x10 /* recovered error */
150 #define SENSE_NOTRDY 0x20 /* not ready */
151 #define SENSE_MEDERR 0x30 /* medium error */
152 #define SENSE_HRDERR 0x40 /* hardware error */
153 #define SENSE_ILRQST 0x50 /* illegal request */
154 #define SENSE_UATTN 0x60 /* unit attention */
155 #define SENSE_DPROT 0x70 /* data protect */
156 #define SENSE_ABRT 0xb0 /* aborted command */
157 #define SENSE_MISCOM 0xe0 /* miscompare */
158 #define ERROR_MCR 0x08 /* media change requested */
159 #define ERROR_ABRT 0x04 /* aborted command */
160 #define ERROR_EOM 0x02 /* end of media detected */
161 #define ERROR_ILI 0x01 /* illegal length indication */
162 #define REG_FEAT 1 /* features */
163 #define FEAT_OVERLAP 0x02 /* overlap */
164 #define FEAT_DMA 0x01 /* dma */
165 #define REG_IRR 2 /* interrupt reason register */
166 #define IRR_REL 0x04 /* release */
167 #define IRR_IO 0x02 /* direction for xfer */
168 #define IRR_COD 0x01 /* command or data */
169 #define REG_SAMTAG 3
170 #define REG_CNT_LO 4 /* low byte of cylinder number */
171 #define REG_CNT_HI 5 /* high byte of cylinder number */
172 #define REG_DRIVE 6 /* drive select */
173 #endif
174
175 #define REG_STATUS 7 /* status */
176 #define STATUS_BSY 0x80 /* controller busy */
177 #define STATUS_DRDY 0x40 /* drive ready */
178 #define STATUS_DMADF 0x20 /* dma ready/drive fault */
179 #define STATUS_SRVCDSC 0x10 /* service or dsc */
180 #define STATUS_DRQ 0x08 /* data transfer request */
181 #define STATUS_CORR 0x04 /* correctable error occurred */
182 #define STATUS_CHECK 0x01 /* check error */
183
184 #ifdef ENABLE_ATAPI
185 #define ATAPI_PACKETCMD 0xA0 /* packet command */
186 #define ATAPI_IDENTIFY 0xA1 /* identify drive */
187 #define SCSI_READ10 0x28 /* read from disk */
188 #define SCSI_SENSE 0x03 /* sense request */
189
190 #define CD_SECTOR_SIZE 2048 /* sector size of a CD-ROM */
191 #endif /* ATAPI */
192
193 /* Interrupt request lines. */
194 #define NO_IRQ 0 /* no IRQ set yet */
195
196 #define ATAPI_PACKETSIZE 12
197 #define SENSE_PACKETSIZE 18
198
199 /* Common command block */
200 struct command {
201 u8_t precomp; /* REG_PRECOMP, etc. */
202 u8_t count;
203 u8_t sector;
204 u8_t cyl_lo;
205 u8_t cyl_hi;
206 u8_t ldh;
207 u8_t command;
208
209 /* The following at for LBA48 */
210 u8_t count_prev;
211 u8_t sector_prev;
212 u8_t cyl_lo_prev;
213 u8_t cyl_hi_prev;
214 };
215
216 /* Error codes */
217 #define ERR (-1) /* general error */
218 #define ERR_BAD_SECTOR (-2) /* block marked bad detected */
219
220 /* Some controllers don't interrupt, the clock will wake us up. */
221 #define WAKEUP_SECS 32 /* drive may be out for 31 seconds max */
222 #define WAKEUP_TICKS (WAKEUP_SECS*HZ)
223
224 /* Miscellaneous. */
225 #define MAX_DRIVES 8
226 #define COMPAT_DRIVES 4
227 #if _WORD_SIZE > 2
228 #define MAX_SECS 256 /* controller can transfer this many sectors */
229 #else
230 #define MAX_SECS 127 /* but not to a 16 bit process */
231 #endif
232 #define MAX_ERRORS 4 /* how often to try rd/wt before quitting */
233 #define NR_MINORS (MAX_DRIVES * DEV_PER_DRIVE)
234 #define SUB_PER_DRIVE (NR_PARTITIONS * NR_PARTITIONS)
235 #define NR_SUBDEVS (MAX_DRIVES * SUB_PER_DRIVE)
236 #define DELAY_USECS 1000 /* controller timeout in microseconds */
237 #define DELAY_TICKS 1 /* controller timeout in ticks */
238 #define DEF_TIMEOUT_TICKS 300 /* controller timeout in ticks */
239 #define RECOVERY_USECS 500000 /* controller recovery time in microseconds */
240 #define RECOVERY_TICKS 30 /* controller recovery time in ticks */
241 #define INITIALIZED 0x01 /* drive is initialized */
242 #define DEAF 0x02 /* controller must be reset */
243 #define SMART 0x04 /* drive supports ATA commands */
244 #if ENABLE_ATAPI
245 #define ATAPI 0x08 /* it is an ATAPI device */
246 #else
247 #define ATAPI 0 /* don't bother with ATAPI; optimise out */
248 #endif
249 #define IDENTIFIED 0x10 /* w_identify done successfully */
250 #define IGNORING 0x20 /* w_identify failed once */
251
252 /* Timeouts and max retries. */
253 int timeout_ticks = DEF_TIMEOUT_TICKS, max_errors = MAX_ERRORS;
254 long w_standard_timeouts = 0, w_pci_debug = 0, w_instance = 0,
255 disable_dma = 0, atapi_debug = 0, w_identify_wakeup_ticks = WAKEUP_TICKS,
256 wakeup_ticks = WAKEUP_TICKS;
257
258 int w_testing = 0, w_silent = 0;
259
260 int w_next_drive = 0;
261
262 /* Variables. */
263
264 /* The struct wini is indexed by controller first, then drive (0-3).
265 * Controller 0 is always the 'compatability' ide controller, at
266 * the fixed locations, whether present or not.
267 */
268 PRIVATE struct wini { /* main drive struct, one entry per drive */
269 unsigned state; /* drive state: deaf, initialized, dead */
270 unsigned short w_status; /* device status register */
271 unsigned base_cmd; /* command base register */
272 unsigned base_ctl; /* control base register */
273 unsigned base_dma; /* dma base register */
274 unsigned irq; /* interrupt request line */
275 unsigned irq_mask; /* 1 << irq */
276 unsigned irq_need_ack; /* irq needs to be acknowledged */
277 int irq_hook_id; /* id of irq hook at the kernel */
278 int lba48; /* supports lba48 */
279 int dma; /* supports dma */
280 unsigned lcylinders; /* logical number of cylinders (BIOS) */
281 unsigned lheads; /* logical number of heads */
282 unsigned lsectors; /* logical number of sectors per track */
283 unsigned pcylinders; /* physical number of cylinders (translated) */
284 unsigned pheads; /* physical number of heads */
285 unsigned psectors; /* physical number of sectors per track */
286 unsigned ldhpref; /* top four bytes of the LDH (head) register */
287 unsigned precomp; /* write precompensation cylinder / 4 */
288 unsigned max_count; /* max request for this drive */
289 unsigned open_ct; /* in-use count */
290 struct device part[DEV_PER_DRIVE]; /* disks and partitions */
291 struct device subpart[SUB_PER_DRIVE]; /* subpartitions */
292 } wini[MAX_DRIVES], *w_wn;
293
294 PRIVATE int w_device = -1;
295 PRIVATE int w_controller = -1;
296 PRIVATE int w_major = -1;
297 PRIVATE char w_id_string[40];
298
299 PRIVATE int win_tasknr; /* my task number */
300 PRIVATE int w_command; /* current command in execution */
301 PRIVATE u8_t w_byteval; /* used for SYS_IRQCTL */
302 PRIVATE int w_drive; /* selected drive */
303 PRIVATE int w_controller; /* selected controller */
304 PRIVATE struct device *w_dv; /* device's base and size */
305
306 /* Unfortunately, DMA_SECTORS and DMA_BUF_SIZE are already defined libdriver
307 * for 'tmp_buf'.
308 */
309 #define ATA_DMA_SECTORS 64
310 #define ATA_DMA_BUF_SIZE (ATA_DMA_SECTORS*SECTOR_SIZE)
311
312 PRIVATE char dma_buf[ATA_DMA_BUF_SIZE];
313 PRIVATE phys_bytes dma_buf_phys;
314
315 #define N_PRDTE 1024 /* Should be enough for large requests */
316
317 PRIVATE struct prdte
318 {
319 u32_t prdte_base;
320 u16_t prdte_count;
321 u8_t prdte_reserved;
322 u8_t prdte_flags;
323 } prdt[N_PRDTE];
324 PRIVATE phys_bytes prdt_phys;
325
326 #define PRDTE_FL_EOT 0x80 /* End of table */
327
328 /* Some IDE devices announce themselves as RAID controllers */
329 PRIVATE struct
330 {
331 u16_t vendor;
332 u16_t device;
333 } raid_table[]=
334 {
335 { 0x1106, 0x3149 }, /* VIA VT6420 */
336 { 0, 0 } /* end of list */
337 };
338
339 FORWARD _PROTOTYPE( void init_params, (void) );
340 FORWARD _PROTOTYPE( void init_drive, (struct wini *w, int base_cmd,
341 int base_ctl, int base_dma, int irq, int ack, int hook,
342 int drive) );
343 FORWARD _PROTOTYPE( void init_params_pci, (int) );
344 FORWARD _PROTOTYPE( int w_do_open, (struct driver *dp, message *m_ptr) );
345 FORWARD _PROTOTYPE( struct device *w_prepare, (int dev) );
346 FORWARD _PROTOTYPE( int w_identify, (void) );
347 FORWARD _PROTOTYPE( char *w_name, (void) );
348 FORWARD _PROTOTYPE( int w_specify, (void) );
349 FORWARD _PROTOTYPE( int w_io_test, (void) );
350 FORWARD _PROTOTYPE( int w_transfer, (int proc_nr, int opcode, u64_t position,
351 iovec_t *iov, unsigned nr_req, int safe));
352 FORWARD _PROTOTYPE( int com_out, (struct command *cmd) );
353 FORWARD _PROTOTYPE( int com_out_ext, (struct command *cmd) );
354 FORWARD _PROTOTYPE( void setup_dma, (unsigned *sizep, int proc_nr,
355 iovec_t *iov, int do_write, int *do_copyoutp, int safe) );
356 FORWARD _PROTOTYPE( void w_need_reset, (void) );
357 FORWARD _PROTOTYPE( void ack_irqs, (unsigned int) );
358 FORWARD _PROTOTYPE( int w_do_close, (struct driver *dp, message *m_ptr) );
359 FORWARD _PROTOTYPE( int w_other, (struct driver *dp, message *m_ptr, int));
360 FORWARD _PROTOTYPE( int w_hw_int, (struct driver *dp, message *m_ptr) );
361 FORWARD _PROTOTYPE( int com_simple, (struct command *cmd) );
362 FORWARD _PROTOTYPE( void w_timeout, (void) );
363 FORWARD _PROTOTYPE( int w_reset, (void) );
364 FORWARD _PROTOTYPE( void w_intr_wait, (void) );
365 FORWARD _PROTOTYPE( int at_intr_wait, (void) );
366 FORWARD _PROTOTYPE( int w_waitfor, (int mask, int value) );
367 FORWARD _PROTOTYPE( int w_waitfor_dma, (int mask, int value) );
368 FORWARD _PROTOTYPE( void w_geometry, (struct partition *entry) );
369 #if ENABLE_ATAPI
370 FORWARD _PROTOTYPE( int atapi_sendpacket, (u8_t *packet, unsigned cnt) );
371 FORWARD _PROTOTYPE( int atapi_intr_wait, (void) );
372 FORWARD _PROTOTYPE( int atapi_open, (void) );
373 FORWARD _PROTOTYPE( void atapi_close, (void) );
374 FORWARD _PROTOTYPE( int atapi_transfer, (int proc_nr, int opcode,
375 u64_t position, iovec_t *iov, unsigned nr_req, int safe));
376 #endif
377
378 #define panic(f,m,n) at_panic(__LINE__, (f), (m), (n))
379 FORWARD _PROTOTYPE( void at_panic, (int line, char *h, char *msg, int n));
380
381 #define sys_voutb(out, n) at_voutb(__LINE__, (out), (n))
382 FORWARD _PROTOTYPE( int at_voutb, (int line, pvb_pair_t *, int n));
383 #define sys_vinb(in, n) at_vinb(__LINE__, (in), (n))
384 FORWARD _PROTOTYPE( int at_vinb, (int line, pvb_pair_t *, int n));
385
386 #undef sys_outb
387 #undef sys_inb
388 #undef sys_outw
389 #undef sys_inw
390 #undef sys_outl
391 #undef sys_inl
392
393 FORWARD _PROTOTYPE( int at_out, (int line, u32_t port, u32_t value,
394 char *typename, int type));
395 FORWARD _PROTOTYPE( int at_in, (int line, u32_t port, u32_t *value,
396 char *typename, int type));
397
398 #define sys_outb(p, v) at_out(__LINE__, (p), (v), "outb", _DIO_BYTE)
399 #define sys_inb(p, v) at_in(__LINE__, (p), (v), "inb", _DIO_BYTE)
400 #define sys_outw(p, v) at_out(__LINE__, (p), (v), "outw", _DIO_WORD)
401 #define sys_inw(p, v) at_in(__LINE__, (p), (v), "inw", _DIO_WORD)
402 #define sys_outl(p, v) at_out(__LINE__, (p), (v), "outl", _DIO_LONG)
403 #define sys_inl(p, v) at_in(__LINE__, (p), (v), "inl", _DIO_LONG)
404
405 /* Entry points to this driver. */
406 PRIVATE struct driver w_dtab = {
407 w_name, /* current device's name */
408 w_do_open, /* open or mount request, initialize device */
409 w_do_close, /* release device */
410 do_diocntl, /* get or set a partition's geometry */
411 w_prepare, /* prepare for I/O on a given minor device */
412 w_transfer, /* do the I/O */
413 nop_cleanup, /* nothing to clean up */
414 w_geometry, /* tell the geometry of the disk */
415 nop_signal, /* no cleanup needed on shutdown */
416 nop_alarm, /* ignore leftover alarms */
417 nop_cancel, /* ignore CANCELs */
418 nop_select, /* ignore selects */
419 w_other, /* catch-all for unrecognized commands and ioctls */
420 w_hw_int /* leftover hardware interrupts */
421 };
422
423 /*===========================================================================*
424 * at_winchester_task *
425 *===========================================================================*/
426 PUBLIC int main(int argc, char *argv[])
427 {
428 /* Install signal handlers. Ask PM to transform signal into message. */
429 struct sigaction sa;
430
431 sa.sa_handler = SIG_MESS;
432 sigemptyset(&sa.sa_mask);
433 sa.sa_flags = 0;
434 if (sigaction(SIGTERM,&sa,NULL)<0) panic("AT","sigaction failed", errno);
435
436 /* Set special disk parameters then call the generic main loop. */
437 env_setargs(argc, argv);
438 init_params();
439 signal(SIGTERM, SIG_IGN);
440 driver_task(&w_dtab);
441 return(OK);
442 }
443
444 /*===========================================================================*
445 * init_params *
446 *===========================================================================*/
447 PRIVATE void init_params()
448 {
449 /* This routine is called at startup to initialize the drive parameters. */
450
451 u16_t parv[2];
452 unsigned int vector, size;
453 int drive, nr_drives;
454 struct wini *wn;
455 u8_t params[16];
456 int s;
457 long wakeup_secs = WAKEUP_SECS;
458
459 /* Boot variables. */
460 env_parse("ata_std_timeout", "d", 0, &w_standard_timeouts, 0, 1);
461 env_parse("ata_pci_debug", "d", 0, &w_pci_debug, 0, 1);
462 env_parse("ata_instance", "d", 0, &w_instance, 0, 8);
463 env_parse("ata_no_dma", "d", 0, &disable_dma, 0, 1);
464 env_parse("ata_id_timeout", "d", WAKEUP_SECS, &wakeup_secs, 1, 60);
465 env_parse("atapi_debug", "d", 0, &atapi_debug, 0, 1);
466
467 w_identify_wakeup_ticks = wakeup_secs * HZ;
468
469 if(atapi_debug)
470 panic("at_wini", "atapi_debug", NO_NUM);
471
472 if(w_identify_wakeup_ticks <= 0) {
473 printf("changing wakeup from %d to %d ticks.\n",
474 w_identify_wakeup_ticks, WAKEUP_TICKS);
475 w_identify_wakeup_ticks = WAKEUP_TICKS;
476 }
477
478 if (disable_dma)
479 printf("DMA for ATA devices is disabled.\n");
480
481 s= sys_umap(SELF, D, (vir_bytes)dma_buf, sizeof(dma_buf), &dma_buf_phys);
482 if (s != 0)
483 panic("at_wini", "can't map dma buffer", s);
484
485 s= sys_umap(SELF, D, (vir_bytes)prdt, sizeof(prdt), &prdt_phys);
486 if (s != 0)
487 panic("at_wini", "can't map prd table", s);
488
489 if (w_instance == 0) {
490 /* Get the number of drives from the BIOS data area */
491 s=sys_readbios(NR_HD_DRIVES_ADDR, params, NR_HD_DRIVES_SIZE);
492 if (s != OK)
493 panic(w_name(), "Couldn't read BIOS", s);
494 if ((nr_drives = params[0]) > 2) nr_drives = 2;
495
496 for (drive = 0, wn = wini; drive < COMPAT_DRIVES; drive++, wn++) {
497 if (drive < nr_drives) {
498 /* Copy the BIOS parameter vector */
499 vector = (drive == 0) ? BIOS_HD0_PARAMS_ADDR :
500 BIOS_HD1_PARAMS_ADDR;
501 size = (drive == 0) ? BIOS_HD0_PARAMS_SIZE :
502 BIOS_HD1_PARAMS_SIZE;
503 s=sys_readbios(vector, parv, size);
504 if (s != OK)
505 panic(w_name(), "Couldn't read BIOS", s);
506
507 /* Calculate the address of the parameters and copy them */
508 s=sys_readbios(hclick_to_physb(parv[1]) + parv[0],
509 params, 16L);
510 if (s != OK)
511 panic(w_name(),"Couldn't copy parameters", s);
512
513 /* Copy the parameters to the structures of the drive */
514 wn->lcylinders = bp_cylinders(params);
515 wn->lheads = bp_heads(params);
516 wn->lsectors = bp_sectors(params);
517 wn->precomp = bp_precomp(params) >> 2;
518 }
519
520 /* Fill in non-BIOS parameters. */
521 init_drive(wn,
522 drive < 2 ? REG_CMD_BASE0 : REG_CMD_BASE1,
523 drive < 2 ? REG_CTL_BASE0 : REG_CTL_BASE1,
524 0 /* no DMA */, NO_IRQ, 0, 0, drive);
525 w_next_drive++;
526 }
527 }
528
529 /* Look for controllers on the pci bus. Skip none the first instance,
530 * skip one and then 2 for every instance, for every next instance.
531 */
532 if (w_instance == 0)
533 init_params_pci(0);
534 else
535 init_params_pci(w_instance*2-1);
536
537 }
538
539 #define ATA_IF_NOTCOMPAT1 (1L << 0)
540 #define ATA_IF_NOTCOMPAT2 (1L << 2)
541
542 /*===========================================================================*
543 * init_drive *
544 *===========================================================================*/
545 PRIVATE void init_drive(struct wini *w, int base_cmd, int base_ctl,
546 int base_dma, int irq, int ack, int hook, int drive)
547 {
548 w->state = 0;
549 w->w_status = 0;
550 w->base_cmd = base_cmd;
551 w->base_ctl = base_ctl;
552 w->base_dma = base_dma;
553 if(w_pci_debug)
554 printf("at_wini%d: drive %d: base_cmd 0x%x, base_ctl 0x%x, base_dma 0x%x\n",
555 w_instance, w-wini, w->base_cmd, w->base_ctl, w->base_dma);
556 w->irq = irq;
557 w->irq_mask = 1 << irq;
558 w->irq_need_ack = ack;
559 w->irq_hook_id = hook;
560 w->ldhpref = ldh_init(drive);
561 w->max_count = MAX_SECS << SECTOR_SHIFT;
562 w->lba48 = 0;
563 w->dma = 0;
564 }
565
566 /*===========================================================================*
567 * init_params_pci *
568 *===========================================================================*/
569 PRIVATE void init_params_pci(int skip)
570 {
571 int i, r, devind, drive, pci_compat = 0;
572 int irq, irq_hook, raid;
573 u8_t bcr, scr, interface;
574 u16_t vid, did;
575 u32_t base_dma, t3;
576
577 pci_init();
578 for(drive = w_next_drive; drive < MAX_DRIVES; drive++)
579 wini[drive].state = IGNORING;
580 for(r = pci_first_dev(&devind, &vid, &did); r != 0;
581 r = pci_next_dev(&devind, &vid, &did)) {
582
583 raid= 0;
584
585 /* Except class 01h (mass storage), subclass be 01h (ATA).
586 * Also check listed RAID controllers.
587 */
588 bcr= pci_attr_r8(devind, PCI_BCR);
589 scr= pci_attr_r8(devind, PCI_SCR);
590 interface= pci_attr_r8(devind, PCI_PIFR);
591 t3= ((bcr << 16) | (scr << 8) | interface);
592 if (bcr == PCI_BCR_MASS_STORAGE && scr == PCI_MS_IDE)
593 ; /* Okay */
594 else if (t3 == PCI_T3_RAID)
595 {
596 for (i= 0; raid_table[i].vendor != 0; i++)
597 {
598 if (raid_table[i].vendor == vid &&
599 raid_table[i].device == did)
600 {
601 break;
602 }
603 }
604 if (raid_table[i].vendor == 0)
605 {
606 printf(
607 "atapci skipping unsupported RAID controller 0x%04x / 0x%04x\n",
608 vid, did);
609 continue;
610 }
611 printf("found supported RAID controller\n");
612 raid= 1;
613 }
614 else
615 continue; /* Unsupported device class */
616
617 /* Found a controller.
618 * Programming interface register tells us more.
619 */
620 irq = pci_attr_r8(devind, PCI_ILR);
621
622 /* Any non-compat drives? */
623 if (raid || (interface & (ATA_IF_NOTCOMPAT1 | ATA_IF_NOTCOMPAT2))) {
624 int s;
625
626 if (w_next_drive >= MAX_DRIVES)
627 {
628 /* We can't accept more drives, but have to search for
629 * controllers operating in compatibility mode.
630 */
631 continue;
632 }
633
634 irq_hook = irq;
635 if (skip > 0) {
636 if (w_pci_debug)
637 {
638 printf(
639 "atapci skipping controller (remain %d)\n",
640 skip);
641 }
642 skip--;
643 continue;
644 }
645 if(pci_reserve_ok(devind) != OK) {
646 printf("at_wini%d: pci_reserve %d failed - "
647 "ignoring controller!\n",
648 w_instance, devind);
649 continue;
650 }
651 if ((s=sys_irqsetpolicy(irq, 0, &irq_hook)) != OK) {
652 printf("atapci: couldn't set IRQ policy %d\n", irq);
653 continue;
654 }
655 if ((s=sys_irqenable(&irq_hook)) != OK) {
656 printf("atapci: couldn't enable IRQ line %d\n", irq);
657 continue;
658 }
659 } else if(w_pci_debug) printf("at_wini%d: dev %d: only compat drives\n", w_instance, devind);
660
661 base_dma = pci_attr_r32(devind, PCI_BAR_5) & 0xfffffffc;
662
663 printf("at_wini%d: dev %d: base_dma = %x\n",
664 w_instance, devind, base_dma);
665
666 /* Primary channel not in compatability mode? */
667 if (raid || (interface & ATA_IF_NOTCOMPAT1)) {
668 u32_t base_cmd, base_ctl;
669
670 base_cmd = pci_attr_r32(devind, PCI_BAR) & 0xfffffffc;
671 base_ctl = pci_attr_r32(devind, PCI_BAR_2) & 0xfffffffc;
672 if (base_cmd != REG_CMD_BASE0 && base_cmd != REG_CMD_BASE1) {
673 init_drive(&wini[w_next_drive],
674 base_cmd, base_ctl+PCI_CTL_OFF,
675 base_dma, irq, 1, irq_hook, 0);
676 init_drive(&wini[w_next_drive+1],
677 base_cmd, base_ctl+PCI_CTL_OFF,
678 base_dma, irq, 1, irq_hook, 1);
679 if (w_pci_debug)
680 printf("at_wini%d: atapci %d: 0x%x 0x%x irq %d\n", w_instance, devind, base_cmd, base_ctl, irq);
681 w_next_drive += 2;
682 } else printf("at_wini%d: atapci: ignored drives on primary channel, base %x\n", w_instance, base_cmd);
683 }
684 else
685 {
686 /* Update base_dma for compatibility device */
687 for (i= 0; i<MAX_DRIVES; i++)
688 {
689 if (wini[i].base_cmd == REG_CMD_BASE0) {
690 wini[i].base_dma= base_dma;
691 if(w_pci_debug)
692 printf("at_wini%d: drive %d: base_dma 0x%x\n",
693 w_instance, i, wini[i].base_dma);
694 pci_compat = 1;
695 }
696 }
697 }
698
699 /* Secondary channel not in compatability mode? */
700 if (raid || (interface & ATA_IF_NOTCOMPAT2)) {
701 u32_t base_cmd, base_ctl;
702
703 base_cmd = pci_attr_r32(devind, PCI_BAR_3) & 0xfffffffc;
704 base_ctl = pci_attr_r32(devind, PCI_BAR_4) & 0xfffffffc;
705 if (base_dma != 0)
706 base_dma += PCI_DMA_2ND_OFF;
707 if (base_cmd != REG_CMD_BASE0 && base_cmd != REG_CMD_BASE1) {
708 init_drive(&wini[w_next_drive],
709 base_cmd, base_ctl+PCI_CTL_OFF, base_dma,
710 irq, 1, irq_hook, 2);
711 init_drive(&wini[w_next_drive+1],
712 base_cmd, base_ctl+PCI_CTL_OFF, base_dma,
713 irq, 1, irq_hook, 3);
714 if (w_pci_debug)
715 printf("at_wini%d: atapci %d: 0x%x 0x%x irq %d\n",
716 w_instance, devind, base_cmd, base_ctl, irq);
717 w_next_drive += 2;
718 } else printf("at_wini%d: atapci: ignored drives on "
719 "secondary channel, base %x\n", w_instance, base_cmd);
720 }
721 else
722 {
723 /* Update base_dma for compatibility device */
724 for (i= 0; i<MAX_DRIVES; i++)
725 {
726 if (wini[i].base_cmd == REG_CMD_BASE1 && base_dma != 0) {
727 wini[i].base_dma= base_dma+PCI_DMA_2ND_OFF;
728 if (w_pci_debug)
729 printf("at_wini%d: drive %d: base_dma 0x%x\n",
730 w_instance, i, wini[i].base_dma);
731 pci_compat = 1;
732 }
733 }
734 }
735
736 if(pci_compat) {
737 if(pci_reserve_ok(devind) != OK) {
738 printf("at_wini%d (compat): pci_reserve %d failed!\n",
739 w_instance, devind);
740 }
741 }
742 }
743 }
744
745 /*===========================================================================*
746 * w_do_open *
747 *===========================================================================*/
748 PRIVATE int w_do_open(dp, m_ptr)
749 struct driver *dp;
750 message *m_ptr;
751 {
752 /* Device open: Initialize the controller and read the partition table. */
753
754 struct wini *wn;
755
756 if (w_prepare(m_ptr->DEVICE) == NIL_DEV) return(ENXIO);
757
758 wn = w_wn;
759
760 /* If we've probed it before and it failed, don't probe it again. */
761 if (wn->state & IGNORING) return ENXIO;
762
763 /* If we haven't identified it yet, or it's gone deaf,
764 * (re-)identify it.
765 */
766 if (!(wn->state & IDENTIFIED) || (wn->state & DEAF)) {
767 /* Try to identify the device. */
768 if (w_identify() != OK) {
769 #if VERBOSE
770 printf("%s: probe failed\n", w_name());
771 #endif
772 if (wn->state & DEAF) w_reset();
773 wn->state = IGNORING;
774 return(ENXIO);
775 }
776 /* Do a test transaction unless it's a CD drive (then
777 * we can believe the controller, and a test may fail
778 * due to no CD being in the drive). If it fails, ignore
779 * the device forever.
780 */
781 if (!(wn->state & ATAPI) && w_io_test() != OK) {
782 wn->state |= IGNORING;
783 return(ENXIO);
784 }
785
786 #if VERBOSE
787 printf("%s: AT driver detected ", w_name());
788 if (wn->state & (SMART|ATAPI)) {
789 printf("%.40s\n", w_id_string);
790 } else {
791 printf("%ux%ux%u\n", wn->pcylinders, wn->pheads, wn->psectors);
792 }
793 #endif
794 }
795
796 #if ENABLE_ATAPI
797 if ((wn->state & ATAPI) && (m_ptr->COUNT & W_BIT))
798 return(EACCES);
799 #endif
800
801 /* Partition the drive if it's being opened for the first time,
802 * or being opened after being closed.
803 */
804 if (wn->open_ct == 0) {
805 #if ENABLE_ATAPI
806 if (wn->state & ATAPI) {
807 int r;
808 if ((r = atapi_open()) != OK) return(r);
809 }
810 #endif
811
812 /* Partition the disk. */
813 partition(&w_dtab, w_drive * DEV_PER_DRIVE, P_PRIMARY, wn->state & ATAPI);
814 }
815 wn->open_ct++;
816 return(OK);
817 }
818
819 /*===========================================================================*
820 * w_prepare *
821 *===========================================================================*/
822 PRIVATE struct device *w_prepare(int device)
823 {
824 /* Prepare for I/O on a device. */
825 struct wini *prev_wn;
826 prev_wn = w_wn;
827 w_device = device;
828
829 if (device < NR_MINORS) { /* d0, d0p[0-3], d1, ... */
830 w_drive = device / DEV_PER_DRIVE; /* save drive number */
831 w_wn = &wini[w_drive];
832 w_dv = &w_wn->part[device % DEV_PER_DRIVE];
833 } else
834 if ((unsigned) (device -= MINOR_d0p0s0) < NR_SUBDEVS) {/*d[0-7]p[0-3]s[0-3]*/
835 w_drive = device / SUB_PER_DRIVE;
836 w_wn = &wini[w_drive];
837 w_dv = &w_wn->subpart[device % SUB_PER_DRIVE];
838 } else {
839 w_device = -1;
840 return(NIL_DEV);
841 }
842 return(w_dv);
843 }
844
845 /*===========================================================================*
846 * w_identify *
847 *===========================================================================*/
848 PRIVATE int w_identify()
849 {
850 /* Find out if a device exists, if it is an old AT disk, or a newer ATA
851 * drive, a removable media device, etc.
852 */
853
854 struct wini *wn = w_wn;
855 struct command cmd;
856 int i, s;
857 int id_dma, ultra_dma;
858 u32_t dma_base;
859 u16_t w;
860 unsigned long dma_status;
861 unsigned long size;
862 int prev_wakeup;
863 int r;
864 #define id_byte(n) (&tmp_buf[2 * (n)])
865 #define id_word(n) (((u16_t) id_byte(n)[0] << 0) \
866 |((u16_t) id_byte(n)[1] << 8))
867 #define id_longword(n) (((u32_t) id_byte(n)[0] << 0) \
868 |((u32_t) id_byte(n)[1] << 8) \
869 |((u32_t) id_byte(n)[2] << 16) \
870 |((u32_t) id_byte(n)[3] << 24))
871
872 /* Try to identify the device. */
873 cmd.ldh = wn->ldhpref;
874 cmd.command = ATA_IDENTIFY;
875
876 /* In testing mode, a drive will get ignored at the first timeout. */
877 w_testing = 1;
878
879 /* Execute *_IDENTIFY with configured *_IDENTIFY timeout. */
880 prev_wakeup = wakeup_ticks;
881 wakeup_ticks = w_identify_wakeup_ticks;
882 r = com_simple(&cmd);
883
884 if (r == OK && w_waitfor(STATUS_DRQ, STATUS_DRQ) &&
885 !(wn->w_status & (STATUS_ERR|STATUS_WF))) {
886
887 /* Device information. */
888 if ((s=sys_insw(wn->base_cmd + REG_DATA, SELF, tmp_buf, SECTOR_SIZE)) != OK)
889 panic(w_name(),"Call to sys_insw() failed", s);
890
891 #if 0
892 if (id_word(0) & ID_GEN_NOT_ATA)
893 {
894 printf("%s: not an ATA device?\n", w_name());
895 wakeup_ticks = prev_wakeup;
896 w_testing = 0;
897 return ERR;
898 }
899 #endif
900
901 /* This is an ATA device. */
902 wn->state |= SMART;
903
904 /* Why are the strings byte swapped??? */
905 for (i = 0; i < 40; i++) w_id_string[i] = id_byte(27)[i^1];
906
907 /* Preferred CHS translation mode. */
908 wn->pcylinders = id_word(1);
909 wn->pheads = id_word(3);
910 wn->psectors = id_word(6);
911 size = (u32_t) wn->pcylinders * wn->pheads * wn->psectors;
912
913 w= id_word(ID_CAPABILITIES);
914 if ((w & ID_CAP_LBA) && size > 512L*1024*2) {
915 /* Drive is LBA capable and is big enough to trust it to
916 * not make a mess of it.
917 */
918 wn->ldhpref |= LDH_LBA;
919 size = id_longword(60);
920
921 w= id_word(ID_CSS);
922 if (size < LBA48_CHECK_SIZE)
923 {
924 /* No need to check for LBA48 */
925 }
926 else if (w & ID_CSS_LBA48) {
927 /* Drive is LBA48 capable (and LBA48 is turned on). */
928 if (id_longword(102)) {
929 /* If no. of sectors doesn't fit in 32 bits,
930 * trunacte to this. So it's LBA32 for now.
931 * This can still address devices up to 2TB
932 * though.
933 */
934 size = ULONG_MAX;
935 } else {
936 /* Actual number of sectors fits in 32 bits. */
937 size = id_longword(100);
938 }
939 wn->lba48 = 1;
940 }
941
942 /* Check for DMA. Assume that only LBA capable devices can do
943 * DMA.
944 */
945 w= id_word(ID_CAPABILITIES);
946 id_dma= !!(w & ID_CAP_DMA);
947 w= id_byte(ID_FIELD_VALIDITY)[0];
948 ultra_dma= !!(w & ID_FV_88);
949 dma_base= wn->base_dma;
950 if (dma_base)
951 {
952 if (sys_inb(dma_base + DMA_STATUS, &dma_status) != OK)
953 {
954 panic(w_name(),
955 "unable to read DMA status register",
956 NO_NUM);
957 }
958 }
959 if (disable_dma)
960 ; /* DMA is disabled */
961 else if (id_dma && dma_base)
962 {
963 w= id_word(ID_MULTIWORD_DMA);
964 if (w & (ID_MWDMA_2_SUP|ID_MWDMA_1_SUP|ID_MWDMA_0_SUP))
965 {
966 printf(
967 "%s: multiword DMA modes supported:%s%s%s\n",
968 w_name(),
969 (w & ID_MWDMA_0_SUP) ? " 0" : "",
970 (w & ID_MWDMA_1_SUP) ? " 1" : "",
971 (w & ID_MWDMA_2_SUP) ? " 2" : "");
972 }
973 if (w & (ID_MWDMA_0_SEL|ID_MWDMA_1_SEL|ID_MWDMA_2_SEL))
974 {
975 printf(
976 "%s: multiword DMA mode selected:%s%s%s\n",
977 w_name(),
978 (w & ID_MWDMA_0_SEL) ? " 0" : "",
979 (w & ID_MWDMA_1_SEL) ? " 1" : "",
980 (w & ID_MWDMA_2_SEL) ? " 2" : "");
981 }
982 if (ultra_dma)
983 {
984 w= id_word(ID_ULTRA_DMA);
985 if (w & (ID_UDMA_0_SUP|ID_UDMA_1_SUP|
986 ID_UDMA_2_SUP|ID_UDMA_3_SUP|
987 ID_UDMA_4_SUP|ID_UDMA_5_SUP))
988 {
989 printf(
990 "%s: Ultra DMA modes supported:%s%s%s%s%s%s\n",
991 w_name(),
992 (w & ID_UDMA_0_SUP) ? " 0" : "",
993 (w & ID_UDMA_1_SUP) ? " 1" : "",
994 (w & ID_UDMA_2_SUP) ? " 2" : "",
995 (w & ID_UDMA_3_SUP) ? " 3" : "",
996 (w & ID_UDMA_4_SUP) ? " 4" : "",
997 (w & ID_UDMA_5_SUP) ? " 5" : "");
998 }
999 if (w & (ID_UDMA_0_SEL|ID_UDMA_1_SEL|
1000 ID_UDMA_2_SEL|ID_UDMA_3_SEL|
1001 ID_UDMA_4_SEL|ID_UDMA_5_SEL))
1002 {
1003 printf(
1004 "%s: Ultra DMA mode selected:%s%s%s%s%s%s\n",
1005 w_name(),
1006 (w & ID_UDMA_0_SEL) ? " 0" : "",
1007 (w & ID_UDMA_1_SEL) ? " 1" : "",
1008 (w & ID_UDMA_2_SEL) ? " 2" : "",
1009 (w & ID_UDMA_3_SEL) ? " 3" : "",
1010 (w & ID_UDMA_4_SEL) ? " 4" : "",
1011 (w & ID_UDMA_5_SEL) ? " 5" : "");
1012 }
1013 }
1014 wn->dma= 1;
1015 }
1016 else if (id_dma || dma_base)
1017 {
1018 printf("id_dma %d, dma_base 0x%x\n", id_dma, dma_base);
1019 }
1020 else
1021 printf("no DMA support\n");
1022
1023 #if 0
1024 if (wn->dma && wn == &wini[0])
1025 {
1026 printf("disabling DMA for drive 0\n");
1027 wn->dma= 0;
1028 }
1029 #endif
1030 }
1031
1032 if (wn->lcylinders == 0) {
1033 /* No BIOS parameters? Then make some up. */
1034 wn->lcylinders = wn->pcylinders;
1035 wn->lheads = wn->pheads;
1036 wn->lsectors = wn->psectors;
1037 while (wn->lcylinders > 1024) {
1038 wn->lheads *= 2;
1039 wn->lcylinders /= 2;
1040 }
1041 }
1042 #if ENABLE_ATAPI
1043 } else
1044 if (cmd.command = ATAPI_IDENTIFY,
1045 com_simple(&cmd) == OK && w_waitfor(STATUS_DRQ, STATUS_DRQ) &&
1046 !(wn->w_status & (STATUS_ERR|STATUS_WF))) {
1047 /* An ATAPI device. */
1048 wn->state |= ATAPI;
1049
1050 /* Device information. */
1051 if ((s=sys_insw(wn->base_cmd + REG_DATA, SELF, tmp_buf, 512)) != OK)
1052 panic(w_name(),"Call to sys_insw() failed", s);
1053
1054 /* Why are the strings byte swapped??? */
1055 for (i = 0; i < 40; i++) w_id_string[i] = id_byte(27)[i^1];
1056
1057 size = 0; /* Size set later. */
1058 #endif
1059 } else {
1060 /* Not an ATA device; no translations, no special features. Don't
1061 * touch it unless the BIOS knows about it.
1062 */
1063 if (wn->lcylinders == 0) {
1064 wakeup_ticks = prev_wakeup;
1065 w_testing = 0;
1066 return(ERR);
1067 } /* no BIOS parameters */
1068 wn->pcylinders = wn->lcylinders;
1069 wn->pheads = wn->lheads;
1070 wn->psectors = wn->lsectors;
1071 size = (u32_t) wn->pcylinders * wn->pheads * wn->psectors;
1072 }
1073
1074 /* Restore wakeup_ticks and unset testing mode. */
1075 wakeup_ticks = prev_wakeup;
1076 w_testing = 0;
1077
1078 /* Size of the whole drive */
1079 wn->part[0].dv_size = mul64u(size, SECTOR_SIZE);
1080
1081 /* Reset/calibrate (where necessary) */
1082 if (w_specify() != OK && w_specify() != OK) {
1083 return(ERR);
1084 }
1085
1086 if (wn->irq == NO_IRQ) {
1087 /* Everything looks OK; register IRQ so we can stop polling. */
1088 wn->irq = w_drive < 2 ? AT_WINI_0_IRQ : AT_WINI_1_IRQ;
1089 wn->irq_hook_id = wn->irq; /* id to be returned if interrupt occurs */
1090 if ((s=sys_irqsetpolicy(wn->irq, IRQ_REENABLE, &wn->irq_hook_id)) != OK)
1091 panic(w_name(), "couldn't set IRQ policy", s);
1092 if ((s=sys_irqenable(&wn->irq_hook_id)) != OK)
1093 panic(w_name(), "couldn't enable IRQ line", s);
1094 }
1095 wn->state |= IDENTIFIED;
1096 return(OK);
1097 }
1098
1099 /*===========================================================================*
1100 * w_name *
1101 *===========================================================================*/
1102 PRIVATE char *w_name()
1103 {
1104 /* Return a name for the current device. */
1105 static char name[] = "AT0-D0";
1106
1107 name[2] = '0' + w_instance;
1108 name[5] = '0' + w_drive;
1109 return name;
1110 }
1111
1112 /*===========================================================================*
1113 * w_io_test *
1114 *===========================================================================*/
1115 PRIVATE int w_io_test(void)
1116 {
1117 int r, save_dev;
1118 int save_timeout, save_errors, save_wakeup;
1119 iovec_t iov;
1120 #ifdef CD_SECTOR_SIZE
1121 static char buf[CD_SECTOR_SIZE];
1122 #else
1123 static char buf[SECTOR_SIZE];
1124 #endif
1125
1126 iov.iov_addr = (vir_bytes) buf;
1127 iov.iov_size = sizeof(buf);
1128 save_dev = w_device;
1129
1130 /* Reduce timeout values for this test transaction. */
1131 save_timeout = timeout_ticks;
1132 save_errors = max_errors;
1133 save_wakeup = wakeup_ticks;
1134
1135 if (!w_standard_timeouts) {
1136 timeout_ticks = HZ * 4;
1137 wakeup_ticks = HZ * 6;
1138 max_errors = 3;
1139 }
1140
1141 w_testing = 1;
1142
1143 /* Try I/O on the actual drive (not any (sub)partition). */
1144 if (w_prepare(w_drive * DEV_PER_DRIVE) == NIL_DEV)
1145 panic(w_name(), "Couldn't switch devices", NO_NUM);
1146
1147 r = w_transfer(SELF, DEV_GATHER_S, cvu64(0), &iov, 1, 0);
1148
1149 /* Switch back. */
1150 if (w_prepare(save_dev) == NIL_DEV)
1151 panic(w_name(), "Couldn't switch back devices", NO_NUM);
1152
1153 /* Restore parameters. */
1154 timeout_ticks = save_timeout;
1155 max_errors = save_errors;
1156 wakeup_ticks = save_wakeup;
1157 w_testing = 0;
1158
1159 /* Test if everything worked. */
1160 if (r != OK || iov.iov_size != 0) {
1161 return ERR;
1162 }
1163
1164 /* Everything worked. */
1165
1166 return OK;
1167 }
1168
1169 /*===========================================================================*
1170 * w_specify *
1171 *===========================================================================*/
1172 PRIVATE int w_specify()
1173 {
1174 /* Routine to initialize the drive after boot or when a reset is needed. */
1175
1176 struct wini *wn = w_wn;
1177 struct command cmd;
1178
1179 if ((wn->state & DEAF) && w_reset() != OK) {
1180 return(ERR);
1181 }
1182
1183 if (!(wn->state & ATAPI)) {
1184 /* Specify parameters: precompensation, number of heads and sectors. */
1185 cmd.precomp = wn->precomp;
1186 cmd.count = wn->psectors;
1187 cmd.ldh = w_wn->ldhpref | (wn->pheads - 1);
1188 cmd.command = CMD_SPECIFY; /* Specify some parameters */
1189
1190 /* Output command block and see if controller accepts the parameters. */
1191 if (com_simple(&cmd) != OK) return(ERR);
1192
1193 if (!(wn->state & SMART)) {
1194 /* Calibrate an old disk. */
1195 cmd.sector = 0;
1196 cmd.cyl_lo = 0;
1197 cmd.cyl_hi = 0;
1198 cmd.ldh = w_wn->ldhpref;
1199 cmd.command = CMD_RECALIBRATE;
1200
1201 if (com_simple(&cmd) != OK) return(ERR);
1202 }
1203 }
1204 wn->state |= INITIALIZED;
1205 return(OK);
1206 }
1207
1208 /*===========================================================================*
1209 * do_transfer *
1210 *===========================================================================*/
1211 PRIVATE int do_transfer(struct wini *wn, unsigned int precomp,
1212 unsigned int count, unsigned int sector,
1213 unsigned int opcode, int do_dma)
1214 {
1215 struct command cmd;
1216 unsigned int sector_high;
1217 unsigned secspcyl = wn->pheads * wn->psectors;
1218 int do_lba48;
1219
1220 sector_high= 0; /* For future extensions */
1221
1222 do_lba48= 0;
1223 if (sector >= LBA48_CHECK_SIZE || sector_high != 0)
1224 {
1225 if (wn->lba48)
1226 do_lba48= 1;
1227 else if (sector > LBA_MAX_SIZE || sector_high != 0)
1228 {
1229 /* Strange sector count for LBA device */
1230 return EIO;
1231 }
1232 }
1233
1234 cmd.precomp = precomp;
1235 cmd.count = count;
1236 if (do_dma)
1237 {
1238 cmd.command = opcode == DEV_SCATTER_S ? CMD_WRITE_DMA :
1239 CMD_READ_DMA;
1240 }
1241 else
1242 cmd.command = opcode == DEV_SCATTER_S ? CMD_WRITE : CMD_READ;
1243
1244 if (do_lba48) {
1245 if (do_dma)
1246 {
1247 cmd.command = ((opcode == DEV_SCATTER_S) ?
1248 CMD_WRITE_DMA_EXT : CMD_READ_DMA_EXT);
1249 }
1250 else
1251 {
1252 cmd.command = ((opcode == DEV_SCATTER_S) ?
1253 CMD_WRITE_EXT : CMD_READ_EXT);
1254 }
1255 cmd.count_prev= (count >> 8);
1256 cmd.sector = (sector >> 0) & 0xFF;
1257 cmd.cyl_lo = (sector >> 8) & 0xFF;
1258 cmd.cyl_hi = (sector >> 16) & 0xFF;
1259 cmd.sector_prev= (sector >> 24) & 0xFF;
1260 cmd.cyl_lo_prev= (sector_high) & 0xFF;
1261 cmd.cyl_hi_prev= (sector_high >> 8) & 0xFF;
1262 cmd.ldh = wn->ldhpref;
1263
1264 return com_out_ext(&cmd);
1265 } else if (wn->ldhpref & LDH_LBA) {
1266 cmd.sector = (sector >> 0) & 0xFF;
1267 cmd.cyl_lo = (sector >> 8) & 0xFF;
1268 cmd.cyl_hi = (sector >> 16) & 0xFF;
1269 cmd.ldh = wn->ldhpref | ((sector >> 24) & 0xF);
1270 } else {
1271 int cylinder, head, sec;
1272 cylinder = sector / secspcyl;
1273 head = (sector % secspcyl) / wn->psectors;
1274 sec = sector % wn->psectors;
1275 cmd.sector = sec + 1;
1276 cmd.cyl_lo = cylinder & BYTE;
1277 cmd.cyl_hi = (cylinder >> 8) & BYTE;
1278 cmd.ldh = wn->ldhpref | head;
1279 }
1280
1281 return com_out(&cmd);
1282 }
1283
1284 /*===========================================================================*
1285 * w_transfer *
1286 *===========================================================================*/
1287 PRIVATE int w_transfer(proc_nr, opcode, position, iov, nr_req, safe)
1288 int proc_nr; /* process doing the request */
1289 int opcode; /* DEV_GATHER_S or DEV_SCATTER_S */
1290 u64_t position; /* offset on device to read or write */
1291 iovec_t *iov; /* pointer to read or write request vector */
1292 unsigned nr_req; /* length of request vector */
1293 int safe; /* iov contains addresses (0) or grants? */
1294 {
1295 struct wini *wn = w_wn;
1296 iovec_t *iop, *iov_end = iov + nr_req;
1297 int n, r, s, errors, do_dma, do_write, do_copyout;
1298 unsigned long v, block, w_status;
1299 u64_t dv_size = w_dv->dv_size;
1300 unsigned cylinder, head, sector, nbytes;
1301 unsigned dma_buf_offset;
1302 size_t addr_offset = 0;
1303
1304 #if ENABLE_ATAPI
1305 if (w_wn->state & ATAPI) {
1306 return atapi_transfer(proc_nr, opcode, position, iov, nr_req, safe);
1307 }
1308 #endif
1309
1310 /* Check disk address. */
1311 if (rem64u(position, SECTOR_SIZE) != 0) return(EINVAL);
1312
1313 errors = 0;
1314
1315 while (nr_req > 0) {
1316 /* How many bytes to transfer? */
1317 nbytes = 0;
1318 for (iop = iov; iop < iov_end; iop++) nbytes += iop->iov_size;
1319 if ((nbytes & SECTOR_MASK) != 0) return(EINVAL);
1320
1321 /* Which block on disk and how close to EOF? */
1322 if (cmp64(position, dv_size) >= 0) return(OK); /* At EOF */
1323 if (cmp64(add64ul(position, nbytes), dv_size) > 0)
1324 nbytes = diff64(dv_size, position);
1325 block = div64u(add64(w_dv->dv_base, position), SECTOR_SIZE);
1326
1327 do_dma= wn->dma;
1328 do_write= (opcode == DEV_SCATTER_S);
1329
1330 if (nbytes >= wn->max_count) {
1331 /* The drive can't do more then max_count at once. */
1332 nbytes = wn->max_count;
1333 }
1334
1335 /* First check to see if a reinitialization is needed. */
1336 if (!(wn->state & INITIALIZED) && w_specify() != OK) return(EIO);
1337
1338 if (do_dma)
1339 {
1340 setup_dma(&nbytes, proc_nr, iov, do_write, &do_copyout, safe);
1341 #if 0
1342 printf("nbytes = %d\n", nbytes);
1343 #endif
1344 }
1345
1346 /* Tell the controller to transfer nbytes bytes. */
1347 r = do_transfer(wn, wn->precomp, (nbytes >> SECTOR_SHIFT),
1348 block, opcode, do_dma);
1349
1350 if (opcode == DEV_SCATTER_S) {
1351 /* The specs call for a 400 ns wait after issuing the command.
1352 * Reading the alternate status register is the suggested
1353 * way to implement this wait.
1354 */
1355 if (sys_inb((wn->base_ctl+REG_CTL_ALTSTAT), &w_status) != OK)
1356 panic(w_name(), "couldn't get status", NO_NUM);
1357 }
1358
1359 if (do_dma)
1360 {
1361 /* Wait for the interrupt, check DMA status and optionally
1362 * copy out.
1363 */
1364
1365 if ((r = at_intr_wait()) != OK)
1366 {
1367 /* Don't retry if sector marked bad or too many
1368 * errors.
1369 */
1370 if (r == ERR_BAD_SECTOR || ++errors == max_errors) {
1371 w_command = CMD_IDLE;
1372 return(EIO);
1373 }
1374 continue;
1375 }
1376
1377 /* Wait for DMA_ST_INT to get set */
1378 w_waitfor_dma(DMA_ST_INT, DMA_ST_INT);
1379
1380 r= sys_inb(wn->base_dma + DMA_STATUS, &v);
1381 if (r != 0) panic("at_wini", "w_transfer: sys_inb failed", r);
1382
1383 #if 0
1384 printf("dma_status: 0x%x\n", v);
1385 #endif
1386 if (!(v & DMA_ST_INT))
1387 {
1388 /* DMA did not complete successfully */
1389 if (v & DMA_ST_BM_ACTIVE)
1390 panic(w_name(), "DMA did not complete", NO_NUM);
1391 else if (v & DMA_ST_ERROR)
1392 {
1393 printf("at_wini: DMA error\n");
1394 r= EIO;
1395 break;
1396 }
1397 else
1398 {
1399 #if 0
1400 printf("DMA buffer too small\n");
1401 #endif
1402 panic(w_name(), "DMA buffer too small", NO_NUM);
1403 }
1404 }
1405 else if (v & DMA_ST_BM_ACTIVE)
1406 panic(w_name(), "DMA buffer too large", NO_NUM);
1407
1408 dma_buf_offset= 0;
1409 while (r == OK && nbytes > 0)
1410 {
1411 n= iov->iov_size;
1412 if (n > nbytes)
1413 n= nbytes;
1414
1415 if (do_copyout)
1416 {
1417 if(safe) {
1418 s= sys_safecopyto(proc_nr, iov->iov_addr,
1419 addr_offset,
1420 (vir_bytes)dma_buf+dma_buf_offset, n, D);
1421 } else {
1422 s= sys_vircopy(SELF, D,
1423 (vir_bytes)dma_buf+dma_buf_offset,
1424 proc_nr, D,
1425 iov->iov_addr + addr_offset, n);
1426 }
1427 if (s != OK)
1428 {
1429 panic(w_name(),
1430 "w_transfer: sys_vircopy failed",
1431 s);
1432 }
1433 }
1434
1435 /* Book the bytes successfully transferred. */
1436 nbytes -= n;
1437 position= add64ul(position, n);
1438 if ((iov->iov_size -= n) == 0) {
1439 iov++; nr_req--; addr_offset = 0;
1440 }
1441 dma_buf_offset += n;
1442 }
1443 }
1444
1445 while (r == OK && nbytes > 0) {
1446 /* For each sector, wait for an interrupt and fetch the data
1447 * (read), or supply data to the controller and wait for an
1448 * interrupt (write).
1449 */
1450
1451 if (opcode == DEV_GATHER_S) {
1452 /* First an interrupt, then data. */
1453 if ((r = at_intr_wait()) != OK) {
1454 /* An error, send data to the bit bucket. */
1455 if (w_wn->w_status & STATUS_DRQ) {
1456 if ((s=sys_insw(wn->base_cmd+REG_DATA,
1457 SELF, tmp_buf,
1458 SECTOR_SIZE)) != OK)
1459 {
1460 panic(w_name(),
1461 "Call to sys_insw() failed",
1462 s);
1463 }
1464 }
1465 break;
1466 }
1467 }
1468
1469 /* Wait for busy to clear. */
1470 if (!w_waitfor(STATUS_BSY, 0)) { r = ERR; break; }
1471
1472 /* Wait for data transfer requested. */
1473 if (!w_waitfor(STATUS_DRQ, STATUS_DRQ)) { r = ERR; break; }
1474
1475 /* Copy bytes to or from the device's buffer. */
1476 if (opcode == DEV_GATHER_S) {
1477 if(safe) {
1478 s=sys_safe_insw(wn->base_cmd + REG_DATA, proc_nr,
1479 (void *) (iov->iov_addr), addr_offset,
1480 SECTOR_SIZE);
1481 } else {
1482 s=sys_insw(wn->base_cmd + REG_DATA, proc_nr,
1483 (void *) (iov->iov_addr + addr_offset),
1484 SECTOR_SIZE);
1485 }
1486 if(s != OK) {
1487 panic(w_name(),"Call to sys_insw() failed", s);
1488 }
1489 } else {
1490 if(safe) {
1491 s=sys_safe_outsw(wn->base_cmd + REG_DATA, proc_nr,
1492 (void *) (iov->iov_addr), addr_offset,
1493 SECTOR_SIZE);
1494 } else {
1495 s=sys_outsw(wn->base_cmd + REG_DATA, proc_nr,
1496 (void *) (iov->iov_addr + addr_offset),
1497 SECTOR_SIZE);
1498 }
1499
1500 if(s != OK) {
1501 panic(w_name(),"Call to sys_outsw() failed",
1502 s);
1503 }
1504
1505 /* Data sent, wait for an interrupt. */
1506 if ((r = at_intr_wait()) != OK) break;
1507 }
1508
1509 /* Book the bytes successfully transferred. */
1510 nbytes -= SECTOR_SIZE;
1511 position= add64u(position, SECTOR_SIZE);
1512 addr_offset += SECTOR_SIZE;
1513 if ((iov->iov_size -= SECTOR_SIZE) == 0) {
1514 iov++;
1515 nr_req--;
1516 addr_offset = 0;
1517 }
1518 }
1519
1520 /* Any errors? */
1521 if (r != OK) {
1522 /* Don't retry if sector marked bad or too many errors. */
1523 if (r == ERR_BAD_SECTOR || ++errors == max_errors) {
1524 w_command = CMD_IDLE;
1525 return(EIO);
1526 }
1527 }
1528 }
1529
1530 w_command = CMD_IDLE;
1531 return(OK);
1532 }
1533
1534 /*===========================================================================*
1535 * com_out *
1536 *===========================================================================*/
1537 PRIVATE int com_out(cmd)
1538 struct command *cmd; /* Command block */
1539 {
1540 /* Output the command block to the winchester controller and return status */
1541
1542 struct wini *wn = w_wn;
1543 unsigned base_cmd = wn->base_cmd;
1544 unsigned base_ctl = wn->base_ctl;
1545 pvb_pair_t outbyte[7]; /* vector for sys_voutb() */
1546 int s; /* status for sys_(v)outb() */
1547
1548 if (w_wn->state & IGNORING) return ERR;
1549
1550 if (!w_waitfor(STATUS_BSY, 0)) {
1551 printf("%s: controller not ready\n", w_name());
1552 return(ERR);
1553 }
1554
1555 /* Select drive. */
1556 if ((s=sys_outb(base_cmd + REG_LDH, cmd->ldh)) != OK)
1557 panic(w_name(),"Couldn't write register to select drive",s);
1558
1559 if (!w_waitfor(STATUS_BSY, 0)) {
1560 printf("%s: com_out: drive not ready\n", w_name());
1561 return(ERR);
1562 }
1563
1564 /* Schedule a wakeup call, some controllers are flaky. This is done with
1565 * a synchronous alarm. If a timeout occurs a SYN_ALARM message is sent
1566 * from HARDWARE, so that w_intr_wait() can call w_timeout() in case the
1567 * controller was not able to execute the command. Leftover timeouts are
1568 * simply ignored by the main loop.
1569 */
1570 sys_setalarm(wakeup_ticks, 0);
1571
1572 wn->w_status = STATUS_ADMBSY;
1573 w_command = cmd->command;
1574 pv_set(outbyte[0], base_ctl + REG_CTL, wn->pheads >= 8 ? CTL_EIGHTHEADS : 0);
1575 pv_set(outbyte[1], base_cmd + REG_PRECOMP, cmd->precomp);
1576 pv_set(outbyte[2], base_cmd + REG_COUNT, cmd->count);
1577 pv_set(outbyte[3], base_cmd + REG_SECTOR, cmd->sector);
1578 pv_set(outbyte[4], base_cmd + REG_CYL_LO, cmd->cyl_lo);
1579 pv_set(outbyte[5], base_cmd + REG_CYL_HI, cmd->cyl_hi);
1580 pv_set(outbyte[6], base_cmd + REG_COMMAND, cmd->command);
1581 if ((s=sys_voutb(outbyte,7)) != OK)
1582 panic(w_name(),"Couldn't write registers with sys_voutb()",s);
1583 return(OK);
1584 }
1585
1586 /*===========================================================================*
1587 * com_out_ext *
1588 *===========================================================================*/
1589 PRIVATE int com_out_ext(cmd)
1590 struct command *cmd; /* Command block */
1591 {
1592 /* Output the command block to the winchester controller and return status */
1593
1594 struct wini *wn = w_wn;
1595 unsigned base_cmd = wn->base_cmd;
1596 unsigned base_ctl = wn->base_ctl;
1597 pvb_pair_t outbyte[11]; /* vector for sys_voutb() */
1598 int s; /* status for sys_(v)outb() */
1599 unsigned long w_status;
1600
1601 if (w_wn->state & IGNORING) return ERR;
1602
1603 if (!w_waitfor(STATUS_BSY, 0)) {
1604 printf("%s: controller not ready\n", w_name());
1605 return(ERR);
1606 }
1607
1608 /* Select drive. */
1609 if ((s=sys_outb(base_cmd + REG_LDH, cmd->ldh)) != OK)
1610 panic(w_name(),"Couldn't write register to select drive",s);
1611
1612 if (!w_waitfor(STATUS_BSY, 0)) {
1613 printf("%s: com_out: drive not ready\n", w_name());
1614 return(ERR);
1615 }
1616
1617 /* Schedule a wakeup call, some controllers are flaky. This is done with
1618 * a synchronous alarm. If a timeout occurs a SYN_ALARM message is sent
1619 * from HARDWARE, so that w_intr_wait() can call w_timeout() in case the
1620 * controller was not able to execute the command. Leftover timeouts are
1621 * simply ignored by the main loop.
1622 */
1623 sys_setalarm(wakeup_ticks, 0);
1624
1625 wn->w_status = STATUS_ADMBSY;
1626 w_command = cmd->command;
1627 pv_set(outbyte[0], base_ctl + REG_CTL, 0);
1628 pv_set(outbyte[1], base_cmd + REG_COUNT, cmd->count_prev);
1629 pv_set(outbyte[2], base_cmd + REG_SECTOR, cmd->sector_prev);
1630 pv_set(outbyte[3], base_cmd + REG_CYL_LO, cmd->cyl_lo_prev);
1631 pv_set(outbyte[4], base_cmd + REG_CYL_HI, cmd->cyl_hi_prev);
1632 pv_set(outbyte[5], base_cmd + REG_COUNT, cmd->count);
1633 pv_set(outbyte[6], base_cmd + REG_SECTOR, cmd->sector);
1634 pv_set(outbyte[7], base_cmd + REG_CYL_LO, cmd->cyl_lo);
1635 pv_set(outbyte[8], base_cmd + REG_CYL_HI, cmd->cyl_hi);
1636 pv_set(outbyte[9], base_cmd + REG_COMMAND, cmd->command);
1637 if ((s=sys_voutb(outbyte, 10)) != OK)
1638 panic(w_name(),"Couldn't write registers with sys_voutb()",s);
1639
1640 return(OK);
1641 }
1642
1643 /*===========================================================================*
1644 * setup_dma *
1645 *===========================================================================*/
1646 PRIVATE void setup_dma(sizep, proc_nr, iov, do_write, do_copyoutp, safe)
1647 unsigned *sizep;
1648 int proc_nr;
1649 iovec_t *iov;
1650 int do_write;
1651 int *do_copyoutp;
1652 int safe;
1653 {
1654 phys_bytes phys, user_phys;
1655 unsigned n, offset, size;
1656 int i, j, r, bad;
1657 unsigned long v;
1658 struct wini *wn = w_wn;
1659
1660 /* First try direct scatter/gather to the supplied buffers */
1661 size= *sizep;
1662 i= 0; /* iov index */
1663 j= 0; /* prdt index */
1664 bad= 0;
1665 offset= 0; /* Offset in current iov */
1666
1667 #if 0
1668 printf("setup_dma: proc_nr %d\n", proc_nr);
1669 #endif
1670
1671 while (size > 0)
1672 {
1673 #if 0
1674 printf(
1675 "setup_dma: iov[%d]: addr 0x%x, size %d offset %d, size %d\n",
1676 i, iov[i].iov_addr, iov[i].iov_size, offset, size);
1677 #endif
1678
1679 n= iov[i].iov_size-offset;
1680 if (n > size)
1681 n= size;
1682 if (n == 0 || (n & 1))
1683 panic("at_wini", "bad size in iov", iov[i].iov_size);
1684 if(safe) {
1685 r= sys_umap(proc_nr, GRANT_SEG, iov[i].iov_addr, n,&user_phys);
1686 user_phys += offset;
1687 } else {
1688 r= sys_umap(proc_nr, D, iov[i].iov_addr+offset, n, &user_phys);
1689 }
1690 if (r != 0)
1691 panic("at_wini", "can't map user buffer", r);
1692 if (user_phys & 1)
1693 {
1694 /* Buffer is not aligned */
1695 printf("setup_dma: user buffer is not aligned\n");
1696 bad= 1;
1697 break;
1698 }
1699
1700 /* vector is not allowed to cross a 64K boundary */
1701 if (user_phys/0x10000 != (user_phys+n-1)/0x10000)
1702 n= ((user_phys/0x10000)+1)*0x10000 - user_phys;
1703
1704 /* vector is not allowed to be bigger than 64K, but we get that
1705 * for free.
1706 */
1707
1708 if (j >= N_PRDTE)
1709 {
1710 /* Too many entries */
1711 bad= 1;
1712 break;
1713 }
1714
1715 prdt[j].prdte_base= user_phys;
1716 prdt[j].prdte_count= n;
1717 prdt[j].prdte_reserved= 0;
1718 prdt[j].prdte_flags= 0;
1719 j++;
1720
1721 offset += n;
1722 if (offset >= iov[i].iov_size)
1723 {
1724 i++;
1725 offset= 0;
1726 }
1727
1728 size -= n;
1729 }
1730
1731 if (!bad)
1732 {
1733 if (j <= 0 || j > N_PRDTE)
1734 panic("at_wini", "bad prdt index", j);
1735 prdt[j-1].prdte_flags |= PRDTE_FL_EOT;
1736
1737 #if 0
1738 for (i= 0; i<j; i++)
1739 {
1740 printf("prdt[%d]: base 0x%x, size %d, flags 0x%x\n",
1741 i, prdt[i].prdte_base, prdt[i].prdte_count,
1742 prdt[i].prdte_flags);
1743 }
1744 #endif
1745 }
1746
1747 /* The caller needs to perform a copy-out from the dma buffer if
1748 * this is a read request and we can't DMA directly to the user's
1749 * buffers.
1750 */
1751 *do_copyoutp= (!do_write && bad);
1752
1753 if (bad)
1754 {
1755 /* Adjust request size */
1756 size= *sizep;
1757 if (size > ATA_DMA_BUF_SIZE)
1758 *sizep= size= ATA_DMA_BUF_SIZE;
1759
1760 if (do_write)
1761 {
1762 /* Copy-in */
1763 for (offset= 0; offset < size; offset += n)
1764 {
1765 n= size-offset;
1766 if (n > iov->iov_size)
1767 n= iov->iov_size;
1768
1769 if(safe) {
1770 r= sys_safecopyfrom(proc_nr, iov->iov_addr,
1771 0, (vir_bytes)dma_buf+offset, n, D);
1772 } else {
1773 r= sys_vircopy(proc_nr, D, iov->iov_addr,
1774 SELF, D, (vir_bytes)dma_buf+offset,
1775 n);
1776 }
1777 if (r != OK)
1778 {
1779 panic(w_name(),
1780 "setup_dma: sys_vircopy failed",
1781 r);
1782 }
1783 iov++;
1784 }
1785 }
1786
1787 /* Fill-in the physical region descriptor table */
1788 phys= dma_buf_phys;
1789 if (phys & 1)
1790 {
1791 /* Two byte alignment is required */
1792 panic("at_wini", "bad buffer alignment in setup_dma",
1793 phys);
1794 }
1795 for (j= 0; j<N_PRDTE; i++)
1796 {
1797 if (size == 0)
1798 {
1799 panic("at_wini", "bad size in setup_dma",
1800 size);
1801 }
1802 if (size & 1)
1803 {
1804 /* Two byte alignment is required for size */
1805 panic("at_wini",
1806 "bad size alignment in setup_dma",
1807 size);
1808 }
1809 n= size;
1810
1811 /* Buffer is not allowed to cross a 64K boundary */
1812 if (phys / 0x10000 != (phys+n-1) / 0x10000)
1813 {
1814 n= ((phys/0x10000)+1)*0x10000 - phys;
1815 }
1816 prdt[j].prdte_base= phys;
1817 prdt[j].prdte_count= n;
1818 prdt[j].prdte_reserved= 0;
1819 prdt[j].prdte_flags= 0;
1820
1821 size -= n;
1822 if (size == 0)
1823 {
1824 prdt[j].prdte_flags |= PRDTE_FL_EOT;
1825 break;
1826 }
1827 }
1828 if (size != 0)
1829 panic("at_wini", "size to large for prdt", NO_NUM);
1830
1831 #if 0
1832 for (i= 0; i<=j; i++)
1833 {
1834 printf("prdt[%d]: base 0x%x, size %d, flags 0x%x\n",
1835 i, prdt[i].prdte_base, prdt[i].prdte_count,
1836 prdt[i].prdte_flags);
1837 }
1838 #endif
1839 }
1840
1841 /* Stop bus master operation */
1842 r= sys_outb(wn->base_dma + DMA_COMMAND, 0);
1843 if (r != 0) panic("at_wini", "setup_dma: sys_outb failed", r);
1844
1845 /* Verify that the bus master is not active */
1846 r= sys_inb(wn->base_dma + DMA_STATUS, &v);
1847 if (r != 0) panic("at_wini", "setup_dma: sys_inb failed", r);
1848 if (v & DMA_ST_BM_ACTIVE)
1849 panic("at_wini", "Bus master IDE active", NO_NUM);
1850
1851 if (prdt_phys & 3)
1852 panic("at_wini", "prdt not aligned", prdt_phys);
1853 r= sys_outl(wn->base_dma + DMA_PRDTP, prdt_phys);
1854 if (r != 0) panic("at_wini", "setup_dma: sys_outl failed", r);
1855
1856 /* Clear interrupt and error flags */
1857 r= sys_outb(wn->base_dma + DMA_STATUS, DMA_ST_INT | DMA_ST_ERROR);
1858 if (r != 0) panic("at_wini", "setup_dma: sys_outb failed", r);
1859
1860 /* Assume disk reads. Start DMA */
1861 v= DMA_CMD_START;
1862 if (!do_write)
1863 {
1864 /* Disk reads generate PCI write cycles. */
1865 v |= DMA_CMD_WRITE;
1866 }
1867 r= sys_outb(wn->base_dma + DMA_COMMAND, v);
1868 if (r != 0) panic("at_wini", "setup_dma: sys_outb failed", r);
1869
1870 #if 0
1871 r= sys_inb(wn->base_dma + DMA_STATUS, &v);
1872 if (r != 0) panic("at_wini", "setup_dma: sys_inb failed", r);
1873 printf("dma status: 0x%x\n", v);
1874 #endif
1875 }
1876
1877
1878 /*===========================================================================*
1879 * w_need_reset *
1880 *===========================================================================*/
1881 PRIVATE void w_need_reset()
1882 {
1883 /* The controller needs to be reset. */
1884 struct wini *wn;
1885 int dr = 0;
1886
1887 for (wn = wini; wn < &wini[MAX_DRIVES]; wn++, dr++) {
1888 if (wn->base_cmd == w_wn->base_cmd) {
1889 wn->state |= DEAF;
1890 wn->state &= ~INITIALIZED;
1891 }
1892 }
1893 }
1894
1895 /*===========================================================================*
1896 * w_do_close *
1897 *===========================================================================*/
1898 PRIVATE int w_do_close(dp, m_ptr)
1899 struct driver *dp;
1900 message *m_ptr;
1901 {
1902 /* Device close: Release a device. */
1903 if (w_prepare(m_ptr->DEVICE) == NIL_DEV)
1904 return(ENXIO);
1905 w_wn->open_ct--;
1906 #if ENABLE_ATAPI
1907 if (w_wn->open_ct == 0 && (w_wn->state & ATAPI)) atapi_close();
1908 #endif
1909 return(OK);
1910 }
1911
1912 /*===========================================================================*
1913 * com_simple *
1914 *===========================================================================*/
1915 PRIVATE int com_simple(cmd)
1916 struct command *cmd; /* Command block */
1917 {
1918 /* A simple controller command, only one interrupt and no data-out phase. */
1919 int r;
1920
1921 if (w_wn->state & IGNORING) return ERR;
1922
1923 if ((r = com_out(cmd)) == OK) r = at_intr_wait();
1924 w_command = CMD_IDLE;
1925 return(r);
1926 }
1927
1928 /*===========================================================================*
1929 * w_timeout *
1930 *===========================================================================*/
1931 PRIVATE void w_timeout(void)
1932 {
1933 struct wini *wn = w_wn;
1934
1935 switch (w_command) {
1936 case CMD_IDLE:
1937 break; /* fine */
1938 case CMD_READ:
1939 case CMD_READ_EXT:
1940 case CMD_WRITE:
1941 case CMD_WRITE_EXT:
1942 /* Impossible, but not on PC's: The controller does not respond. */
1943
1944 /* Limiting multisector I/O seems to help. */
1945 if (wn->max_count > 8 * SECTOR_SIZE) {
1946 wn->max_count = 8 * SECTOR_SIZE;
1947 } else {
1948 wn->max_count = SECTOR_SIZE;
1949 }
1950 /*FALL THROUGH*/
1951 default:
1952 /* Some other command. */
1953 if (w_testing) wn->state |= IGNORING; /* Kick out this drive. */
1954 else if (!w_silent) printf("%s: timeout on command 0x%02x\n",
1955 w_name(), w_command);
1956 w_need_reset();
1957 wn->w_status = 0;
1958 }
1959 }
1960
1961 /*===========================================================================*
1962 * w_reset *
1963 *===========================================================================*/
1964 PRIVATE int w_reset()
1965 {
1966 /* Issue a reset to the controller. This is done after any catastrophe,
1967 * like the controller refusing to respond.
1968 */
1969 int s;
1970 struct wini *wn = w_wn;
1971
1972 /* Don't bother if this drive is forgotten. */
1973 if (w_wn->state & IGNORING) return ERR;
1974
1975 /* Wait for any internal drive recovery. */
1976 tickdelay(RECOVERY_TICKS);
1977
1978 /* Strobe reset bit */
1979 if ((s=sys_outb(wn->base_ctl + REG_CTL, CTL_RESET)) != OK)
1980 panic(w_name(),"Couldn't strobe reset bit",s);
1981 tickdelay(DELAY_TICKS);
1982 if ((s=sys_outb(wn->base_ctl + REG_CTL, 0)) != OK)
1983 panic(w_name(),"Couldn't strobe reset bit",s);
1984 tickdelay(DELAY_TICKS);
1985
1986 /* Wait for controller ready */
1987 if (!w_waitfor(STATUS_BSY, 0)) {
1988 printf("%s: reset failed, drive busy\n", w_name());
1989 return(ERR);
1990 }
1991
1992 /* The error register should be checked now, but some drives mess it up. */
1993
1994 for (wn = wini; wn < &wini[MAX_DRIVES]; wn++) {
1995 if (wn->base_cmd == w_wn->base_cmd) {
1996 wn->state &= ~DEAF;
1997 if (w_wn->irq_need_ack) {
1998 /* Make sure irq is actually enabled.. */
1999 sys_irqenable(&w_wn->irq_hook_id);
2000 }
2001 }
2002 }
2003
2004
2005 return(OK);
2006 }
2007
2008 /*===========================================================================*
2009 * w_intr_wait *
2010 *===========================================================================*/
2011 PRIVATE void w_intr_wait()
2012 {
2013 /* Wait for a task completion interrupt. */
2014
2015 int r;
2016 unsigned long w_status;
2017 message m;
2018
2019 if (w_wn->irq != NO_IRQ) {
2020 /* Wait for an interrupt that sets w_status to "not busy".
2021 * (w_timeout() also clears w_status.)
2022 */
2023 while (w_wn->w_status & (STATUS_ADMBSY|STATUS_BSY)) {
2024 int rr;
2025 if((rr=receive(ANY, &m)) != OK)
2026 panic("at_wini", "receive(ANY) failed", rr);
2027 switch(m.m_type) {
2028 case SYN_ALARM:
2029 /* Timeout. */
2030 w_timeout(); /* a.o. set w_status */
2031 break;
2032 case HARD_INT:
2033 /* Interrupt. */
2034 r= sys_inb(w_wn->base_cmd + REG_STATUS, &w_status);
2035 if (r != 0)
2036 panic("at_wini", "sys_inb failed", r);
2037 w_wn->w_status= w_status;
2038 ack_irqs(m.NOTIFY_ARG);
2039 break;
2040 case DEV_PING:
2041 /* RS monitor ping. */
2042 notify(m.m_source);
2043 break;
2044 default:
2045 /* unhandled message.
2046 * queue it and handle it in the libdriver loop.
2047 */
2048 mq_queue(&m);
2049 }
2050 }
2051 } else {
2052 /* Interrupt not yet allocated; use polling. */
2053 (void) w_waitfor(STATUS_BSY, 0);
2054 }
2055 }
2056
2057 /*===========================================================================*
2058 * at_intr_wait *
2059 *===========================================================================*/
2060 PRIVATE int at_intr_wait()
2061 {
2062 /* Wait for an interrupt, study the status bits and return error/success. */
2063 int r, s;
2064 unsigned long inbval;
2065
2066 w_intr_wait();
2067 if ((w_wn->w_status & (STATUS_BSY | STATUS_WF | STATUS_ERR)) == 0) {
2068 r = OK;
2069 } else {
2070 if ((s=sys_inb(w_wn->base_cmd + REG_ERROR, &inbval)) != OK)
2071 panic(w_name(),"Couldn't read register",s);
2072 if ((w_wn->w_status & STATUS_ERR) && (inbval & ERROR_BB)) {
2073 r = ERR_BAD_SECTOR; /* sector marked bad, retries won't help */
2074 } else {
2075 r = ERR; /* any other error */
2076 }
2077 }
2078 w_wn->w_status |= STATUS_ADMBSY; /* assume still busy with I/O */
2079 return(r);
2080 }
2081
2082 /*===========================================================================*
2083 * w_waitfor *
2084 *===========================================================================*/
2085 PRIVATE int w_waitfor(mask, value)
2086 int mask; /* status mask */
2087 int value; /* required status */
2088 {
2089 /* Wait until controller is in the required state. Return zero on timeout.
2090 * An alarm that set a timeout flag is used. TIMEOUT is in micros, we need
2091 * ticks. Disabling the alarm is not needed, because a static flag is used
2092 * and a leftover timeout cannot do any harm.
2093 */
2094 unsigned long w_status;
2095 clock_t t0, t1;
2096 int s;
2097
2098 getuptime(&t0);
2099 do {
2100 if ((s=sys_inb(w_wn->base_cmd + REG_STATUS, &w_status)) != OK)
2101 panic(w_name(),"Couldn't read register",s);
2102 w_wn->w_status= w_status;
2103 if ((w_wn->w_status & mask) == value) {
2104 return 1;
2105 }
2106 } while ((s=getuptime(&t1)) == OK && (t1-t0) < timeout_ticks );
2107 if (OK != s) printf("AT_WINI: warning, get_uptime failed: %d\n",s);
2108
2109 w_need_reset(); /* controller gone deaf */
2110 return(0);
2111 }
2112
2113 /*===========================================================================*
2114 * w_waitfor_dma *
2115 *===========================================================================*/
2116 PRIVATE int w_waitfor_dma(mask, value)
2117 int mask; /* status mask */
2118 int value; /* required status */
2119 {
2120 /* Wait until controller is in the required state. Return zero on timeout.
2121 * An alarm that set a timeout flag is used. TIMEOUT is in micros, we need
2122 * ticks. Disabling the alarm is not needed, because a static flag is used
2123 * and a leftover timeout cannot do any harm.
2124 */
2125 unsigned long w_status;
2126 clock_t t0, t1;
2127 int s;
2128
2129 getuptime(&t0);
2130 do {
2131 if ((s=sys_inb(w_wn->base_dma + DMA_STATUS, &w_status)) != OK)
2132 panic(w_name(),"Couldn't read register",s);
2133 if ((w_status & mask) == value) {
2134 return 1;
2135 }
2136 } while ((s=getuptime(&t1)) == OK && (t1-t0) < timeout_ticks );
2137 if (OK != s) printf("AT_WINI: warning, get_uptime failed: %d\n",s);
2138
2139 return(0);
2140 }
2141
2142 /*===========================================================================*
2143 * w_geometry *
2144 *===========================================================================*/
2145 PRIVATE void w_geometry(entry)
2146 struct partition *entry;
2147 {
2148 struct wini *wn = w_wn;
2149
2150 if (wn->state & ATAPI) { /* Make up some numbers. */
2151 entry->cylinders = div64u(wn->part[0].dv_size, SECTOR_SIZE) / (64*32);
2152 entry->heads = 64;
2153 entry->sectors = 32;
2154 } else { /* Return logical geometry. */
2155 entry->cylinders = wn->lcylinders;
2156 entry->heads = wn->lheads;
2157 entry->sectors = wn->lsectors;
2158 }
2159 }
2160
2161 #if ENABLE_ATAPI
2162 /*===========================================================================*
2163 * atapi_open *
2164 *===========================================================================*/
2165 PRIVATE int atapi_open()
2166 {
2167 /* Should load and lock the device and obtain its size. For now just set the
2168 * size of the device to something big. What is really needed is a generic
2169 * SCSI layer that does all this stuff for ATAPI and SCSI devices (kjb). (XXX)
2170 */
2171 w_wn->part[0].dv_size = mul64u(800L*1024, 1024);
2172 return(OK);
2173 }
2174
2175 /*===========================================================================*
2176 * atapi_close *
2177 *===========================================================================*/
2178 PRIVATE void atapi_close()
2179 {
2180 /* Should unlock the device. For now do nothing. (XXX) */
2181 }
2182
2183 void sense_request(void)
2184 {
2185 int r, i;
2186 static u8_t sense[100], packet[ATAPI_PACKETSIZE];
2187
2188 packet[0] = SCSI_SENSE;
2189 packet[1] = 0;
2190 packet[2] = 0;
2191 packet[3] = 0;
2192 packet[4] = SENSE_PACKETSIZE;
2193 packet[5] = 0;
2194 packet[7] = 0;
2195 packet[8] = 0;
2196 packet[9] = 0;
2197 packet[10] = 0;
2198 packet[11] = 0;
2199
2200 for(i = 0; i < SENSE_PACKETSIZE; i++) sense[i] = 0xff;
2201 r = atapi_sendpacket(packet, SENSE_PACKETSIZE);
2202 if (r != OK) { printf("request sense command failed\n"); return; }
2203 if (atapi_intr_wait() <= 0) { printf("WARNING: request response failed\n"); }
2204
2205 if (sys_insw(w_wn->base_cmd + REG_DATA, SELF, (void *) sense, SENSE_PACKETSIZE) != OK)
2206 printf("WARNING: sense reading failed\n");
2207
2208 printf("sense data:");
2209 for(i = 0; i < SENSE_PACKETSIZE; i++) printf(" %02x", sense[i]);
2210 printf("\n");
2211 }
2212
2213 /*===========================================================================*
2214 * atapi_transfer *
2215 *===========================================================================*/
2216 PRIVATE int atapi_transfer(proc_nr, opcode, position, iov, nr_req, safe)
2217 int proc_nr; /* process doing the request */
2218 int opcode; /* DEV_GATHER_S or DEV_SCATTER_S */
2219 u64_t position; /* offset on device to read or write */
2220 iovec_t *iov; /* pointer to read or write request vector */
2221 unsigned nr_req; /* length of request vector */
2222 int safe; /* use safecopies? */
2223 {
2224 struct wini *wn = w_wn;
2225 iovec_t *iop, *iov_end = iov + nr_req;
2226 int r, s, errors, fresh;
2227 u64_t pos;
2228 unsigned long block;
2229 u64_t dv_size = w_dv->dv_size;
2230 unsigned nbytes, nblocks, count, before, chunk;
2231 static u8_t packet[ATAPI_PACKETSIZE];
2232 size_t addr_offset = 0;
2233
2234 errors = fresh = 0;
2235
2236 while (nr_req > 0 && !fresh) {
2237 /* The Minix block size is smaller than the CD block size, so we
2238 * may have to read extra before or after the good data.
2239 */
2240 pos = add64(w_dv->dv_base, position);
2241 block = div64u(pos, CD_SECTOR_SIZE);
2242 before = rem64u(pos, CD_SECTOR_SIZE);
2243
2244 /* How many bytes to transfer? */
2245 nbytes = count = 0;
2246 for (iop = iov; iop < iov_end; iop++) {
2247 nbytes += iop->iov_size;
2248 if ((before + nbytes) % CD_SECTOR_SIZE == 0) count = nbytes;
2249 }
2250
2251 /* Does one of the memory chunks end nicely on a CD sector multiple? */
2252 if (count != 0) nbytes = count;
2253
2254 /* Data comes in as words, so we have to enforce even byte counts. */
2255 if ((before | nbytes) & 1) return(EINVAL);
2256
2257 /* Which block on disk and how close to EOF? */
2258 if (cmp64(position, dv_size) >= 0) return(OK); /* At EOF */
2259 if (cmp64(add64ul(position, nbytes), dv_size) > 0)
2260 nbytes = diff64(dv_size, position);
2261
2262 nblocks = (before + nbytes + CD_SECTOR_SIZE - 1) / CD_SECTOR_SIZE;
2263 if (ATAPI_DEBUG) {
2264 printf("block=%lu, before=%u, nbytes=%u, nblocks=%u\n",
2265 block, before, nbytes, nblocks);
2266 }
2267
2268 /* First check to see if a reinitialization is needed. */
2269 if (!(wn->state & INITIALIZED) && w_specify() != OK) return(EIO);
2270
2271 /* Build an ATAPI command packet. */
2272 packet[0] = SCSI_READ10;
2273 packet[1] = 0;
2274 packet[2] = (block >> 24) & 0xFF;
2275 packet[3] = (block >> 16) & 0xFF;
2276 packet[4] = (block >> 8) & 0xFF;
2277 packet[5] = (block >> 0) & 0xFF;
2278 packet[6] = 0;
2279 packet[7] = (nblocks >> 8) & 0xFF;
2280 packet[8] = (nblocks >> 0) & 0xFF;
2281 packet[9] = 0;
2282 packet[10] = 0;
2283 packet[11] = 0;
2284
2285 /* Tell the controller to execute the packet command. */
2286 r = atapi_sendpacket(packet, nblocks * CD_SECTOR_SIZE);
2287 if (r != OK) goto err;
2288
2289 /* Read chunks of data. */
2290 while ((r = atapi_intr_wait()) > 0) {
2291 count = r;
2292
2293 if (ATAPI_DEBUG) {
2294 printf("before=%u, nbytes=%u, count=%u\n",
2295 before, nbytes, count);
2296 }
2297
2298 while (before > 0 && count > 0) { /* Discard before. */
2299 chunk = before;
2300 if (chunk > count) chunk = count;
2301 if (chunk > DMA_BUF_SIZE) chunk = DMA_BUF_SIZE;
2302 if ((s=sys_insw(wn->base_cmd + REG_DATA, SELF, tmp_buf, chunk)) != OK)
2303 panic(w_name(),"Call to sys_insw() failed", s);
2304 before -= chunk;
2305 count -= chunk;
2306 }
2307
2308 while (nbytes > 0 && count > 0) { /* Requested data. */
2309 chunk = nbytes;
2310 if (chunk > count) chunk = count;
2311 if (chunk > iov->iov_size) chunk = iov->iov_size;
2312 if(safe) {
2313 s=sys_safe_insw(wn->base_cmd + REG_DATA, proc_nr,
2314 (void *) iov->iov_addr, addr_offset, chunk);
2315 } else {
2316 s=sys_insw(wn->base_cmd + REG_DATA, proc_nr,
2317 (void *) (iov->iov_addr + addr_offset), chunk);
2318 }
2319 if (s != OK)
2320 panic(w_name(),"Call to sys_insw() failed", s);
2321 position= add64ul(position, chunk);
2322 nbytes -= chunk;
2323 count -= chunk;
2324 addr_offset += chunk;
2325 fresh = 0;
2326 if ((iov->iov_size -= chunk) == 0) {
2327 iov++;
2328 nr_req--;
2329 fresh = 1; /* new element is optional */
2330 addr_offset = 0;
2331 }
2332 }
2333
2334 while (count > 0) { /* Excess data. */
2335 chunk = count;
2336 if (chunk > DMA_BUF_SIZE) chunk = DMA_BUF_SIZE;
2337 if ((s=sys_insw(wn->base_cmd + REG_DATA, SELF, tmp_buf, chunk)) != OK)
2338 panic(w_name(),"Call to sys_insw() failed", s);
2339 count -= chunk;
2340 }
2341 }
2342
2343 if (r < 0) {
2344 err: /* Don't retry if too many errors. */
2345 if (atapi_debug) sense_request();
2346 if (++errors == max_errors) {
2347 w_command = CMD_IDLE;
2348 if (atapi_debug) printf("giving up (%d)\n", errors);
2349 return(EIO);
2350 }
2351 if (atapi_debug) printf("retry (%d)\n", errors);
2352 }
2353 }
2354
2355 w_command = CMD_IDLE;
2356 return(OK);
2357 }
2358
2359 /*===========================================================================*
2360 * atapi_sendpacket *
2361 *===========================================================================*/
2362 PRIVATE int atapi_sendpacket(packet, cnt)
2363 u8_t *packet;
2364 unsigned cnt;
2365 {
2366 /* Send an Atapi Packet Command */
2367 struct wini *wn = w_wn;
2368 pvb_pair_t outbyte[6]; /* vector for sys_voutb() */
2369 int s;
2370
2371 if (wn->state & IGNORING) return ERR;
2372
2373 /* Select Master/Slave drive */
2374 if ((s=sys_outb(wn->base_cmd + REG_DRIVE, wn->ldhpref)) != OK)
2375 panic(w_name(),"Couldn't select master/ slave drive",s);
2376
2377 if (!w_waitfor(STATUS_BSY | STATUS_DRQ, 0)) {
2378 printf("%s: atapi_sendpacket: drive not ready\n", w_name());
2379 return(ERR);
2380 }
2381
2382 /* Schedule a wakeup call, some controllers are flaky. This is done with
2383 * a synchronous alarm. If a timeout occurs a SYN_ALARM message is sent
2384 * from HARDWARE, so that w_intr_wait() can call w_timeout() in case the
2385 * controller was not able to execute the command. Leftover timeouts are
2386 * simply ignored by the main loop.
2387 */
2388 sys_setalarm(wakeup_ticks, 0);
2389
2390 #if _WORD_SIZE > 2
2391 if (cnt > 0xFFFE) cnt = 0xFFFE; /* Max data per interrupt. */
2392 #endif
2393
2394 w_command = ATAPI_PACKETCMD;
2395 pv_set(outbyte[0], wn->base_cmd + REG_FEAT, 0);
2396 pv_set(outbyte[1], wn->base_cmd + REG_IRR, 0);
2397 pv_set(outbyte[2], wn->base_cmd + REG_SAMTAG, 0);
2398 pv_set(outbyte[3], wn->base_cmd + REG_CNT_LO, (cnt >> 0) & 0xFF);
2399 pv_set(outbyte[4], wn->base_cmd + REG_CNT_HI, (cnt >> 8) & 0xFF);
2400 pv_set(outbyte[5], wn->base_cmd + REG_COMMAND, w_command);
2401 if (atapi_debug) printf("cmd: %x ", w_command);
2402 if ((s=sys_voutb(outbyte,6)) != OK)
2403 panic(w_name(),"Couldn't write registers with sys_voutb()",s);
2404
2405 if (!w_waitfor(STATUS_BSY | STATUS_DRQ, STATUS_DRQ)) {
2406 printf("%s: timeout (BSY|DRQ -> DRQ)\n", w_name());
2407 return(ERR);
2408 }
2409 wn->w_status |= STATUS_ADMBSY; /* Command not at all done yet. */
2410
2411 /* Send the command packet to the device. */
2412 if ((s=sys_outsw(wn->base_cmd + REG_DATA, SELF, packet, ATAPI_PACKETSIZE)) != OK)
2413 panic(w_name(),"sys_outsw() failed", s);
2414
2415 {
2416 int p;
2417 if (atapi_debug) {
2418 printf("sent command:");
2419 for(p = 0; p < ATAPI_PACKETSIZE; p++) { printf(" %02x", packet[p]); }
2420 printf("\n");
2421 }
2422 }
2423 return(OK);
2424 }
2425
2426
2427 #endif /* ENABLE_ATAPI */
2428
2429 /*===========================================================================*
2430 * w_other *
2431 *===========================================================================*/
2432 PRIVATE int w_other(dr, m, safe)
2433 struct driver *dr;
2434 message *m;
2435 int safe;
2436 {
2437 int r, timeout, prev;
2438
2439 if (m->m_type != DEV_IOCTL_S )
2440 return EINVAL;
2441
2442 if (m->REQUEST == DIOCTIMEOUT) {
2443 if(safe) {
2444 r= sys_safecopyfrom(m->IO_ENDPT, (vir_bytes) m->IO_GRANT,
2445 0, (vir_bytes)&timeout, sizeof(timeout), D);
2446 } else {
2447 r= sys_datacopy(m->IO_ENDPT, (vir_bytes)m->ADDRESS,
2448 SELF, (vir_bytes)&timeout, sizeof(timeout));
2449 }
2450
2451 if(r != OK)
2452 return r;
2453
2454 if (timeout == 0) {
2455 /* Restore defaults. */
2456 timeout_ticks = DEF_TIMEOUT_TICKS;
2457 max_errors = MAX_ERRORS;
2458 wakeup_ticks = WAKEUP_TICKS;
2459 w_silent = 0;
2460 } else if (timeout < 0) {
2461 return EINVAL;
2462 } else {
2463 prev = wakeup_ticks;
2464
2465 if (!w_standard_timeouts) {
2466 /* Set (lower) timeout, lower error
2467 * tolerance and set silent mode.
2468 */
2469 wakeup_ticks = timeout;
2470 max_errors = 3;
2471 w_silent = 1;
2472
2473 if (timeout_ticks > timeout)
2474 timeout_ticks = timeout;
2475 }
2476
2477 if(safe) {
2478 r= sys_safecopyto(m->IO_ENDPT,
2479 (vir_bytes) m->IO_GRANT,
2480 0, (vir_bytes)&prev, sizeof(prev), D);
2481 } else {
2482 r=sys_datacopy(SELF, (vir_bytes)&prev,
2483 m->IO_ENDPT, (vir_bytes)m->ADDRESS,
2484 sizeof(prev));
2485 }
2486
2487 if(r != OK)
2488 return r;
2489 }
2490
2491 return OK;
2492 } else if (m->REQUEST == DIOCOPENCT) {
2493 int count;
2494 if (w_prepare(m->DEVICE) == NIL_DEV) return ENXIO;
2495 count = w_wn->open_ct;
2496 if(safe) {
2497 r= sys_safecopyto(m->IO_ENDPT, (vir_bytes) m->IO_GRANT,
2498 0, (vir_bytes)&count, sizeof(count), D);
2499 } else {
2500 r=sys_datacopy(SELF, (vir_bytes)&count,
2501 m->IO_ENDPT, (vir_bytes)m->ADDRESS, sizeof(count));
2502 }
2503
2504 if(r != OK)
2505 return r;
2506
2507 return OK;
2508 }
2509 return EINVAL;
2510 }
2511
2512 /*===========================================================================*
2513 * w_hw_int *
2514 *===========================================================================*/
2515 PRIVATE int w_hw_int(dr, m)
2516 struct driver *dr;
2517 message *m;
2518 {
2519 /* Leftover interrupt(s) received; ack it/them. */
2520 ack_irqs(m->NOTIFY_ARG);
2521
2522 return OK;
2523 }
2524
2525
2526 /*===========================================================================*
2527 * ack_irqs *
2528 *===========================================================================*/
2529 PRIVATE void ack_irqs(unsigned int irqs)
2530 {
2531 unsigned int drive;
2532 unsigned long w_status;
2533
2534 for (drive = 0; drive < MAX_DRIVES && irqs; drive++) {
2535 if (!(wini[drive].state & IGNORING) && wini[drive].irq_need_ack &&
2536 (wini[drive].irq_mask & irqs)) {
2537 if (sys_inb((wini[drive].base_cmd + REG_STATUS),
2538 &w_status) != OK)
2539 {
2540 panic(w_name(), "couldn't ack irq on drive %d\n",
2541 drive);
2542 }
2543 wini[drive].w_status= w_status;
2544 if (sys_irqenable(&wini[drive].irq_hook_id) != OK)
2545 printf("couldn't re-enable drive %d\n", drive);
2546 irqs &= ~wini[drive].irq_mask;
2547 }
2548 }
2549 }
2550
2551
2552 #define STSTR(a) if (status & STATUS_ ## a) { strcat(str, #a); strcat(str, " "); }
2553 #define ERRSTR(a) if (e & ERROR_ ## a) { strcat(str, #a); strcat(str, " "); }
2554 char *strstatus(int status)
2555 {
2556 static char str[200];
2557 str[0] = '\0';
2558
2559 STSTR(BSY);
2560 STSTR(DRDY);
2561 STSTR(DMADF);
2562 STSTR(SRVCDSC);
2563 STSTR(DRQ);
2564 STSTR(CORR);
2565 STSTR(CHECK);
2566 return str;
2567 }
2568
2569 char *strerr(int e)
2570 {
2571 static char str[200];
2572 str[0] = '\0';
2573
2574 ERRSTR(BB);
2575 ERRSTR(ECC);
2576 ERRSTR(ID);
2577 ERRSTR(AC);
2578 ERRSTR(TK);
2579 ERRSTR(DM);
2580
2581 return str;
2582 }
2583
2584 #if ENABLE_ATAPI
2585
2586 /*===========================================================================*
2587 * atapi_intr_wait *
2588 *===========================================================================*/
2589 PRIVATE int atapi_intr_wait()
2590 {
2591 /* Wait for an interrupt and study the results. Returns a number of bytes
2592 * that need to be transferred, or an error code.
2593 */
2594 struct wini *wn = w_wn;
2595 pvb_pair_t inbyte[4]; /* vector for sys_vinb() */
2596 int s; /* status for sys_vinb() */
2597 int e;
2598 int len;
2599 int irr;
2600 int r;
2601 int phase;
2602
2603 w_intr_wait();
2604
2605 /* Request series of device I/O. */
2606 inbyte[0].port = wn->base_cmd + REG_ERROR;
2607 inbyte[1].port = wn->base_cmd + REG_CNT_LO;
2608 inbyte[2].port = wn->base_cmd + REG_CNT_HI;
2609 inbyte[3].port = wn->base_cmd + REG_IRR;
2610 if ((s=sys_vinb(inbyte, 4)) != OK)
2611 panic(w_name(),"ATAPI failed sys_vinb()", s);
2612 e = inbyte[0].value;
2613 len = inbyte[1].value;
2614 len |= inbyte[2].value << 8;
2615 irr = inbyte[3].value;
2616
2617 #if ATAPI_DEBUG
2618 printf("wn %p S=%x=%s E=%02x=%s L=%04x I=%02x\n", wn, wn->w_status, strstatus(wn->w_status), e, strerr(e), len, irr);
2619 #endif
2620 if (wn->w_status & (STATUS_BSY | STATUS_CHECK)) {
2621 if (atapi_debug) {
2622 printf("atapi fail: S=%x=%s E=%02x=%s L=%04x I=%02x\n", wn->w_status, strstatus(wn->w_status), e, strerr(e), len, irr);
2623 }
2624 return ERR;
2625 }
2626
2627 phase = (wn->w_status & STATUS_DRQ) | (irr & (IRR_COD | IRR_IO));
2628
2629 switch (phase) {
2630 case IRR_COD | IRR_IO:
2631 if (ATAPI_DEBUG) printf("ACD: Phase Command Complete\n");
2632 r = OK;
2633 break;
2634 case 0:
2635 if (ATAPI_DEBUG) printf("ACD: Phase Command Aborted\n");
2636 r = ERR;
2637 break;
2638 case STATUS_DRQ | IRR_COD:
2639 if (ATAPI_DEBUG) printf("ACD: Phase Command Out\n");
2640 r = ERR;
2641 break;
2642 case STATUS_DRQ:
2643 if (ATAPI_DEBUG) printf("ACD: Phase Data Out %d\n", len);
2644 r = len;
2645 break;
2646 case STATUS_DRQ | IRR_IO:
2647 if (ATAPI_DEBUG) printf("ACD: Phase Data In %d\n", len);
2648 r = len;
2649 break;
2650 default:
2651 if (ATAPI_DEBUG) printf("ACD: Phase Unknown\n");
2652 r = ERR;
2653 break;
2654 }
2655
2656 #if 0
2657 /* retry if the media changed */
2658 XXX while (phase == (IRR_IO | IRR_COD) && (wn->w_status & STATUS_CHECK)
2659 && (e & ERROR_SENSE) == SENSE_UATTN && --try > 0);
2660 #endif
2661
2662 wn->w_status |= STATUS_ADMBSY; /* Assume not done yet. */
2663 return(r);
2664 }
2665
2666 #endif /* ENABLE_ATAPI */
2667
2668 #undef sys_voutb
2669 #undef sys_vinb
2670
2671 PRIVATE int at_voutb(int line, pvb_pair_t *pvb, int n)
2672 {
2673 int s, i;
2674 if ((s=sys_voutb(pvb,n)) == OK)
2675 return OK;
2676 printf("at_wini%d: sys_voutb failed: %d pvb (%d):\n", w_instance, s, n);
2677 for(i = 0; i < n; i++)
2678 printf("%2d: %4x -> %4x\n", i, pvb[i].value, pvb[i].port);
2679 panic(w_name(), "sys_voutb failed", NO_NUM);
2680 }
2681
2682 PRIVATE int at_vinb(int line, pvb_pair_t *pvb, int n)
2683 {
2684 int s, i;
2685 if ((s=sys_vinb(pvb,n)) == OK)
2686 return OK;
2687 printf("at_wini%d: sys_vinb failed: %d pvb (%d):\n", w_instance, s, n);
2688 for(i = 0; i < n; i++)
2689 printf("%2d: %4x\n", i, pvb[i].port);
2690 panic(w_name(), "sys_vinb failed", NO_NUM);
2691 }
2692
2693 PRIVATE int at_out(int line, u32_t port, u32_t value,
2694 char *typename, int type)
2695 {
2696 int s;
2697 s = sys_out(port, value, type);
2698 if(s == OK)
2699 return OK;
2700 printf("at_wini%d: line %d: %s failed: %d; %x -> %x\n",
2701 w_instance, line, typename, s, value, port);
2702 panic(w_name(), "sys_out failed", NO_NUM);
2703 }
2704
2705
2706 PRIVATE int at_in(int line, u32_t port, u32_t *value,
2707 char *typename, int type)
2708 {
2709 int s;
2710 s = sys_in(port, value, type);
2711 if(s == OK)
2712 return OK;
2713 printf("at_wini%d: line %d: %s failed: %d; port %x\n",
2714 w_instance, line, typename, s, value, port);
2715 panic(w_name(), "sys_out failed", NO_NUM);
2716 }
2717
2718 #undef panic
2719 PRIVATE void at_panic(line, h, msg, n)
2720 int line;
2721 char *h;
2722 char *msg;
2723 int n;
2724 {
2725 printf("at_wini%d: panic at line %d: %s: %s %d\n",
2726 w_instance, line, h, msg, n);
2727 while(1);
2728 }
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