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[minix3.git] / sys / arch / arm / include / mutex.h
blob58b43f0697d53eb546bb1eef8cb3d746ce122990
1 /* $NetBSD: mutex.h,v 1.13 2012/09/25 05:24:00 matt Exp $ */
3 /*-
4 * Copyright (c) 2002, 2007 The NetBSD Foundation, Inc.
5 * All rights reserved.
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe and Andrew Doran.
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
32 #ifndef _ARM_MUTEX_H_
33 #define _ARM_MUTEX_H_
36 * The ARM mutex implementation is troublesome, because pre-v6 ARM lacks a
37 * compare-and-swap operation. However, there aren't any MP pre-v6 ARM
38 * systems to speak of. We are mostly concerned with atomicity with respect
39 * to interrupts.
41 * ARMv6, however, does have ldrex/strex, and can thus implement an MP-safe
42 * compare-and-swap.
44 * So, what we have done is impement simple mutexes using a compare-and-swap.
45 * We support pre-ARMv6 by implementing CAS as a restartable atomic sequence
46 * that is checked by the IRQ vector. MP-safe ARMv6 support will be added later.
49 #ifndef __MUTEX_PRIVATE
51 struct kmutex {
52 uintptr_t mtx_pad1;
55 #else /* __MUTEX_PRIVATE */
57 struct kmutex {
58 union {
59 /* Adaptive mutex */
60 volatile uintptr_t mtxa_owner; /* 0-3 */
62 /* Spin mutex */
63 struct {
65 * Since the low bit of mtax_owner is used to flag this
66 * mutex as a spin mutex, we can't use the first byte
67 * or the last byte to store the ipl or lock values.
69 volatile uint8_t mtxs_dummy;
70 ipl_cookie_t mtxs_ipl;
71 __cpu_simple_lock_t mtxs_lock;
72 volatile uint8_t mtxs_unused;
73 } s;
74 } u;
77 #define mtx_owner u.mtxa_owner
78 #define mtx_ipl u.s.mtxs_ipl
79 #define mtx_lock u.s.mtxs_lock
81 #if 0
82 #define __HAVE_MUTEX_STUBS 1
83 #define __HAVE_SPIN_MUTEX_STUBS 1
84 #endif
85 #define __HAVE_SIMPLE_MUTEXES 1
88 * MUTEX_RECEIVE: no memory barrier required; we're synchronizing against
89 * interrupts, not multiple processors.
91 #define MUTEX_RECEIVE(mtx) /* nothing */
94 * MUTEX_GIVE: no memory barrier required; same reason.
96 #define MUTEX_GIVE(mtx) /* nothing */
98 #define MUTEX_CAS(p, o, n) \
99 (atomic_cas_ulong((volatile unsigned long *)(p), (o), (n)) == (o))
100 #ifdef MULTIPROCESSOR
101 #define MUTEX_SMT_PAUSE() __asm __volatile("wfe")
102 #define MUTEX_SMT_WAKE() __asm __volatile("sev")
103 #endif
105 #endif /* __MUTEX_PRIVATE */
107 #endif /* _ARM_MUTEX_H_ */