Remove building with NOCRYPTO option
[minix3.git] / minix / kernel / arch / i386 / apic.h
blob854345c25ad0811869a0eeb4c1d594e8c7f774df
1 #ifndef __APIC_H__
2 #define __APIC_H__
4 #define APIC_ENABLE 0x100
5 #define APIC_FOCUS_DISABLED (1 << 9)
6 #define APIC_SIV 0xFF
8 #define APIC_TDCR_2 0x00
9 #define APIC_TDCR_4 0x01
10 #define APIC_TDCR_8 0x02
11 #define APIC_TDCR_16 0x03
12 #define APIC_TDCR_32 0x08
13 #define APIC_TDCR_64 0x09
14 #define APIC_TDCR_128 0x0a
15 #define APIC_TDCR_1 0x0b
17 #define APIC_LVTT_VECTOR_MASK 0x000000FF
18 #define APIC_LVTT_DS_PENDING (1 << 12)
19 #define APIC_LVTT_MASK (1 << 16)
20 #define APIC_LVTT_TM (1 << 17)
22 #define APIC_LVT_IIPP_MASK 0x00002000
23 #define APIC_LVT_IIPP_AH 0x00002000
24 #define APIC_LVT_IIPP_AL 0x00000000
26 #define IOAPIC_REGSEL 0x0
27 #define IOAPIC_RW 0x10
29 #define APIC_ICR_DM_MASK 0x00000700
30 #define APIC_ICR_VECTOR APIC_LVTT_VECTOR_MASK
31 #define APIC_ICR_DM_FIXED (0 << 8)
32 #define APIC_ICR_DM_LOWEST_PRIORITY (1 << 8)
33 #define APIC_ICR_DM_SMI (2 << 8)
34 #define APIC_ICR_DM_RESERVED (3 << 8)
35 #define APIC_ICR_DM_NMI (4 << 8)
36 #define APIC_ICR_DM_INIT (5 << 8)
37 #define APIC_ICR_DM_STARTUP (6 << 8)
38 #define APIC_ICR_DM_EXTINT (7 << 8)
40 #define APIC_ICR_DM_PHYSICAL (0 << 11)
41 #define APIC_ICR_DM_LOGICAL (1 << 11)
43 #define APIC_ICR_DELIVERY_PENDING (1 << 12)
45 #define APIC_ICR_INT_POLARITY (1 << 13)
47 #define APIC_ICR_LEVEL_ASSERT (1 << 14)
48 #define APIC_ICR_LEVEL_DEASSERT (0 << 14)
50 #define APIC_ICR_TRIGGER (1 << 15)
52 #define APIC_ICR_INT_MASK (1 << 16)
54 #define APIC_ICR_DEST_FIELD (0 << 18)
55 #define APIC_ICR_DEST_SELF (1 << 18)
56 #define APIC_ICR_DEST_ALL (2 << 18)
57 #define APIC_ICR_DEST_ALL_BUT_SELF (3 << 18)
59 #define LOCAL_APIC_DEF_ADDR 0xfee00000 /* default local apic address */
60 #define IO_APIC_DEF_ADDR 0xfec00000 /* default i/o apic address */
62 #define LAPIC_ID (lapic_addr + 0x020)
63 #define LAPIC_VERSION (lapic_addr + 0x030)
64 #define LAPIC_TPR (lapic_addr + 0x080)
65 #define LAPIC_EOI (lapic_addr + 0x0b0)
66 #define LAPIC_LDR (lapic_addr + 0x0d0)
67 #define LAPIC_DFR (lapic_addr + 0x0e0)
68 #define LAPIC_SIVR (lapic_addr + 0x0f0)
69 #define LAPIC_ISR (lapic_addr + 0x100)
70 #define LAPIC_TMR (lapic_addr + 0x180)
71 #define LAPIC_IRR (lapic_addr + 0x200)
72 #define LAPIC_ESR (lapic_addr + 0x280)
73 #define LAPIC_ICR1 (lapic_addr + 0x300)
74 #define LAPIC_ICR2 (lapic_addr + 0x310)
75 #define LAPIC_LVTTR (lapic_addr + 0x320)
76 #define LAPIC_LVTTMR (lapic_addr + 0x330)
77 #define LAPIC_LVTPCR (lapic_addr + 0x340)
78 #define LAPIC_LINT0 (lapic_addr + 0x350)
79 #define LAPIC_LINT1 (lapic_addr + 0x360)
80 #define LAPIC_LVTER (lapic_addr + 0x370)
81 #define LAPIC_TIMER_ICR (lapic_addr + 0x380)
82 #define LAPIC_TIMER_CCR (lapic_addr + 0x390)
83 #define LAPIC_TIMER_DCR (lapic_addr + 0x3e0)
85 #define IOAPIC_ID 0x0
86 #define IOAPIC_VERSION 0x1
87 #define IOAPIC_ARB 0x2
88 #define IOAPIC_REDIR_TABLE 0x10
90 #define APIC_TIMER_INT_VECTOR 0xf0
91 #define APIC_SMP_SCHED_PROC_VECTOR 0xf1
92 #define APIC_SMP_CPU_HALT_VECTOR 0xf2
93 #define APIC_ERROR_INT_VECTOR 0xfe
94 #define APIC_SPURIOUS_INT_VECTOR 0xff
96 #ifndef __ASSEMBLY__
98 #include "kernel/kernel.h"
100 EXTERN vir_bytes lapic_addr;
101 EXTERN vir_bytes lapic_eoi_addr;
102 EXTERN int ioapic_enabled;
103 EXTERN int bsp_lapic_id;
105 #define MAX_NR_IOAPICS 32
106 #define MAX_IOAPIC_IRQS 64
108 EXTERN int ioapic_enabled;
110 struct io_apic {
111 unsigned id;
112 vir_bytes addr; /* presently used address */
113 phys_bytes paddr; /* where is it in phys space */
114 vir_bytes vaddr; /* address after paging is on */
115 unsigned pins;
116 unsigned gsi_base;
119 EXTERN struct io_apic io_apic[MAX_NR_IOAPICS];
120 EXTERN unsigned nioapics;
122 EXTERN u32_t lapic_addr_vaddr; /* we remember the virtual address here until we
123 switch to paging */
125 int lapic_enable(unsigned cpu);
126 void ioapic_unmask_irq(unsigned irq);
127 void ioapic_mask_irq(unsigned irq);
128 void ioapic_reset_pic(void);
130 EXTERN int ioapic_enabled;
131 EXTERN unsigned nioapics;
133 void lapic_microsec_sleep(unsigned count);
134 void ioapic_disable_irqs(u32_t irqs);
135 void ioapic_enable_irqs(u32_t irqs);
137 int lapic_enable(unsigned cpu);
138 void lapic_disable(void);
140 void ioapic_disable_all(void);
141 int ioapic_enable_all(void);
143 int detect_ioapics(void);
144 void apic_idt_init(int reset);
146 #ifdef CONFIG_SMP
147 int apic_send_startup_ipi(unsigned cpu, phys_bytes trampoline);
148 int apic_send_init_ipi(unsigned cpu, phys_bytes trampoline);
149 unsigned int apicid(void);
150 void ioapic_set_id(u32_t addr, unsigned int id);
151 #else
152 int apic_single_cpu_init(void);
153 #endif
155 void lapic_set_timer_periodic(const unsigned freq);
156 void lapic_set_timer_one_shot(const u32_t value);
157 void lapic_stop_timer(void);
158 void lapic_restart_timer(void);
160 void ioapic_set_irq(unsigned irq);
161 void ioapic_unset_irq(unsigned irq);
163 /* signal the end of interrupt handler to apic */
164 #define apic_eoi() do { *((volatile u32_t *) lapic_eoi_addr) = 0; } while(0)
166 void ioapic_eoi(int irq);
168 void dump_apic_irq_state(void);
170 void apic_send_ipi(unsigned vector, unsigned cpu, int type);
172 void apic_ipi_sched_intr(void);
173 void apic_ipi_halt_intr(void);
175 #define APIC_IPI_DEST 0
176 #define APIC_IPI_SELF 1
177 #define APIC_IPI_TO_ALL 2
178 #define APIC_IPI_TO_ALL_BUT_SELF 3
180 #define apic_send_ipi_single(vector,cpu) \
181 apic_send_ipi(vector, cpu, APIC_IPI_DEST);
182 #define apic_send_ipi_self(vector) \
183 apic_send_ipi(vector, 0, APIC_IPI_SELF)
184 #define apic_send_ipi_all(vector) \
185 apic_send_ipi (vector, 0, APIC_IPI_TO_ALL)
186 #define apic_send_ipi_allbutself(vector) \
187 apic_send_ipi (vector, 0, APIC_IPI_TO_ALL_BUT_SELF);
190 #include <minix/cpufeature.h>
192 #define cpu_feature_apic_on_chip() _cpufeature(_CPUF_I386_APIC_ON_CHIP)
194 #define lapic_read(what) (*((volatile u32_t *)((what))))
195 #define lapic_write(what, data) do { \
196 (*((volatile u32_t *)((what)))) = data; \
197 } while(0)
199 #endif /* __ASSEMBLY__ */
201 #endif /* __APIC_H__ */