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Merge of VFS by Balasz Gerofi with Minix trunk.
[minix3.git] / drivers / at_wini / at_wini.c
blob846580207df066240cb78269763d70f459ed5353
1 /* This file contains the device dependent part of a driver for the IBM-AT
2 * winchester controller. Written by Adri Koppes.
3 *
4 * The file contains one entry point:
5 *
6 * at_winchester_task: main entry when system is brought up
7 *
8 * Changes:
9 * Aug 19, 2005 ATA PCI support, supports SATA (Ben Gras)
10 * Nov 18, 2004 moved AT disk driver to user-space (Jorrit N. Herder)
11 * Aug 20, 2004 watchdogs replaced by sync alarms (Jorrit N. Herder)
12 * Mar 23, 2000 added ATAPI CDROM support (Michael Temari)
13 * May 14, 2000 d-d/i rewrite (Kees J. Bot)
14 * Apr 13, 1992 device dependent/independent split (Kees J. Bot)
15 */
16
17 #include "at_wini.h"
18
19 #include <minix/sysutil.h>
20 #include <minix/keymap.h>
21 #include <sys/ioc_disk.h>
22 #include <ibm/pci.h>
23
24 #define ATAPI_DEBUG 0 /* To debug ATAPI code. */
25
26 /* I/O Ports used by winchester disk controllers. */
27
28 /* Read and write registers */
29 #define REG_CMD_BASE0 0x1F0 /* command base register of controller 0 */
30 #define REG_CMD_BASE1 0x170 /* command base register of controller 1 */
31 #define REG_CTL_BASE0 0x3F6 /* control base register of controller 0 */
32 #define REG_CTL_BASE1 0x376 /* control base register of controller 1 */
33
34 #define PCI_CTL_OFF 2 /* Offset of control registers from BAR2 */
35 #define PCI_DMA_2ND_OFF 8 /* Offset of DMA registers from BAR4 for
36 * secondary channel
37 */
38
39 #define REG_DATA 0 /* data register (offset from the base reg.) */
40 #define REG_PRECOMP 1 /* start of write precompensation */
41 #define REG_COUNT 2 /* sectors to transfer */
42 #define REG_SECTOR 3 /* sector number */
43 #define REG_CYL_LO 4 /* low byte of cylinder number */
44 #define REG_CYL_HI 5 /* high byte of cylinder number */
45 #define REG_LDH 6 /* lba, drive and head */
46 #define LDH_DEFAULT 0xA0 /* ECC enable, 512 bytes per sector */
47 #define LDH_LBA 0x40 /* Use LBA addressing */
48 #define LDH_DEV 0x10 /* Drive 1 iff set */
49 #define ldh_init(drive) (LDH_DEFAULT | ((drive) << 4))
50
51 /* Read only registers */
52 #define REG_STATUS 7 /* status */
53 #define STATUS_BSY 0x80 /* controller busy */
54 #define STATUS_RDY 0x40 /* drive ready */
55 #define STATUS_WF 0x20 /* write fault */
56 #define STATUS_SC 0x10 /* seek complete (obsolete) */
57 #define STATUS_DRQ 0x08 /* data transfer request */
58 #define STATUS_CRD 0x04 /* corrected data */
59 #define STATUS_IDX 0x02 /* index pulse */
60 #define STATUS_ERR 0x01 /* error */
61 #define STATUS_ADMBSY 0x100 /* administratively busy (software) */
62 #define REG_ERROR 1 /* error code */
63 #define ERROR_BB 0x80 /* bad block */
64 #define ERROR_ECC 0x40 /* bad ecc bytes */
65 #define ERROR_ID 0x10 /* id not found */
66 #define ERROR_AC 0x04 /* aborted command */
67 #define ERROR_TK 0x02 /* track zero error */
68 #define ERROR_DM 0x01 /* no data address mark */
69
70 /* Write only registers */
71 #define REG_COMMAND 7 /* command */
72 #define CMD_IDLE 0x00 /* for w_command: drive idle */
73 #define CMD_RECALIBRATE 0x10 /* recalibrate drive */
74 #define CMD_READ 0x20 /* read data */
75 #define CMD_READ_EXT 0x24 /* read data (LBA48 addressed) */
76 #define CMD_READ_DMA_EXT 0x25 /* read data using DMA (w/ LBA48) */
77 #define CMD_WRITE 0x30 /* write data */
78 #define CMD_WRITE_EXT 0x34 /* write data (LBA48 addressed) */
79 #define CMD_WRITE_DMA_EXT 0x35 /* write data using DMA (w/ LBA48) */
80 #define CMD_READVERIFY 0x40 /* read verify */
81 #define CMD_FORMAT 0x50 /* format track */
82 #define CMD_SEEK 0x70 /* seek cylinder */
83 #define CMD_DIAG 0x90 /* execute device diagnostics */
84 #define CMD_SPECIFY 0x91 /* specify parameters */
85 #define CMD_READ_DMA 0xC8 /* read data using DMA */
86 #define CMD_WRITE_DMA 0xCA /* write data using DMA */
87 #define ATA_IDENTIFY 0xEC /* identify drive */
88 /* #define REG_CTL 0x206 */ /* control register */
89 #define REG_CTL 0 /* control register */
90 #define CTL_NORETRY 0x80 /* disable access retry */
91 #define CTL_NOECC 0x40 /* disable ecc retry */
92 #define CTL_EIGHTHEADS 0x08 /* more than eight heads */
93 #define CTL_RESET 0x04 /* reset controller */
94 #define CTL_INTDISABLE 0x02 /* disable interrupts */
95 #define REG_CTL_ALTSTAT 0 /* alternate status register */
96
97 /* Identify words */
98 #define ID_GENERAL 0x00 /* General configuration information */
99 #define ID_GEN_NOT_ATA 0x8000 /* Not an ATA device */
100 #define ID_CAPABILITIES 0x31 /* Capabilities (49)*/
101 #define ID_CAP_LBA 0x0200 /* LBA supported */
102 #define ID_CAP_DMA 0x0100 /* DMA supported */
103 #define ID_FIELD_VALIDITY 0x35 /* Field Validity (53) */
104 #define ID_FV_88 0x04 /* Word 88 is valid (UDMA) */
105 #define ID_MULTIWORD_DMA 0x3f /* Multiword DMA (63) */
106 #define ID_MWDMA_2_SEL 0x0400 /* Mode 2 is selected */
107 #define ID_MWDMA_1_SEL 0x0200 /* Mode 1 is selected */
108 #define ID_MWDMA_0_SEL 0x0100 /* Mode 0 is selected */
109 #define ID_MWDMA_2_SUP 0x0004 /* Mode 2 is supported */
110 #define ID_MWDMA_1_SUP 0x0002 /* Mode 1 is supported */
111 #define ID_MWDMA_0_SUP 0x0001 /* Mode 0 is supported */
112 #define ID_CSS 0x53 /* Command Sets Supported (83) */
113 #define ID_CSS_LBA48 0x0400
114 #define ID_ULTRA_DMA 0x58 /* Ultra DMA (88) */
115 #define ID_UDMA_5_SEL 0x2000 /* Mode 5 is selected */
116 #define ID_UDMA_4_SEL 0x1000 /* Mode 4 is selected */
117 #define ID_UDMA_3_SEL 0x0800 /* Mode 3 is selected */
118 #define ID_UDMA_2_SEL 0x0400 /* Mode 2 is selected */
119 #define ID_UDMA_1_SEL 0x0200 /* Mode 1 is selected */
120 #define ID_UDMA_0_SEL 0x0100 /* Mode 0 is selected */
121 #define ID_UDMA_5_SUP 0x0020 /* Mode 5 is supported */
122 #define ID_UDMA_4_SUP 0x0010 /* Mode 4 is supported */
123 #define ID_UDMA_3_SUP 0x0008 /* Mode 3 is supported */
124 #define ID_UDMA_2_SUP 0x0004 /* Mode 2 is supported */
125 #define ID_UDMA_1_SUP 0x0002 /* Mode 1 is supported */
126 #define ID_UDMA_0_SUP 0x0001 /* Mode 0 is supported */
127
128 /* DMA registers */
129 #define DMA_COMMAND 0 /* Command register */
130 #define DMA_CMD_WRITE 0x08 /* PCI bus master writes */
131 #define DMA_CMD_START 0x01 /* Start Bus Master */
132 #define DMA_STATUS 2 /* Status register */
133 #define DMA_ST_D1_DMACAP 0x40 /* Drive 1 is DMA capable */
134 #define DMA_ST_D0_DMACAP 0x20 /* Drive 0 is DMA capable */
135 #define DMA_ST_INT 0x04 /* Interrupt */
136 #define DMA_ST_ERROR 0x02 /* Error */
137 #define DMA_ST_BM_ACTIVE 0x01 /* Bus Master IDE Active */
138 #define DMA_PRDTP 4 /* PRD Table Pointer */
139
140 /* Check for the presence of LBA48 only on drives that are 'big'. */
141 #define LBA48_CHECK_SIZE 0x0f000000
142 #define LBA_MAX_SIZE 0x0fffffff /* Highest sector size for
143 * regular LBA.
144 */
145
146 #if ENABLE_ATAPI
147 #define ERROR_SENSE 0xF0 /* sense key mask */
148 #define SENSE_NONE 0x00 /* no sense key */
149 #define SENSE_RECERR 0x10 /* recovered error */
150 #define SENSE_NOTRDY 0x20 /* not ready */
151 #define SENSE_MEDERR 0x30 /* medium error */
152 #define SENSE_HRDERR 0x40 /* hardware error */
153 #define SENSE_ILRQST 0x50 /* illegal request */
154 #define SENSE_UATTN 0x60 /* unit attention */
155 #define SENSE_DPROT 0x70 /* data protect */
156 #define SENSE_ABRT 0xb0 /* aborted command */
157 #define SENSE_MISCOM 0xe0 /* miscompare */
158 #define ERROR_MCR 0x08 /* media change requested */
159 #define ERROR_ABRT 0x04 /* aborted command */
160 #define ERROR_EOM 0x02 /* end of media detected */
161 #define ERROR_ILI 0x01 /* illegal length indication */
162 #define REG_FEAT 1 /* features */
163 #define FEAT_OVERLAP 0x02 /* overlap */
164 #define FEAT_DMA 0x01 /* dma */
165 #define REG_IRR 2 /* interrupt reason register */
166 #define IRR_REL 0x04 /* release */
167 #define IRR_IO 0x02 /* direction for xfer */
168 #define IRR_COD 0x01 /* command or data */
169 #define REG_SAMTAG 3
170 #define REG_CNT_LO 4 /* low byte of cylinder number */
171 #define REG_CNT_HI 5 /* high byte of cylinder number */
172 #define REG_DRIVE 6 /* drive select */
173 #endif
174
175 #define REG_STATUS 7 /* status */
176 #define STATUS_BSY 0x80 /* controller busy */
177 #define STATUS_DRDY 0x40 /* drive ready */
178 #define STATUS_DMADF 0x20 /* dma ready/drive fault */
179 #define STATUS_SRVCDSC 0x10 /* service or dsc */
180 #define STATUS_DRQ 0x08 /* data transfer request */
181 #define STATUS_CORR 0x04 /* correctable error occurred */
182 #define STATUS_CHECK 0x01 /* check error */
183
184 #ifdef ENABLE_ATAPI
185 #define ATAPI_PACKETCMD 0xA0 /* packet command */
186 #define ATAPI_IDENTIFY 0xA1 /* identify drive */
187 #define SCSI_READ10 0x28 /* read from disk */
188 #define SCSI_SENSE 0x03 /* sense request */
189
190 #define CD_SECTOR_SIZE 2048 /* sector size of a CD-ROM */
191 #endif /* ATAPI */
192
193 /* Interrupt request lines. */
194 #define NO_IRQ 0 /* no IRQ set yet */
195
196 #define ATAPI_PACKETSIZE 12
197 #define SENSE_PACKETSIZE 18
198
199 /* Common command block */
200 struct command {
201 u8_t precomp; /* REG_PRECOMP, etc. */
202 u8_t count;
203 u8_t sector;
204 u8_t cyl_lo;
205 u8_t cyl_hi;
206 u8_t ldh;
207 u8_t command;
208
209 /* The following at for LBA48 */
210 u8_t count_prev;
211 u8_t sector_prev;
212 u8_t cyl_lo_prev;
213 u8_t cyl_hi_prev;
214 };
215
216 /* Error codes */
217 #define ERR (-1) /* general error */
218 #define ERR_BAD_SECTOR (-2) /* block marked bad detected */
219
220 /* Some controllers don't interrupt, the clock will wake us up. */
221 #define WAKEUP (32*HZ) /* drive may be out for 31 seconds max */
222
223 /* Miscellaneous. */
224 #define MAX_DRIVES 8
225 #define COMPAT_DRIVES 4
226 #if _WORD_SIZE > 2
227 #define MAX_SECS 256 /* controller can transfer this many sectors */
228 #else
229 #define MAX_SECS 127 /* but not to a 16 bit process */
230 #endif
231 #define MAX_ERRORS 4 /* how often to try rd/wt before quitting */
232 #define NR_MINORS (MAX_DRIVES * DEV_PER_DRIVE)
233 #define SUB_PER_DRIVE (NR_PARTITIONS * NR_PARTITIONS)
234 #define NR_SUBDEVS (MAX_DRIVES * SUB_PER_DRIVE)
235 #define DELAY_USECS 1000 /* controller timeout in microseconds */
236 #define DELAY_TICKS 1 /* controller timeout in ticks */
237 #define DEF_TIMEOUT_TICKS 300 /* controller timeout in ticks */
238 #define RECOVERY_USECS 500000 /* controller recovery time in microseconds */
239 #define RECOVERY_TICKS 30 /* controller recovery time in ticks */
240 #define INITIALIZED 0x01 /* drive is initialized */
241 #define DEAF 0x02 /* controller must be reset */
242 #define SMART 0x04 /* drive supports ATA commands */
243 #if ENABLE_ATAPI
244 #define ATAPI 0x08 /* it is an ATAPI device */
245 #else
246 #define ATAPI 0 /* don't bother with ATAPI; optimise out */
247 #endif
248 #define IDENTIFIED 0x10 /* w_identify done successfully */
249 #define IGNORING 0x20 /* w_identify failed once */
250
251 /* Timeouts and max retries. */
252 int timeout_ticks = DEF_TIMEOUT_TICKS, max_errors = MAX_ERRORS;
253 int wakeup_ticks = WAKEUP;
254 long w_standard_timeouts = 0, w_pci_debug = 0, w_instance = 0,
255 disable_dma = 0, atapi_debug = 0;
256
257 int w_testing = 0, w_silent = 0;
258
259 int w_next_drive = 0;
260
261 /* Variables. */
262
263 /* The struct wini is indexed by controller first, then drive (0-3).
264 * Controller 0 is always the 'compatability' ide controller, at
265 * the fixed locations, whether present or not.
266 */
267 PRIVATE struct wini { /* main drive struct, one entry per drive */
268 unsigned state; /* drive state: deaf, initialized, dead */
269 unsigned short w_status; /* device status register */
270 unsigned base_cmd; /* command base register */
271 unsigned base_ctl; /* control base register */
272 unsigned base_dma; /* dma base register */
273 unsigned irq; /* interrupt request line */
274 unsigned irq_mask; /* 1 << irq */
275 unsigned irq_need_ack; /* irq needs to be acknowledged */
276 int irq_hook_id; /* id of irq hook at the kernel */
277 int lba48; /* supports lba48 */
278 int dma; /* supports dma */
279 unsigned lcylinders; /* logical number of cylinders (BIOS) */
280 unsigned lheads; /* logical number of heads */
281 unsigned lsectors; /* logical number of sectors per track */
282 unsigned pcylinders; /* physical number of cylinders (translated) */
283 unsigned pheads; /* physical number of heads */
284 unsigned psectors; /* physical number of sectors per track */
285 unsigned ldhpref; /* top four bytes of the LDH (head) register */
286 unsigned precomp; /* write precompensation cylinder / 4 */
287 unsigned max_count; /* max request for this drive */
288 unsigned open_ct; /* in-use count */
289 struct device part[DEV_PER_DRIVE]; /* disks and partitions */
290 struct device subpart[SUB_PER_DRIVE]; /* subpartitions */
291 } wini[MAX_DRIVES], *w_wn;
292
293 PRIVATE int w_device = -1;
294 PRIVATE int w_controller = -1;
295 PRIVATE int w_major = -1;
296 PRIVATE char w_id_string[40];
297
298 PRIVATE int win_tasknr; /* my task number */
299 PRIVATE int w_command; /* current command in execution */
300 PRIVATE u8_t w_byteval; /* used for SYS_IRQCTL */
301 PRIVATE int w_drive; /* selected drive */
302 PRIVATE int w_controller; /* selected controller */
303 PRIVATE struct device *w_dv; /* device's base and size */
304
305 /* Unfortunately, DMA_SECTORS and DMA_BUF_SIZE are already defined libdriver
306 * for 'tmp_buf'.
307 */
308 #define ATA_DMA_SECTORS 64
309 #define ATA_DMA_BUF_SIZE (ATA_DMA_SECTORS*SECTOR_SIZE)
310
311 PRIVATE char dma_buf[ATA_DMA_BUF_SIZE];
312 PRIVATE phys_bytes dma_buf_phys;
313
314 #define N_PRDTE 1024 /* Should be enough for large requests */
315
316 PRIVATE struct prdte
317 {
318 u32_t prdte_base;
319 u16_t prdte_count;
320 u8_t prdte_reserved;
321 u8_t prdte_flags;
322 } prdt[N_PRDTE];
323 PRIVATE phys_bytes prdt_phys;
324
325 #define PRDTE_FL_EOT 0x80 /* End of table */
326
327 /* Some IDE devices announce themselves as RAID controllers */
328 PRIVATE struct
329 {
330 u16_t vendor;
331 u16_t device;
332 } raid_table[]=
333 {
334 { 0x1106, 0x3149 }, /* VIA VT6420 */
335 { 0, 0 } /* end of list */
336 };
337
338 FORWARD _PROTOTYPE( void init_params, (void) );
339 FORWARD _PROTOTYPE( void init_drive, (struct wini *w, int base_cmd,
340 int base_ctl, int base_dma, int irq, int ack, int hook,
341 int drive) );
342 FORWARD _PROTOTYPE( void init_params_pci, (int) );
343 FORWARD _PROTOTYPE( int w_do_open, (struct driver *dp, message *m_ptr) );
344 FORWARD _PROTOTYPE( struct device *w_prepare, (int dev) );
345 FORWARD _PROTOTYPE( int w_identify, (void) );
346 FORWARD _PROTOTYPE( char *w_name, (void) );
347 FORWARD _PROTOTYPE( int w_specify, (void) );
348 FORWARD _PROTOTYPE( int w_io_test, (void) );
349 FORWARD _PROTOTYPE( int w_transfer, (int proc_nr, int opcode, off_t position,
350 iovec_t *iov, unsigned nr_req, int safe));
351 FORWARD _PROTOTYPE( int com_out, (struct command *cmd) );
352 FORWARD _PROTOTYPE( int com_out_ext, (struct command *cmd) );
353 FORWARD _PROTOTYPE( void setup_dma, (unsigned *sizep, int proc_nr,
354 iovec_t *iov, int do_write, int *do_copyoutp, int safe) );
355 FORWARD _PROTOTYPE( void w_need_reset, (void) );
356 FORWARD _PROTOTYPE( void ack_irqs, (unsigned int) );
357 FORWARD _PROTOTYPE( int w_do_close, (struct driver *dp, message *m_ptr) );
358 FORWARD _PROTOTYPE( int w_other, (struct driver *dp, message *m_ptr, int));
359 FORWARD _PROTOTYPE( int w_hw_int, (struct driver *dp, message *m_ptr) );
360 FORWARD _PROTOTYPE( int com_simple, (struct command *cmd) );
361 FORWARD _PROTOTYPE( void w_timeout, (void) );
362 FORWARD _PROTOTYPE( int w_reset, (void) );
363 FORWARD _PROTOTYPE( void w_intr_wait, (void) );
364 FORWARD _PROTOTYPE( int at_intr_wait, (void) );
365 FORWARD _PROTOTYPE( int w_waitfor, (int mask, int value) );
366 FORWARD _PROTOTYPE( int w_waitfor_dma, (int mask, int value) );
367 FORWARD _PROTOTYPE( void w_geometry, (struct partition *entry) );
368 #if ENABLE_ATAPI
369 FORWARD _PROTOTYPE( int atapi_sendpacket, (u8_t *packet, unsigned cnt) );
370 FORWARD _PROTOTYPE( int atapi_intr_wait, (void) );
371 FORWARD _PROTOTYPE( int atapi_open, (void) );
372 FORWARD _PROTOTYPE( void atapi_close, (void) );
373 FORWARD _PROTOTYPE( int atapi_transfer, (int proc_nr, int opcode,
374 off_t position, iovec_t *iov, unsigned nr_req, int safe));
375 #endif
376
377 /* Entry points to this driver. */
378 PRIVATE struct driver w_dtab = {
379 w_name, /* current device's name */
380 w_do_open, /* open or mount request, initialize device */
381 w_do_close, /* release device */
382 do_diocntl, /* get or set a partition's geometry */
383 w_prepare, /* prepare for I/O on a given minor device */
384 w_transfer, /* do the I/O */
385 nop_cleanup, /* nothing to clean up */
386 w_geometry, /* tell the geometry of the disk */
387 nop_signal, /* no cleanup needed on shutdown */
388 nop_alarm, /* ignore leftover alarms */
389 nop_cancel, /* ignore CANCELs */
390 nop_select, /* ignore selects */
391 w_other, /* catch-all for unrecognized commands and ioctls */
392 w_hw_int /* leftover hardware interrupts */
393 };
394
395 /*===========================================================================*
396 * at_winchester_task *
397 *===========================================================================*/
398 PUBLIC int main()
399 {
400 /* Install signal handlers. Ask PM to transform signal into message. */
401 struct sigaction sa;
402
403 sa.sa_handler = SIG_MESS;
404 sigemptyset(&sa.sa_mask);
405 sa.sa_flags = 0;
406 if (sigaction(SIGTERM,&sa,NULL)<0) panic("AT","sigaction failed", errno);
407
408 /* Set special disk parameters then call the generic main loop. */
409 init_params();
410 signal(SIGTERM, SIG_IGN);
411 driver_task(&w_dtab);
412 return(OK);
413 }
414
415 /*===========================================================================*
416 * init_params *
417 *===========================================================================*/
418 PRIVATE void init_params()
419 {
420 /* This routine is called at startup to initialize the drive parameters. */
421
422 u16_t parv[2];
423 unsigned int vector, size;
424 int drive, nr_drives;
425 struct wini *wn;
426 u8_t params[16];
427 int s;
428
429 /* Boot variables. */
430 env_parse("ata_std_timeout", "d", 0, &w_standard_timeouts, 0, 1);
431 env_parse("ata_pci_debug", "d", 0, &w_pci_debug, 0, 1);
432 env_parse("ata_instance", "d", 0, &w_instance, 0, 8);
433 env_parse("ata_no_dma", "d", 0, &disable_dma, 0, 1);
434 env_parse("atapi_debug", "d", 0, &atapi_debug, 0, 1);
435
436 if (disable_dma)
437 printf("DMA for ATA devices is disabled.\n");
438
439 s= sys_umap(SELF, D, (vir_bytes)dma_buf, sizeof(dma_buf), &dma_buf_phys);
440 if (s != 0)
441 panic("at_wini", "can't map dma buffer", s);
442
443 s= sys_umap(SELF, D, (vir_bytes)prdt, sizeof(prdt), &prdt_phys);
444 if (s != 0)
445 panic("at_wini", "can't map prd table", s);
446
447 if (w_instance == 0) {
448 /* Get the number of drives from the BIOS data area */
449 s=sys_readbios(NR_HD_DRIVES_ADDR, params, NR_HD_DRIVES_SIZE);
450 if (s != OK)
451 panic(w_name(), "Couldn't read BIOS", s);
452 if ((nr_drives = params[0]) > 2) nr_drives = 2;
453
454 for (drive = 0, wn = wini; drive < COMPAT_DRIVES; drive++, wn++) {
455 if (drive < nr_drives) {
456 /* Copy the BIOS parameter vector */
457 vector = (drive == 0) ? BIOS_HD0_PARAMS_ADDR :
458 BIOS_HD1_PARAMS_ADDR;
459 size = (drive == 0) ? BIOS_HD0_PARAMS_SIZE :
460 BIOS_HD1_PARAMS_SIZE;
461 s=sys_readbios(vector, parv, size);
462 if (s != OK)
463 panic(w_name(), "Couldn't read BIOS", s);
464
465 /* Calculate the address of the parameters and copy them */
466 s=sys_readbios(hclick_to_physb(parv[1]) + parv[0],
467 params, 16L);
468 if (s != OK)
469 panic(w_name(),"Couldn't copy parameters", s);
470
471 /* Copy the parameters to the structures of the drive */
472 wn->lcylinders = bp_cylinders(params);
473 wn->lheads = bp_heads(params);
474 wn->lsectors = bp_sectors(params);
475 wn->precomp = bp_precomp(params) >> 2;
476 }
477
478 /* Fill in non-BIOS parameters. */
479 init_drive(wn,
480 drive < 2 ? REG_CMD_BASE0 : REG_CMD_BASE1,
481 drive < 2 ? REG_CTL_BASE0 : REG_CTL_BASE1,
482 0 /* no DMA */, NO_IRQ, 0, 0, drive);
483 w_next_drive++;
484 }
485 }
486
487 /* Look for controllers on the pci bus. Skip none the first instance,
488 * skip one and then 2 for every instance, for every next instance.
489 */
490 if (w_instance == 0)
491 init_params_pci(0);
492 else
493 init_params_pci(w_instance*2-1);
494
495 }
496
497 #define ATA_IF_NOTCOMPAT1 (1L << 0)
498 #define ATA_IF_NOTCOMPAT2 (1L << 2)
499
500 /*===========================================================================*
501 * init_drive *
502 *===========================================================================*/
503 PRIVATE void init_drive(struct wini *w, int base_cmd, int base_ctl,
504 int base_dma, int irq, int ack, int hook, int drive)
505 {
506 w->state = 0;
507 w->w_status = 0;
508 w->base_cmd = base_cmd;
509 w->base_ctl = base_ctl;
510 w->base_dma = base_dma;
511 w->irq = irq;
512 w->irq_mask = 1 << irq;
513 w->irq_need_ack = ack;
514 w->irq_hook_id = hook;
515 w->ldhpref = ldh_init(drive);
516 w->max_count = MAX_SECS << SECTOR_SHIFT;
517 w->lba48 = 0;
518 w->dma = 0;
519 }
520
521 /*===========================================================================*
522 * init_params_pci *
523 *===========================================================================*/
524 PRIVATE void init_params_pci(int skip)
525 {
526 int i, r, devind, drive;
527 int irq, irq_hook, raid;
528 u8_t bcr, scr, interface;
529 u16_t vid, did;
530 u32_t base_dma, t3;
531
532 pci_init();
533 for(drive = w_next_drive; drive < MAX_DRIVES; drive++)
534 wini[drive].state = IGNORING;
535 for(r = pci_first_dev(&devind, &vid, &did); r != 0;
536 r = pci_next_dev(&devind, &vid, &did)) {
537
538 raid= 0;
539
540 /* Except class 01h (mass storage), subclass be 01h (ATA).
541 * Also check listed RAID controllers.
542 */
543 bcr= pci_attr_r8(devind, PCI_BCR);
544 scr= pci_attr_r8(devind, PCI_SCR);
545 interface= pci_attr_r8(devind, PCI_PIFR);
546 t3= ((bcr << 16) | (scr << 8) | interface);
547 if (bcr == PCI_BCR_MASS_STORAGE && scr == PCI_MS_IDE)
548 ; /* Okay */
549 else if (t3 == PCI_T3_RAID)
550 {
551 for (i= 0; raid_table[i].vendor != 0; i++)
552 {
553 if (raid_table[i].vendor == vid &&
554 raid_table[i].device == did)
555 {
556 break;
557 }
558 }
559 if (raid_table[i].vendor == 0)
560 {
561 printf(
562 "atapci skipping unsupported RAID controller 0x%04x / 0x%04x\n",
563 vid, did);
564 continue;
565 }
566 printf("found supported RAID controller\n");
567 raid= 1;
568 }
569 else
570 continue; /* Unsupported device class */
571
572 /* Found a controller.
573 * Programming interface register tells us more.
574 */
575 irq = pci_attr_r8(devind, PCI_ILR);
576
577 /* Any non-compat drives? */
578 if (raid || (interface & (ATA_IF_NOTCOMPAT1 | ATA_IF_NOTCOMPAT2))) {
579 int s;
580
581 if (w_next_drive >= MAX_DRIVES)
582 {
583 /* We can't accept more drives, but have to search for
584 * controllers operating in compatibility mode.
585 */
586 continue;
587 }
588
589 irq_hook = irq;
590 if (skip > 0) {
591 if (w_pci_debug)
592 {
593 printf(
594 "atapci skipping controller (remain %d)\n",
595 skip);
596 }
597 skip--;
598 continue;
599 }
600 if ((s=sys_irqsetpolicy(irq, 0, &irq_hook)) != OK) {
601 printf("atapci: couldn't set IRQ policy %d\n", irq);
602 continue;
603 }
604 if ((s=sys_irqenable(&irq_hook)) != OK) {
605 printf("atapci: couldn't enable IRQ line %d\n", irq);
606 continue;
607 }
608 }
609
610 base_dma = pci_attr_r32(devind, PCI_BAR_5) & 0xfffffffc;
611
612 /* Primary channel not in compatability mode? */
613 if (raid || (interface & ATA_IF_NOTCOMPAT1)) {
614 u32_t base_cmd, base_ctl;
615
616 base_cmd = pci_attr_r32(devind, PCI_BAR) & 0xfffffffc;
617 base_ctl = pci_attr_r32(devind, PCI_BAR_2) & 0xfffffffc;
618 if (base_cmd != REG_CMD_BASE0 && base_cmd != REG_CMD_BASE1) {
619 init_drive(&wini[w_next_drive],
620 base_cmd, base_ctl+PCI_CTL_OFF,
621 base_dma, irq, 1, irq_hook, 0);
622 init_drive(&wini[w_next_drive+1],
623 base_cmd, base_ctl+PCI_CTL_OFF,
624 base_dma, irq, 1, irq_hook, 1);
625 if (w_pci_debug)
626 printf("atapci %d: 0x%x 0x%x irq %d\n", devind, base_cmd, base_ctl, irq);
627 w_next_drive += 2;
628 } else printf("atapci: ignored drives on primary channel, base %x\n", base_cmd);
629 }
630 else
631 {
632 /* Update base_dma for compatibility device */
633 for (i= 0; i<MAX_DRIVES; i++)
634 {
635 if (wini[i].base_cmd == REG_CMD_BASE0)
636 wini[i].base_dma= base_dma;
637 }
638 }
639
640 /* Secondary channel not in compatability mode? */
641 if (raid || (interface & ATA_IF_NOTCOMPAT2)) {
642 u32_t base_cmd, base_ctl;
643
644 base_cmd = pci_attr_r32(devind, PCI_BAR_3) & 0xfffffffc;
645 base_ctl = pci_attr_r32(devind, PCI_BAR_4) & 0xfffffffc;
646 if (base_dma != 0)
647 base_dma += PCI_DMA_2ND_OFF;
648 if (base_cmd != REG_CMD_BASE0 && base_cmd != REG_CMD_BASE1) {
649 init_drive(&wini[w_next_drive],
650 base_cmd, base_ctl+PCI_CTL_OFF, base_dma,
651 irq, 1, irq_hook, 2);
652 init_drive(&wini[w_next_drive+1],
653 base_cmd, base_ctl+PCI_CTL_OFF, base_dma,
654 irq, 1, irq_hook, 3);
655 if (w_pci_debug)
656 printf("atapci %d: 0x%x 0x%x irq %d\n", devind, base_cmd, base_ctl, irq);
657 w_next_drive += 2;
658 } else printf("atapci: ignored drives on secondary channel, base %x\n", base_cmd);
659 }
660 else
661 {
662 /* Update base_dma for compatibility device */
663 for (i= 0; i<MAX_DRIVES; i++)
664 {
665 if (wini[i].base_cmd == REG_CMD_BASE1 && base_dma != 0)
666 wini[i].base_dma= base_dma+PCI_DMA_2ND_OFF;
667 }
668 }
669 }
670 }
671
672 /*===========================================================================*
673 * w_do_open *
674 *===========================================================================*/
675 PRIVATE int w_do_open(dp, m_ptr)
676 struct driver *dp;
677 message *m_ptr;
678 {
679 /* Device open: Initialize the controller and read the partition table. */
680
681 struct wini *wn;
682
683 if (w_prepare(m_ptr->DEVICE) == NIL_DEV) return(ENXIO);
684
685 wn = w_wn;
686
687 /* If we've probed it before and it failed, don't probe it again. */
688 if (wn->state & IGNORING) return ENXIO;
689
690 /* If we haven't identified it yet, or it's gone deaf,
691 * (re-)identify it.
692 */
693 if (!(wn->state & IDENTIFIED) || (wn->state & DEAF)) {
694 /* Try to identify the device. */
695 if (w_identify() != OK) {
696 #if VERBOSE
697 printf("%s: probe failed\n", w_name());
698 #endif
699 if (wn->state & DEAF) w_reset();
700 wn->state = IGNORING;
701 return(ENXIO);
702 }
703 /* Do a test transaction unless it's a CD drive (then
704 * we can believe the controller, and a test may fail
705 * due to no CD being in the drive). If it fails, ignore
706 * the device forever.
707 */
708 if (!(wn->state & ATAPI) && w_io_test() != OK) {
709 wn->state |= IGNORING;
710 return(ENXIO);
711 }
712
713 #if VERBOSE
714 printf("%s: AT driver detected ", w_name());
715 if (wn->state & (SMART|ATAPI)) {
716 printf("%.40s\n", w_id_string);
717 } else {
718 printf("%ux%ux%u\n", wn->pcylinders, wn->pheads, wn->psectors);
719 }
720 #endif
721 }
722
723 #if ENABLE_ATAPI
724 if ((wn->state & ATAPI) && (m_ptr->COUNT & W_BIT))
725 return(EACCES);
726 #endif
727
728 /* Partition the drive if it's being opened for the first time,
729 * or being opened after being closed.
730 */
731 if (wn->open_ct == 0) {
732 #if ENABLE_ATAPI
733 if (wn->state & ATAPI) {
734 int r;
735 if ((r = atapi_open()) != OK) return(r);
736 }
737 #endif
738
739 /* Partition the disk. */
740 partition(&w_dtab, w_drive * DEV_PER_DRIVE, P_PRIMARY, wn->state & ATAPI);
741 }
742 wn->open_ct++;
743 return(OK);
744 }
745
746 /*===========================================================================*
747 * w_prepare *
748 *===========================================================================*/
749 PRIVATE struct device *w_prepare(int device)
750 {
751 /* Prepare for I/O on a device. */
752 struct wini *prev_wn;
753 prev_wn = w_wn;
754 w_device = device;
755
756 if (device < NR_MINORS) { /* d0, d0p[0-3], d1, ... */
757 w_drive = device / DEV_PER_DRIVE; /* save drive number */
758 w_wn = &wini[w_drive];
759 w_dv = &w_wn->part[device % DEV_PER_DRIVE];
760 } else
761 if ((unsigned) (device -= MINOR_d0p0s0) < NR_SUBDEVS) {/*d[0-7]p[0-3]s[0-3]*/
762 w_drive = device / SUB_PER_DRIVE;
763 w_wn = &wini[w_drive];
764 w_dv = &w_wn->subpart[device % SUB_PER_DRIVE];
765 } else {
766 w_device = -1;
767 return(NIL_DEV);
768 }
769 return(w_dv);
770 }
771
772 /*===========================================================================*
773 * w_identify *
774 *===========================================================================*/
775 PRIVATE int w_identify()
776 {
777 /* Find out if a device exists, if it is an old AT disk, or a newer ATA
778 * drive, a removable media device, etc.
779 */
780
781 struct wini *wn = w_wn;
782 struct command cmd;
783 int i, s;
784 int id_dma, ultra_dma;
785 u32_t dma_base;
786 u16_t w;
787 unsigned long dma_status;
788 unsigned long size;
789 #define id_byte(n) (&tmp_buf[2 * (n)])
790 #define id_word(n) (((u16_t) id_byte(n)[0] << 0) \
791 |((u16_t) id_byte(n)[1] << 8))
792 #define id_longword(n) (((u32_t) id_byte(n)[0] << 0) \
793 |((u32_t) id_byte(n)[1] << 8) \
794 |((u32_t) id_byte(n)[2] << 16) \
795 |((u32_t) id_byte(n)[3] << 24))
796
797 /* Try to identify the device. */
798 cmd.ldh = wn->ldhpref;
799 cmd.command = ATA_IDENTIFY;
800 if (com_simple(&cmd) == OK && w_waitfor(STATUS_DRQ, STATUS_DRQ) &&
801 !(wn->w_status & (STATUS_ERR|STATUS_WF))) {
802
803 /* Device information. */
804 if ((s=sys_insw(wn->base_cmd + REG_DATA, SELF, tmp_buf, SECTOR_SIZE)) != OK)
805 panic(w_name(),"Call to sys_insw() failed", s);
806
807 if (id_word(0) & ID_GEN_NOT_ATA)
808 {
809 printf("%s: not an ATA device?\n", w_name());
810 return ERR;
811 }
812
813 /* This is an ATA device. */
814 wn->state |= SMART;
815
816 /* Why are the strings byte swapped??? */
817 for (i = 0; i < 40; i++) w_id_string[i] = id_byte(27)[i^1];
818
819 /* Preferred CHS translation mode. */
820 wn->pcylinders = id_word(1);
821 wn->pheads = id_word(3);
822 wn->psectors = id_word(6);
823 size = (u32_t) wn->pcylinders * wn->pheads * wn->psectors;
824
825 w= id_word(ID_CAPABILITIES);
826 if ((w & ID_CAP_LBA) && size > 512L*1024*2) {
827 /* Drive is LBA capable and is big enough to trust it to
828 * not make a mess of it.
829 */
830 wn->ldhpref |= LDH_LBA;
831 size = id_longword(60);
832
833 w= id_word(ID_CSS);
834 if (size < LBA48_CHECK_SIZE)
835 {
836 /* No need to check for LBA48 */
837 }
838 else if (w & ID_CSS_LBA48) {
839 /* Drive is LBA48 capable (and LBA48 is turned on). */
840 if (id_longword(102)) {
841 /* If no. of sectors doesn't fit in 32 bits,
842 * trunacte to this. So it's LBA32 for now.
843 * This can still address devices up to 2TB
844 * though.
845 */
846 size = ULONG_MAX;
847 } else {
848 /* Actual number of sectors fits in 32 bits. */
849 size = id_longword(100);
850 }
851 wn->lba48 = 1;
852 }
853
854 /* Check for DMA. Assume that only LBA capable devices can do
855 * DMA.
856 */
857 w= id_word(ID_CAPABILITIES);
858 id_dma= !!(w & ID_CAP_DMA);
859 w= id_byte(ID_FIELD_VALIDITY)[0];
860 ultra_dma= !!(w & ID_FV_88);
861 dma_base= wn->base_dma;
862 if (dma_base)
863 {
864 if (sys_inb(dma_base + DMA_STATUS, &dma_status) != OK)
865 {
866 panic(w_name(),
867 "unable to read DMA status register",
868 NO_NUM);
869 }
870 }
871 if (disable_dma)
872 ; /* DMA is disabled */
873 else if (id_dma && dma_base)
874 {
875 w= id_word(ID_MULTIWORD_DMA);
876 if (w & (ID_MWDMA_2_SUP|ID_MWDMA_1_SUP|ID_MWDMA_0_SUP))
877 {
878 printf(
879 "%s: multiword DMA modes supported:%s%s%s\n",
880 w_name(),
881 (w & ID_MWDMA_0_SUP) ? " 0" : "",
882 (w & ID_MWDMA_1_SUP) ? " 1" : "",
883 (w & ID_MWDMA_2_SUP) ? " 2" : "");
884 }
885 if (w & (ID_MWDMA_0_SEL|ID_MWDMA_1_SEL|ID_MWDMA_2_SEL))
886 {
887 printf(
888 "%s: multiword DMA mode selected:%s%s%s\n",
889 w_name(),
890 (w & ID_MWDMA_0_SEL) ? " 0" : "",
891 (w & ID_MWDMA_1_SEL) ? " 1" : "",
892 (w & ID_MWDMA_2_SEL) ? " 2" : "");
893 }
894 if (ultra_dma)
895 {
896 w= id_word(ID_ULTRA_DMA);
897 if (w & (ID_UDMA_0_SUP|ID_UDMA_1_SUP|
898 ID_UDMA_2_SUP|ID_UDMA_3_SUP|
899 ID_UDMA_4_SUP|ID_UDMA_5_SUP))
900 {
901 printf(
902 "%s: Ultra DMA modes supported:%s%s%s%s%s%s\n",
903 w_name(),
904 (w & ID_UDMA_0_SUP) ? " 0" : "",
905 (w & ID_UDMA_1_SUP) ? " 1" : "",
906 (w & ID_UDMA_2_SUP) ? " 2" : "",
907 (w & ID_UDMA_3_SUP) ? " 3" : "",
908 (w & ID_UDMA_4_SUP) ? " 4" : "",
909 (w & ID_UDMA_5_SUP) ? " 5" : "");
910 }
911 if (w & (ID_UDMA_0_SEL|ID_UDMA_1_SEL|
912 ID_UDMA_2_SEL|ID_UDMA_3_SEL|
913 ID_UDMA_4_SEL|ID_UDMA_5_SEL))
914 {
915 printf(
916 "%s: Ultra DMA mode selected:%s%s%s%s%s%s\n",
917 w_name(),
918 (w & ID_UDMA_0_SEL) ? " 0" : "",
919 (w & ID_UDMA_1_SEL) ? " 1" : "",
920 (w & ID_UDMA_2_SEL) ? " 2" : "",
921 (w & ID_UDMA_3_SEL) ? " 3" : "",
922 (w & ID_UDMA_4_SEL) ? " 4" : "",
923 (w & ID_UDMA_5_SEL) ? " 5" : "");
924 }
925 }
926 wn->dma= 1;
927 }
928 else if (id_dma || dma_base)
929 {
930 printf("id_dma %d, dma_base 0x%x\n", id_dma, dma_base);
931 }
932 else
933 printf("no DMA support\n");
934
935 #if 0
936 if (wn->dma && wn == &wini[0])
937 {
938 printf("disabling DMA for drive 0\n");
939 wn->dma= 0;
940 }
941 #endif
942 }
943
944 if (wn->lcylinders == 0) {
945 /* No BIOS parameters? Then make some up. */
946 wn->lcylinders = wn->pcylinders;
947 wn->lheads = wn->pheads;
948 wn->lsectors = wn->psectors;
949 while (wn->lcylinders > 1024) {
950 wn->lheads *= 2;
951 wn->lcylinders /= 2;
952 }
953 }
954 #if ENABLE_ATAPI
955 } else
956 if (cmd.command = ATAPI_IDENTIFY,
957 com_simple(&cmd) == OK && w_waitfor(STATUS_DRQ, STATUS_DRQ) &&
958 !(wn->w_status & (STATUS_ERR|STATUS_WF))) {
959 /* An ATAPI device. */
960 wn->state |= ATAPI;
961
962 /* Device information. */
963 if ((s=sys_insw(wn->base_cmd + REG_DATA, SELF, tmp_buf, 512)) != OK)
964 panic(w_name(),"Call to sys_insw() failed", s);
965
966 /* Why are the strings byte swapped??? */
967 for (i = 0; i < 40; i++) w_id_string[i] = id_byte(27)[i^1];
968
969 size = 0; /* Size set later. */
970 #endif
971 } else {
972 /* Not an ATA device; no translations, no special features. Don't
973 * touch it unless the BIOS knows about it.
974 */
975 if (wn->lcylinders == 0) { return(ERR); } /* no BIOS parameters */
976 wn->pcylinders = wn->lcylinders;
977 wn->pheads = wn->lheads;
978 wn->psectors = wn->lsectors;
979 size = (u32_t) wn->pcylinders * wn->pheads * wn->psectors;
980 }
981
982 /* Size of the whole drive */
983 wn->part[0].dv_size = mul64u(size, SECTOR_SIZE);
984
985 /* Reset/calibrate (where necessary) */
986 if (w_specify() != OK && w_specify() != OK) {
987 return(ERR);
988 }
989
990 if (wn->irq == NO_IRQ) {
991 /* Everything looks OK; register IRQ so we can stop polling. */
992 wn->irq = w_drive < 2 ? AT_WINI_0_IRQ : AT_WINI_1_IRQ;
993 wn->irq_hook_id = wn->irq; /* id to be returned if interrupt occurs */
994 if ((s=sys_irqsetpolicy(wn->irq, IRQ_REENABLE, &wn->irq_hook_id)) != OK)
995 panic(w_name(), "couldn't set IRQ policy", s);
996 if ((s=sys_irqenable(&wn->irq_hook_id)) != OK)
997 panic(w_name(), "couldn't enable IRQ line", s);
998 }
999 wn->state |= IDENTIFIED;
1000 return(OK);
1001 }
1002
1003 /*===========================================================================*
1004 * w_name *
1005 *===========================================================================*/
1006 PRIVATE char *w_name()
1007 {
1008 /* Return a name for the current device. */
1009 static char name[] = "AT-D0";
1010
1011 name[4] = '0' + w_drive;
1012 return name;
1013 }
1014
1015 /*===========================================================================*
1016 * w_io_test *
1017 *===========================================================================*/
1018 PRIVATE int w_io_test(void)
1019 {
1020 int r, save_dev;
1021 int save_timeout, save_errors, save_wakeup;
1022 iovec_t iov;
1023 #ifdef CD_SECTOR_SIZE
1024 static char buf[CD_SECTOR_SIZE];
1025 #else
1026 static char buf[SECTOR_SIZE];
1027 #endif
1028
1029 iov.iov_addr = (vir_bytes) buf;
1030 iov.iov_size = sizeof(buf);
1031 save_dev = w_device;
1032
1033 /* Reduce timeout values for this test transaction. */
1034 save_timeout = timeout_ticks;
1035 save_errors = max_errors;
1036 save_wakeup = wakeup_ticks;
1037
1038 if (!w_standard_timeouts) {
1039 timeout_ticks = HZ * 4;
1040 wakeup_ticks = HZ * 6;
1041 max_errors = 3;
1042 }
1043
1044 w_testing = 1;
1045
1046 /* Try I/O on the actual drive (not any (sub)partition). */
1047 if (w_prepare(w_drive * DEV_PER_DRIVE) == NIL_DEV)
1048 panic(w_name(), "Couldn't switch devices", NO_NUM);
1049
1050 r = w_transfer(SELF, DEV_GATHER, 0, &iov, 1, 0);
1051
1052 /* Switch back. */
1053 if (w_prepare(save_dev) == NIL_DEV)
1054 panic(w_name(), "Couldn't switch back devices", NO_NUM);
1055
1056 /* Restore parameters. */
1057 timeout_ticks = save_timeout;
1058 max_errors = save_errors;
1059 wakeup_ticks = save_wakeup;
1060 w_testing = 0;
1061
1062 /* Test if everything worked. */
1063 if (r != OK || iov.iov_size != 0) {
1064 return ERR;
1065 }
1066
1067 /* Everything worked. */
1068
1069 return OK;
1070 }
1071
1072 /*===========================================================================*
1073 * w_specify *
1074 *===========================================================================*/
1075 PRIVATE int w_specify()
1076 {
1077 /* Routine to initialize the drive after boot or when a reset is needed. */
1078
1079 struct wini *wn = w_wn;
1080 struct command cmd;
1081
1082 if ((wn->state & DEAF) && w_reset() != OK) {
1083 return(ERR);
1084 }
1085
1086 if (!(wn->state & ATAPI)) {
1087 /* Specify parameters: precompensation, number of heads and sectors. */
1088 cmd.precomp = wn->precomp;
1089 cmd.count = wn->psectors;
1090 cmd.ldh = w_wn->ldhpref | (wn->pheads - 1);
1091 cmd.command = CMD_SPECIFY; /* Specify some parameters */
1092
1093 /* Output command block and see if controller accepts the parameters. */
1094 if (com_simple(&cmd) != OK) return(ERR);
1095
1096 if (!(wn->state & SMART)) {
1097 /* Calibrate an old disk. */
1098 cmd.sector = 0;
1099 cmd.cyl_lo = 0;
1100 cmd.cyl_hi = 0;
1101 cmd.ldh = w_wn->ldhpref;
1102 cmd.command = CMD_RECALIBRATE;
1103
1104 if (com_simple(&cmd) != OK) return(ERR);
1105 }
1106 }
1107 wn->state |= INITIALIZED;
1108 return(OK);
1109 }
1110
1111 /*===========================================================================*
1112 * do_transfer *
1113 *===========================================================================*/
1114 PRIVATE int do_transfer(struct wini *wn, unsigned int precomp,
1115 unsigned int count, unsigned int sector,
1116 unsigned int opcode, int do_dma)
1117 {
1118 struct command cmd;
1119 unsigned int sector_high;
1120 unsigned secspcyl = wn->pheads * wn->psectors;
1121 int do_lba48;
1122
1123 sector_high= 0; /* For future extensions */
1124
1125 do_lba48= 0;
1126 if (sector >= LBA48_CHECK_SIZE || sector_high != 0)
1127 {
1128 if (wn->lba48)
1129 do_lba48= 1;
1130 else if (sector > LBA_MAX_SIZE || sector_high != 0)
1131 {
1132 /* Strange sector count for LBA device */
1133 return EIO;
1134 }
1135 }
1136
1137 cmd.precomp = precomp;
1138 cmd.count = count;
1139 if (do_dma)
1140 {
1141 cmd.command = opcode == DEV_SCATTER ? CMD_WRITE_DMA :
1142 CMD_READ_DMA;
1143 }
1144 else
1145 cmd.command = opcode == DEV_SCATTER ? CMD_WRITE : CMD_READ;
1146
1147 if (do_lba48) {
1148 if (do_dma)
1149 {
1150 cmd.command = ((opcode == DEV_SCATTER) ?
1151 CMD_WRITE_DMA_EXT : CMD_READ_DMA_EXT);
1152 }
1153 else
1154 {
1155 cmd.command = ((opcode == DEV_SCATTER) ?
1156 CMD_WRITE_EXT : CMD_READ_EXT);
1157 }
1158 cmd.count_prev= (count >> 8);
1159 cmd.sector = (sector >> 0) & 0xFF;
1160 cmd.cyl_lo = (sector >> 8) & 0xFF;
1161 cmd.cyl_hi = (sector >> 16) & 0xFF;
1162 cmd.sector_prev= (sector >> 24) & 0xFF;
1163 cmd.cyl_lo_prev= (sector_high) & 0xFF;
1164 cmd.cyl_hi_prev= (sector_high >> 8) & 0xFF;
1165 cmd.ldh = wn->ldhpref;
1166
1167 return com_out_ext(&cmd);
1168 } else if (wn->ldhpref & LDH_LBA) {
1169 cmd.sector = (sector >> 0) & 0xFF;
1170 cmd.cyl_lo = (sector >> 8) & 0xFF;
1171 cmd.cyl_hi = (sector >> 16) & 0xFF;
1172 cmd.ldh = wn->ldhpref | ((sector >> 24) & 0xF);
1173 } else {
1174 int cylinder, head, sec;
1175 cylinder = sector / secspcyl;
1176 head = (sector % secspcyl) / wn->psectors;
1177 sec = sector % wn->psectors;
1178 cmd.sector = sec + 1;
1179 cmd.cyl_lo = cylinder & BYTE;
1180 cmd.cyl_hi = (cylinder >> 8) & BYTE;
1181 cmd.ldh = wn->ldhpref | head;
1182 }
1183
1184 return com_out(&cmd);
1185 }
1186
1187 /*===========================================================================*
1188 * w_transfer *
1189 *===========================================================================*/
1190 PRIVATE int w_transfer(proc_nr, opcode, position, iov, nr_req, safe)
1191 int proc_nr; /* process doing the request */
1192 int opcode; /* DEV_GATHER or DEV_SCATTER */
1193 off_t position; /* offset on device to read or write */
1194 iovec_t *iov; /* pointer to read or write request vector */
1195 unsigned nr_req; /* length of request vector */
1196 int safe; /* iov contains addresses (0) or grants? */
1197 {
1198 struct wini *wn = w_wn;
1199 iovec_t *iop, *iov_end = iov + nr_req;
1200 int n, r, s, errors, do_dma, do_write, do_copyout;
1201 unsigned long v, block, w_status;
1202 unsigned long dv_size = cv64ul(w_dv->dv_size);
1203 unsigned cylinder, head, sector, nbytes;
1204 unsigned dma_buf_offset;
1205 size_t addr_offset = 0;
1206
1207 #if ENABLE_ATAPI
1208 if (w_wn->state & ATAPI) {
1209 return atapi_transfer(proc_nr, opcode, position, iov, nr_req, safe);
1210 }
1211 #endif
1212
1213 /* Check disk address. */
1214 if ((position & SECTOR_MASK) != 0) return(EINVAL);
1215
1216 errors = 0;
1217
1218 while (nr_req > 0) {
1219 /* How many bytes to transfer? */
1220 nbytes = 0;
1221 for (iop = iov; iop < iov_end; iop++) nbytes += iop->iov_size;
1222 if ((nbytes & SECTOR_MASK) != 0) return(EINVAL);
1223
1224 /* Which block on disk and how close to EOF? */
1225 if (position >= dv_size) return(OK); /* At EOF */
1226 if (position + nbytes > dv_size) nbytes = dv_size - position;
1227 block = div64u(add64ul(w_dv->dv_base, position), SECTOR_SIZE);
1228
1229 do_dma= wn->dma;
1230 do_write= (opcode == DEV_SCATTER);
1231
1232 if (nbytes >= wn->max_count) {
1233 /* The drive can't do more then max_count at once. */
1234 nbytes = wn->max_count;
1235 }
1236
1237 /* First check to see if a reinitialization is needed. */
1238 if (!(wn->state & INITIALIZED) && w_specify() != OK) return(EIO);
1239
1240 if (do_dma)
1241 {
1242 setup_dma(&nbytes, proc_nr, iov, do_write, &do_copyout, safe);
1243 #if 0
1244 printf("nbytes = %d\n", nbytes);
1245 #endif
1246 }
1247
1248 /* Tell the controller to transfer nbytes bytes. */
1249 r = do_transfer(wn, wn->precomp, (nbytes >> SECTOR_SHIFT),
1250 block, opcode, do_dma);
1251
1252 if (opcode == DEV_SCATTER) {
1253 /* The specs call for a 400 ns wait after issuing the command.
1254 * Reading the alternate status register is the suggested
1255 * way to implement this wait.
1256 */
1257 if (sys_inb((wn->base_ctl+REG_CTL_ALTSTAT), &w_status) != OK)
1258 panic(w_name(), "couldn't get status", NO_NUM);
1259 }
1260
1261 if (do_dma)
1262 {
1263 /* Wait for the interrupt, check DMA status and optionally
1264 * copy out.
1265 */
1266
1267 if ((r = at_intr_wait()) != OK)
1268 {
1269 /* Don't retry if sector marked bad or too many
1270 * errors.
1271 */
1272 if (r == ERR_BAD_SECTOR || ++errors == max_errors) {
1273 w_command = CMD_IDLE;
1274 return(EIO);
1275 }
1276 continue;
1277 }
1278
1279 /* Wait for DMA_ST_INT to get set */
1280 w_waitfor_dma(DMA_ST_INT, DMA_ST_INT);
1281
1282 r= sys_inb(wn->base_dma + DMA_STATUS, &v);
1283 if (r != 0) panic("at_wini", "w_transfer: sys_inb failed", r);
1284
1285 #if 0
1286 printf("dma_status: 0x%x\n", v);
1287 #endif
1288 if (!(v & DMA_ST_INT))
1289 {
1290 /* DMA did not complete successfully */
1291 if (v & DMA_ST_BM_ACTIVE)
1292 panic(w_name(), "DMA did not complete", NO_NUM);
1293 else if (v & DMA_ST_ERROR)
1294 {
1295 printf("at_wini: DMA error\n");
1296 r= EIO;
1297 break;
1298 }
1299 else
1300 {
1301 #if 0
1302 printf("DMA buffer too small\n");
1303 #endif
1304 panic(w_name(), "DMA buffer too small", NO_NUM);
1305 }
1306 }
1307 else if (v & DMA_ST_BM_ACTIVE)
1308 panic(w_name(), "DMA buffer too large", NO_NUM);
1309
1310 dma_buf_offset= 0;
1311 while (r == OK && nbytes > 0)
1312 {
1313 n= iov->iov_size;
1314 if (n > nbytes)
1315 n= nbytes;
1316
1317 if (do_copyout)
1318 {
1319 if(safe) {
1320 s= sys_safecopyto(proc_nr, iov->iov_addr,
1321 addr_offset,
1322 (vir_bytes)dma_buf+dma_buf_offset, n, D);
1323 } else {
1324 s= sys_vircopy(SELF, D,
1325 (vir_bytes)dma_buf+dma_buf_offset,
1326 proc_nr, D,
1327 iov->iov_addr + addr_offset, n);
1328 }
1329 if (s != OK)
1330 {
1331 panic(w_name(),
1332 "w_transfer: sys_vircopy failed",
1333 s);
1334 }
1335 }
1336
1337 /* Book the bytes successfully transferred. */
1338 nbytes -= n;
1339 position += n;
1340 if ((iov->iov_size -= n) == 0) {
1341 iov++; nr_req--; addr_offset = 0;
1342 }
1343 dma_buf_offset += n;
1344 }
1345 }
1346
1347 while (r == OK && nbytes > 0) {
1348 /* For each sector, wait for an interrupt and fetch the data
1349 * (read), or supply data to the controller and wait for an
1350 * interrupt (write).
1351 */
1352
1353 if (opcode == DEV_GATHER) {
1354 /* First an interrupt, then data. */
1355 if ((r = at_intr_wait()) != OK) {
1356 /* An error, send data to the bit bucket. */
1357 if (w_wn->w_status & STATUS_DRQ) {
1358 if ((s=sys_insw(wn->base_cmd+REG_DATA,
1359 SELF, tmp_buf,
1360 SECTOR_SIZE)) != OK)
1361 {
1362 panic(w_name(),
1363 "Call to sys_insw() failed",
1364 s);
1365 }
1366 }
1367 break;
1368 }
1369 }
1370
1371 /* Wait for busy to clear. */
1372 if (!w_waitfor(STATUS_BSY, 0)) { r = ERR; break; }
1373
1374 /* Wait for data transfer requested. */
1375 if (!w_waitfor(STATUS_DRQ, STATUS_DRQ)) { r = ERR; break; }
1376
1377 /* Copy bytes to or from the device's buffer. */
1378 if (opcode == DEV_GATHER) {
1379 if(safe) {
1380 s=sys_safe_insw(wn->base_cmd + REG_DATA, proc_nr,
1381 (void *) (iov->iov_addr), addr_offset,
1382 SECTOR_SIZE);
1383 } else {
1384 s=sys_insw(wn->base_cmd + REG_DATA, proc_nr,
1385 (void *) (iov->iov_addr + addr_offset),
1386 SECTOR_SIZE);
1387 }
1388 if(s != OK) {
1389 panic(w_name(),"Call to sys_insw() failed", s);
1390 }
1391 } else {
1392 if(safe) {
1393 s=sys_safe_outsw(wn->base_cmd + REG_DATA, proc_nr,
1394 (void *) (iov->iov_addr), addr_offset,
1395 SECTOR_SIZE);
1396 } else {
1397 s=sys_outsw(wn->base_cmd + REG_DATA, proc_nr,
1398 (void *) (iov->iov_addr + addr_offset),
1399 SECTOR_SIZE);
1400 }
1401
1402 if(s != OK) {
1403 panic(w_name(),"Call to sys_outsw() failed",
1404 s);
1405 }
1406
1407 /* Data sent, wait for an interrupt. */
1408 if ((r = at_intr_wait()) != OK) break;
1409 }
1410
1411 /* Book the bytes successfully transferred. */
1412 nbytes -= SECTOR_SIZE;
1413 position += SECTOR_SIZE;
1414 addr_offset += SECTOR_SIZE;
1415 if ((iov->iov_size -= SECTOR_SIZE) == 0) {
1416 iov++;
1417 nr_req--;
1418 addr_offset = 0;
1419 }
1420 }
1421
1422 /* Any errors? */
1423 if (r != OK) {
1424 /* Don't retry if sector marked bad or too many errors. */
1425 if (r == ERR_BAD_SECTOR || ++errors == max_errors) {
1426 w_command = CMD_IDLE;
1427 return(EIO);
1428 }
1429 }
1430 }
1431
1432 w_command = CMD_IDLE;
1433 return(OK);
1434 }
1435
1436 /*===========================================================================*
1437 * com_out *
1438 *===========================================================================*/
1439 PRIVATE int com_out(cmd)
1440 struct command *cmd; /* Command block */
1441 {
1442 /* Output the command block to the winchester controller and return status */
1443
1444 struct wini *wn = w_wn;
1445 unsigned base_cmd = wn->base_cmd;
1446 unsigned base_ctl = wn->base_ctl;
1447 pvb_pair_t outbyte[7]; /* vector for sys_voutb() */
1448 int s; /* status for sys_(v)outb() */
1449
1450 if (w_wn->state & IGNORING) return ERR;
1451
1452 if (!w_waitfor(STATUS_BSY, 0)) {
1453 printf("%s: controller not ready\n", w_name());
1454 return(ERR);
1455 }
1456
1457 /* Select drive. */
1458 if ((s=sys_outb(base_cmd + REG_LDH, cmd->ldh)) != OK)
1459 panic(w_name(),"Couldn't write register to select drive",s);
1460
1461 if (!w_waitfor(STATUS_BSY, 0)) {
1462 printf("%s: com_out: drive not ready\n", w_name());
1463 return(ERR);
1464 }
1465
1466 /* Schedule a wakeup call, some controllers are flaky. This is done with
1467 * a synchronous alarm. If a timeout occurs a SYN_ALARM message is sent
1468 * from HARDWARE, so that w_intr_wait() can call w_timeout() in case the
1469 * controller was not able to execute the command. Leftover timeouts are
1470 * simply ignored by the main loop.
1471 */
1472 sys_setalarm(wakeup_ticks, 0);
1473
1474 wn->w_status = STATUS_ADMBSY;
1475 w_command = cmd->command;
1476 pv_set(outbyte[0], base_ctl + REG_CTL, wn->pheads >= 8 ? CTL_EIGHTHEADS : 0);
1477 pv_set(outbyte[1], base_cmd + REG_PRECOMP, cmd->precomp);
1478 pv_set(outbyte[2], base_cmd + REG_COUNT, cmd->count);
1479 pv_set(outbyte[3], base_cmd + REG_SECTOR, cmd->sector);
1480 pv_set(outbyte[4], base_cmd + REG_CYL_LO, cmd->cyl_lo);
1481 pv_set(outbyte[5], base_cmd + REG_CYL_HI, cmd->cyl_hi);
1482 pv_set(outbyte[6], base_cmd + REG_COMMAND, cmd->command);
1483 if ((s=sys_voutb(outbyte,7)) != OK)
1484 panic(w_name(),"Couldn't write registers with sys_voutb()",s);
1485 return(OK);
1486 }
1487
1488 /*===========================================================================*
1489 * com_out_ext *
1490 *===========================================================================*/
1491 PRIVATE int com_out_ext(cmd)
1492 struct command *cmd; /* Command block */
1493 {
1494 /* Output the command block to the winchester controller and return status */
1495
1496 struct wini *wn = w_wn;
1497 unsigned base_cmd = wn->base_cmd;
1498 unsigned base_ctl = wn->base_ctl;
1499 pvb_pair_t outbyte[11]; /* vector for sys_voutb() */
1500 int s; /* status for sys_(v)outb() */
1501 unsigned long w_status;
1502
1503 if (w_wn->state & IGNORING) return ERR;
1504
1505 if (!w_waitfor(STATUS_BSY, 0)) {
1506 printf("%s: controller not ready\n", w_name());
1507 return(ERR);
1508 }
1509
1510 /* Select drive. */
1511 if ((s=sys_outb(base_cmd + REG_LDH, cmd->ldh)) != OK)
1512 panic(w_name(),"Couldn't write register to select drive",s);
1513
1514 if (!w_waitfor(STATUS_BSY, 0)) {
1515 printf("%s: com_out: drive not ready\n", w_name());
1516 return(ERR);
1517 }
1518
1519 /* Schedule a wakeup call, some controllers are flaky. This is done with
1520 * a synchronous alarm. If a timeout occurs a SYN_ALARM message is sent
1521 * from HARDWARE, so that w_intr_wait() can call w_timeout() in case the
1522 * controller was not able to execute the command. Leftover timeouts are
1523 * simply ignored by the main loop.
1524 */
1525 sys_setalarm(wakeup_ticks, 0);
1526
1527 wn->w_status = STATUS_ADMBSY;
1528 w_command = cmd->command;
1529 pv_set(outbyte[0], base_ctl + REG_CTL, 0);
1530 pv_set(outbyte[1], base_cmd + REG_COUNT, cmd->count_prev);
1531 pv_set(outbyte[2], base_cmd + REG_SECTOR, cmd->sector_prev);
1532 pv_set(outbyte[3], base_cmd + REG_CYL_LO, cmd->cyl_lo_prev);
1533 pv_set(outbyte[4], base_cmd + REG_CYL_HI, cmd->cyl_hi_prev);
1534 pv_set(outbyte[5], base_cmd + REG_COUNT, cmd->count);
1535 pv_set(outbyte[6], base_cmd + REG_SECTOR, cmd->sector);
1536 pv_set(outbyte[7], base_cmd + REG_CYL_LO, cmd->cyl_lo);
1537 pv_set(outbyte[8], base_cmd + REG_CYL_HI, cmd->cyl_hi);
1538
1539 pv_set(outbyte[10], base_cmd + REG_COMMAND, cmd->command);
1540 if ((s=sys_voutb(outbyte, 11)) != OK)
1541 panic(w_name(),"Couldn't write registers with sys_voutb()",s);
1542
1543 return(OK);
1544 }
1545
1546 /*===========================================================================*
1547 * setup_dma *
1548 *===========================================================================*/
1549 PRIVATE void setup_dma(sizep, proc_nr, iov, do_write, do_copyoutp, safe)
1550 unsigned *sizep;
1551 int proc_nr;
1552 iovec_t *iov;
1553 int do_write;
1554 int *do_copyoutp;
1555 int safe;
1556 {
1557 phys_bytes phys, user_phys;
1558 unsigned n, offset, size;
1559 int i, j, r, bad;
1560 unsigned long v;
1561 struct wini *wn = w_wn;
1562
1563 /* First try direct scatter/gather to the supplied buffers */
1564 size= *sizep;
1565 i= 0; /* iov index */
1566 j= 0; /* prdt index */
1567 bad= 0;
1568 offset= 0; /* Offset in current iov */
1569
1570 #if 0
1571 printf("setup_dma: proc_nr %d\n", proc_nr);
1572 #endif
1573
1574 while (size > 0)
1575 {
1576 #if 0
1577 printf(
1578 "setup_dma: iov[%d]: addr 0x%x, size %d offset %d, size %d\n",
1579 i, iov[i].iov_addr, iov[i].iov_size, offset, size);
1580 #endif
1581
1582 n= iov[i].iov_size-offset;
1583 if (n > size)
1584 n= size;
1585 if (n == 0 || (n & 1))
1586 panic("at_wini", "bad size in iov", iov[i].iov_size);
1587 if(safe) {
1588 r= sys_umap(proc_nr, GRANT_SEG, iov[i].iov_addr, n,&user_phys);
1589 user_phys += offset;
1590 } else {
1591 r= sys_umap(proc_nr, D, iov[i].iov_addr+offset, n, &user_phys);
1592 }
1593 if (r != 0)
1594 panic("at_wini", "can't map user buffer", r);
1595 if (user_phys & 1)
1596 {
1597 /* Buffer is not aligned */
1598 printf("setup_dma: user buffer is not aligned\n");
1599 bad= 1;
1600 break;
1601 }
1602
1603 /* vector is not allowed to cross a 64K boundary */
1604 if (user_phys/0x10000 != (user_phys+n-1)/0x10000)
1605 n= ((user_phys/0x10000)+1)*0x10000 - user_phys;
1606
1607 /* vector is not allowed to be bigger than 64K, but we get that
1608 * for free.
1609 */
1610
1611 if (j >= N_PRDTE)
1612 {
1613 /* Too many entries */
1614 bad= 1;
1615 break;
1616 }
1617
1618 prdt[j].prdte_base= user_phys;
1619 prdt[j].prdte_count= n;
1620 prdt[j].prdte_reserved= 0;
1621 prdt[j].prdte_flags= 0;
1622 j++;
1623
1624 offset += n;
1625 if (offset >= iov[i].iov_size)
1626 {
1627 i++;
1628 offset= 0;
1629 }
1630
1631 size -= n;
1632 }
1633
1634 if (!bad)
1635 {
1636 if (j <= 0 || j > N_PRDTE)
1637 panic("at_wini", "bad prdt index", j);
1638 prdt[j-1].prdte_flags |= PRDTE_FL_EOT;
1639
1640 #if 0
1641 for (i= 0; i<j; i++)
1642 {
1643 printf("prdt[%d]: base 0x%x, size %d, flags 0x%x\n",
1644 i, prdt[i].prdte_base, prdt[i].prdte_count,
1645 prdt[i].prdte_flags);
1646 }
1647 #endif
1648 }
1649
1650 /* The caller needs to perform a copy-out from the dma buffer if
1651 * this is a read request and we can't DMA directly to the user's
1652 * buffers.
1653 */
1654 *do_copyoutp= (!do_write && bad);
1655
1656 if (bad)
1657 {
1658 /* Adjust request size */
1659 size= *sizep;
1660 if (size > ATA_DMA_BUF_SIZE)
1661 *sizep= size= ATA_DMA_BUF_SIZE;
1662
1663 if (do_write)
1664 {
1665 /* Copy-in */
1666 for (offset= 0; offset < size; offset += n)
1667 {
1668 n= size-offset;
1669 if (n > iov->iov_size)
1670 n= iov->iov_size;
1671
1672 if(safe) {
1673 r= sys_safecopyfrom(proc_nr, iov->iov_addr,
1674 0, (vir_bytes)dma_buf+offset, n, D);
1675 } else {
1676 r= sys_vircopy(proc_nr, D, iov->iov_addr,
1677 SELF, D, (vir_bytes)dma_buf+offset,
1678 n);
1679 }
1680 if (r != OK)
1681 {
1682 panic(w_name(),
1683 "setup_dma: sys_vircopy failed",
1684 r);
1685 }
1686 iov++;
1687 }
1688 }
1689
1690 /* Fill-in the physical region descriptor table */
1691 phys= dma_buf_phys;
1692 if (phys & 1)
1693 {
1694 /* Two byte alignment is required */
1695 panic("at_wini", "bad buffer alignment in setup_dma",
1696 phys);
1697 }
1698 for (j= 0; j<N_PRDTE; i++)
1699 {
1700 if (size == 0)
1701 {
1702 panic("at_wini", "bad size in setup_dma",
1703 size);
1704 }
1705 if (size & 1)
1706 {
1707 /* Two byte alignment is required for size */
1708 panic("at_wini",
1709 "bad size alignment in setup_dma",
1710 size);
1711 }
1712 n= size;
1713
1714 /* Buffer is not allowed to cross a 64K boundary */
1715 if (phys / 0x10000 != (phys+n-1) / 0x10000)
1716 {
1717 n= ((phys/0x10000)+1)*0x10000 - phys;
1718 }
1719 prdt[j].prdte_base= phys;
1720 prdt[j].prdte_count= n;
1721 prdt[j].prdte_reserved= 0;
1722 prdt[j].prdte_flags= 0;
1723
1724 size -= n;
1725 if (size == 0)
1726 {
1727 prdt[j].prdte_flags |= PRDTE_FL_EOT;
1728 break;
1729 }
1730 }
1731 if (size != 0)
1732 panic("at_wini", "size to large for prdt", NO_NUM);
1733
1734 #if 0
1735 for (i= 0; i<=j; i++)
1736 {
1737 printf("prdt[%d]: base 0x%x, size %d, flags 0x%x\n",
1738 i, prdt[i].prdte_base, prdt[i].prdte_count,
1739 prdt[i].prdte_flags);
1740 }
1741 #endif
1742 }
1743
1744 /* Stop bus master operation */
1745 r= sys_outb(wn->base_dma + DMA_COMMAND, 0);
1746 if (r != 0) panic("at_wini", "setup_dma: sys_outb failed", r);
1747
1748 /* Verify that the bus master is not active */
1749 r= sys_inb(wn->base_dma + DMA_STATUS, &v);
1750 if (r != 0) panic("at_wini", "setup_dma: sys_inb failed", r);
1751 if (v & DMA_ST_BM_ACTIVE)
1752 panic("at_wini", "Bus master IDE active", NO_NUM);
1753
1754 if (prdt_phys & 3)
1755 panic("at_wini", "prdt not aligned", prdt_phys);
1756 r= sys_outl(wn->base_dma + DMA_PRDTP, prdt_phys);
1757 if (r != 0) panic("at_wini", "setup_dma: sys_outl failed", r);
1758
1759 /* Clear interrupt and error flags */
1760 r= sys_outb(wn->base_dma + DMA_STATUS, DMA_ST_INT | DMA_ST_ERROR);
1761 if (r != 0) panic("at_wini", "setup_dma: sys_outb failed", r);
1762
1763 /* Assume disk reads. Start DMA */
1764 v= DMA_CMD_START;
1765 if (!do_write)
1766 {
1767 /* Disk reads generate PCI write cycles. */
1768 v |= DMA_CMD_WRITE;
1769 }
1770 r= sys_outb(wn->base_dma + DMA_COMMAND, v);
1771 if (r != 0) panic("at_wini", "setup_dma: sys_outb failed", r);
1772
1773 #if 0
1774 r= sys_inb(wn->base_dma + DMA_STATUS, &v);
1775 if (r != 0) panic("at_wini", "setup_dma: sys_inb failed", r);
1776 printf("dma status: 0x%x\n", v);
1777 #endif
1778 }
1779
1780
1781 /*===========================================================================*
1782 * w_need_reset *
1783 *===========================================================================*/
1784 PRIVATE void w_need_reset()
1785 {
1786 /* The controller needs to be reset. */
1787 struct wini *wn;
1788 int dr = 0;
1789
1790 for (wn = wini; wn < &wini[MAX_DRIVES]; wn++, dr++) {
1791 if (wn->base_cmd == w_wn->base_cmd) {
1792 wn->state |= DEAF;
1793 wn->state &= ~INITIALIZED;
1794 }
1795 }
1796 }
1797
1798 /*===========================================================================*
1799 * w_do_close *
1800 *===========================================================================*/
1801 PRIVATE int w_do_close(dp, m_ptr)
1802 struct driver *dp;
1803 message *m_ptr;
1804 {
1805 /* Device close: Release a device. */
1806 if (w_prepare(m_ptr->DEVICE) == NIL_DEV)
1807 return(ENXIO);
1808 w_wn->open_ct--;
1809 #if ENABLE_ATAPI
1810 if (w_wn->open_ct == 0 && (w_wn->state & ATAPI)) atapi_close();
1811 #endif
1812 return(OK);
1813 }
1814
1815 /*===========================================================================*
1816 * com_simple *
1817 *===========================================================================*/
1818 PRIVATE int com_simple(cmd)
1819 struct command *cmd; /* Command block */
1820 {
1821 /* A simple controller command, only one interrupt and no data-out phase. */
1822 int r;
1823
1824 if (w_wn->state & IGNORING) return ERR;
1825
1826 if ((r = com_out(cmd)) == OK) r = at_intr_wait();
1827 w_command = CMD_IDLE;
1828 return(r);
1829 }
1830
1831 /*===========================================================================*
1832 * w_timeout *
1833 *===========================================================================*/
1834 PRIVATE void w_timeout(void)
1835 {
1836 struct wini *wn = w_wn;
1837
1838 switch (w_command) {
1839 case CMD_IDLE:
1840 break; /* fine */
1841 case CMD_READ:
1842 case CMD_READ_EXT:
1843 case CMD_WRITE:
1844 case CMD_WRITE_EXT:
1845 /* Impossible, but not on PC's: The controller does not respond. */
1846
1847 /* Limiting multisector I/O seems to help. */
1848 if (wn->max_count > 8 * SECTOR_SIZE) {
1849 wn->max_count = 8 * SECTOR_SIZE;
1850 } else {
1851 wn->max_count = SECTOR_SIZE;
1852 }
1853 /*FALL THROUGH*/
1854 default:
1855 /* Some other command. */
1856 if (w_testing) wn->state |= IGNORING; /* Kick out this drive. */
1857 else if (!w_silent) printf("%s: timeout on command 0x%02x\n",
1858 w_name(), w_command);
1859 w_need_reset();
1860 wn->w_status = 0;
1861 }
1862 }
1863
1864 /*===========================================================================*
1865 * w_reset *
1866 *===========================================================================*/
1867 PRIVATE int w_reset()
1868 {
1869 /* Issue a reset to the controller. This is done after any catastrophe,
1870 * like the controller refusing to respond.
1871 */
1872 int s;
1873 struct wini *wn = w_wn;
1874
1875 /* Don't bother if this drive is forgotten. */
1876 if (w_wn->state & IGNORING) return ERR;
1877
1878 /* Wait for any internal drive recovery. */
1879 tickdelay(RECOVERY_TICKS);
1880
1881 /* Strobe reset bit */
1882 if ((s=sys_outb(wn->base_ctl + REG_CTL, CTL_RESET)) != OK)
1883 panic(w_name(),"Couldn't strobe reset bit",s);
1884 tickdelay(DELAY_TICKS);
1885 if ((s=sys_outb(wn->base_ctl + REG_CTL, 0)) != OK)
1886 panic(w_name(),"Couldn't strobe reset bit",s);
1887 tickdelay(DELAY_TICKS);
1888
1889 /* Wait for controller ready */
1890 if (!w_waitfor(STATUS_BSY, 0)) {
1891 printf("%s: reset failed, drive busy\n", w_name());
1892 return(ERR);
1893 }
1894
1895 /* The error register should be checked now, but some drives mess it up. */
1896
1897 for (wn = wini; wn < &wini[MAX_DRIVES]; wn++) {
1898 if (wn->base_cmd == w_wn->base_cmd) {
1899 wn->state &= ~DEAF;
1900 if (w_wn->irq_need_ack) {
1901 /* Make sure irq is actually enabled.. */
1902 sys_irqenable(&w_wn->irq_hook_id);
1903 }
1904 }
1905 }
1906
1907
1908 return(OK);
1909 }
1910
1911 /*===========================================================================*
1912 * w_intr_wait *
1913 *===========================================================================*/
1914 PRIVATE void w_intr_wait()
1915 {
1916 /* Wait for a task completion interrupt. */
1917
1918 int r;
1919 unsigned long w_status;
1920 message m;
1921
1922 if (w_wn->irq != NO_IRQ) {
1923 /* Wait for an interrupt that sets w_status to "not busy". */
1924 while (w_wn->w_status & (STATUS_ADMBSY|STATUS_BSY)) {
1925 int rr;
1926 if((rr=receive(HARDWARE, &m)) != OK) { /* expect HARD_INT message */
1927 printf("w_intr_wait: receive from ANY failed (%d)\n",
1928 r);
1929 continue; /* try again */
1930 }
1931 if (m.m_type == SYN_ALARM) { /* but check for timeout */
1932 w_timeout(); /* a.o. set w_status */
1933 } else if (m.m_type == HARD_INT) {
1934 r= sys_inb(w_wn->base_cmd + REG_STATUS, &w_status);
1935 if (r != 0)
1936 panic("at_wini", "sys_inb failed", r);
1937 w_wn->w_status= w_status;
1938 ack_irqs(m.NOTIFY_ARG);
1939 } else if (m.m_type == DEV_PING) {
1940 notify(m.m_source);
1941 } else {
1942 printf("AT_WINI got unexpected message %d from %d\n",
1943 m.m_type, m.m_source);
1944 }
1945 }
1946 } else {
1947 /* Interrupt not yet allocated; use polling. */
1948 (void) w_waitfor(STATUS_BSY, 0);
1949 }
1950 }
1951
1952 /*===========================================================================*
1953 * at_intr_wait *
1954 *===========================================================================*/
1955 PRIVATE int at_intr_wait()
1956 {
1957 /* Wait for an interrupt, study the status bits and return error/success. */
1958 int r, s;
1959 unsigned long inbval;
1960
1961 w_intr_wait();
1962 if ((w_wn->w_status & (STATUS_BSY | STATUS_WF | STATUS_ERR)) == 0) {
1963 r = OK;
1964 } else {
1965 if ((s=sys_inb(w_wn->base_cmd + REG_ERROR, &inbval)) != OK)
1966 panic(w_name(),"Couldn't read register",s);
1967 if ((w_wn->w_status & STATUS_ERR) && (inbval & ERROR_BB)) {
1968 r = ERR_BAD_SECTOR; /* sector marked bad, retries won't help */
1969 } else {
1970 r = ERR; /* any other error */
1971 }
1972 }
1973 w_wn->w_status |= STATUS_ADMBSY; /* assume still busy with I/O */
1974 return(r);
1975 }
1976
1977 /*===========================================================================*
1978 * w_waitfor *
1979 *===========================================================================*/
1980 PRIVATE int w_waitfor(mask, value)
1981 int mask; /* status mask */
1982 int value; /* required status */
1983 {
1984 /* Wait until controller is in the required state. Return zero on timeout.
1985 * An alarm that set a timeout flag is used. TIMEOUT is in micros, we need
1986 * ticks. Disabling the alarm is not needed, because a static flag is used
1987 * and a leftover timeout cannot do any harm.
1988 */
1989 unsigned long w_status;
1990 clock_t t0, t1;
1991 int s;
1992
1993 getuptime(&t0);
1994 do {
1995 if ((s=sys_inb(w_wn->base_cmd + REG_STATUS, &w_status)) != OK)
1996 panic(w_name(),"Couldn't read register",s);
1997 w_wn->w_status= w_status;
1998 if ((w_wn->w_status & mask) == value) {
1999 return 1;
2000 }
2001 } while ((s=getuptime(&t1)) == OK && (t1-t0) < timeout_ticks );
2002 if (OK != s) printf("AT_WINI: warning, get_uptime failed: %d\n",s);
2003
2004 w_need_reset(); /* controller gone deaf */
2005 return(0);
2006 }
2007
2008 /*===========================================================================*
2009 * w_waitfor_dma *
2010 *===========================================================================*/
2011 PRIVATE int w_waitfor_dma(mask, value)
2012 int mask; /* status mask */
2013 int value; /* required status */
2014 {
2015 /* Wait until controller is in the required state. Return zero on timeout.
2016 * An alarm that set a timeout flag is used. TIMEOUT is in micros, we need
2017 * ticks. Disabling the alarm is not needed, because a static flag is used
2018 * and a leftover timeout cannot do any harm.
2019 */
2020 unsigned long w_status;
2021 clock_t t0, t1;
2022 int s;
2023
2024 getuptime(&t0);
2025 do {
2026 if ((s=sys_inb(w_wn->base_dma + DMA_STATUS, &w_status)) != OK)
2027 panic(w_name(),"Couldn't read register",s);
2028 if ((w_status & mask) == value) {
2029 return 1;
2030 }
2031 } while ((s=getuptime(&t1)) == OK && (t1-t0) < timeout_ticks );
2032 if (OK != s) printf("AT_WINI: warning, get_uptime failed: %d\n",s);
2033
2034 return(0);
2035 }
2036
2037 /*===========================================================================*
2038 * w_geometry *
2039 *===========================================================================*/
2040 PRIVATE void w_geometry(entry)
2041 struct partition *entry;
2042 {
2043 struct wini *wn = w_wn;
2044
2045 if (wn->state & ATAPI) { /* Make up some numbers. */
2046 entry->cylinders = div64u(wn->part[0].dv_size, SECTOR_SIZE) / (64*32);
2047 entry->heads = 64;
2048 entry->sectors = 32;
2049 } else { /* Return logical geometry. */
2050 entry->cylinders = wn->lcylinders;
2051 entry->heads = wn->lheads;
2052 entry->sectors = wn->lsectors;
2053 }
2054 }
2055
2056 #if ENABLE_ATAPI
2057 /*===========================================================================*
2058 * atapi_open *
2059 *===========================================================================*/
2060 PRIVATE int atapi_open()
2061 {
2062 /* Should load and lock the device and obtain its size. For now just set the
2063 * size of the device to something big. What is really needed is a generic
2064 * SCSI layer that does all this stuff for ATAPI and SCSI devices (kjb). (XXX)
2065 */
2066 w_wn->part[0].dv_size = mul64u(800L*1024, 1024);
2067 return(OK);
2068 }
2069
2070 /*===========================================================================*
2071 * atapi_close *
2072 *===========================================================================*/
2073 PRIVATE void atapi_close()
2074 {
2075 /* Should unlock the device. For now do nothing. (XXX) */
2076 }
2077
2078 void sense_request(void)
2079 {
2080 int r, i;
2081 static u8_t sense[100], packet[ATAPI_PACKETSIZE];
2082
2083 packet[0] = SCSI_SENSE;
2084 packet[1] = 0;
2085 packet[2] = 0;
2086 packet[3] = 0;
2087 packet[4] = SENSE_PACKETSIZE;
2088 packet[5] = 0;
2089 packet[7] = 0;
2090 packet[8] = 0;
2091 packet[9] = 0;
2092 packet[10] = 0;
2093 packet[11] = 0;
2094
2095 for(i = 0; i < SENSE_PACKETSIZE; i++) sense[i] = 0xff;
2096 r = atapi_sendpacket(packet, SENSE_PACKETSIZE);
2097 if (r != OK) { printf("request sense command failed\n"); return; }
2098 if (atapi_intr_wait() <= 0) { printf("WARNING: request response failed\n"); }
2099
2100 if (sys_insw(w_wn->base_cmd + REG_DATA, SELF, (void *) sense, SENSE_PACKETSIZE) != OK)
2101 printf("WARNING: sense reading failed\n");
2102
2103 printf("sense data:");
2104 for(i = 0; i < SENSE_PACKETSIZE; i++) printf(" %02x", sense[i]);
2105 printf("\n");
2106 }
2107
2108 /*===========================================================================*
2109 * atapi_transfer *
2110 *===========================================================================*/
2111 PRIVATE int atapi_transfer(proc_nr, opcode, position, iov, nr_req, safe)
2112 int proc_nr; /* process doing the request */
2113 int opcode; /* DEV_GATHER or DEV_SCATTER */
2114 off_t position; /* offset on device to read or write */
2115 iovec_t *iov; /* pointer to read or write request vector */
2116 unsigned nr_req; /* length of request vector */
2117 int safe; /* use safecopies? */
2118 {
2119 struct wini *wn = w_wn;
2120 iovec_t *iop, *iov_end = iov + nr_req;
2121 int r, s, errors, fresh;
2122 u64_t pos;
2123 unsigned long block;
2124 unsigned long dv_size = cv64ul(w_dv->dv_size);
2125 unsigned nbytes, nblocks, count, before, chunk;
2126 static u8_t packet[ATAPI_PACKETSIZE];
2127 size_t addr_offset = 0;
2128
2129 errors = fresh = 0;
2130
2131 while (nr_req > 0 && !fresh) {
2132 /* The Minix block size is smaller than the CD block size, so we
2133 * may have to read extra before or after the good data.
2134 */
2135 pos = add64ul(w_dv->dv_base, position);
2136 block = div64u(pos, CD_SECTOR_SIZE);
2137 before = rem64u(pos, CD_SECTOR_SIZE);
2138
2139 /* How many bytes to transfer? */
2140 nbytes = count = 0;
2141 for (iop = iov; iop < iov_end; iop++) {
2142 nbytes += iop->iov_size;
2143 if ((before + nbytes) % CD_SECTOR_SIZE == 0) count = nbytes;
2144 }
2145
2146 /* Does one of the memory chunks end nicely on a CD sector multiple? */
2147 if (count != 0) nbytes = count;
2148
2149 /* Data comes in as words, so we have to enforce even byte counts. */
2150 if ((before | nbytes) & 1) return(EINVAL);
2151
2152 /* Which block on disk and how close to EOF? */
2153 if (position >= dv_size) return(OK); /* At EOF */
2154 if (position + nbytes > dv_size) nbytes = dv_size - position;
2155
2156 nblocks = (before + nbytes + CD_SECTOR_SIZE - 1) / CD_SECTOR_SIZE;
2157 if (ATAPI_DEBUG) {
2158 printf("block=%lu, before=%u, nbytes=%u, nblocks=%u\n",
2159 block, before, nbytes, nblocks);
2160 }
2161
2162 /* First check to see if a reinitialization is needed. */
2163 if (!(wn->state & INITIALIZED) && w_specify() != OK) return(EIO);
2164
2165 /* Build an ATAPI command packet. */
2166 packet[0] = SCSI_READ10;
2167 packet[1] = 0;
2168 packet[2] = (block >> 24) & 0xFF;
2169 packet[3] = (block >> 16) & 0xFF;
2170 packet[4] = (block >> 8) & 0xFF;
2171 packet[5] = (block >> 0) & 0xFF;
2172 packet[6] = 0;
2173 packet[7] = (nblocks >> 8) & 0xFF;
2174 packet[8] = (nblocks >> 0) & 0xFF;
2175 packet[9] = 0;
2176 packet[10] = 0;
2177 packet[11] = 0;
2178
2179 /* Tell the controller to execute the packet command. */
2180 r = atapi_sendpacket(packet, nblocks * CD_SECTOR_SIZE);
2181 if (r != OK) goto err;
2182
2183 /* Read chunks of data. */
2184 while ((r = atapi_intr_wait()) > 0) {
2185 count = r;
2186
2187 if (ATAPI_DEBUG) {
2188 printf("before=%u, nbytes=%u, count=%u\n",
2189 before, nbytes, count);
2190 }
2191
2192 while (before > 0 && count > 0) { /* Discard before. */
2193 chunk = before;
2194 if (chunk > count) chunk = count;
2195 if (chunk > DMA_BUF_SIZE) chunk = DMA_BUF_SIZE;
2196 if ((s=sys_insw(wn->base_cmd + REG_DATA, SELF, tmp_buf, chunk)) != OK)
2197 panic(w_name(),"Call to sys_insw() failed", s);
2198 before -= chunk;
2199 count -= chunk;
2200 }
2201
2202 while (nbytes > 0 && count > 0) { /* Requested data. */
2203 chunk = nbytes;
2204 if (chunk > count) chunk = count;
2205 if (chunk > iov->iov_size) chunk = iov->iov_size;
2206 if(safe) {
2207 s=sys_safe_insw(wn->base_cmd + REG_DATA, proc_nr,
2208 (void *) iov->iov_addr, addr_offset, chunk);
2209 } else {
2210 s=sys_insw(wn->base_cmd + REG_DATA, proc_nr,
2211 (void *) (iov->iov_addr + addr_offset), chunk);
2212 }
2213 if (s != OK)
2214 panic(w_name(),"Call to sys_insw() failed", s);
2215 position += chunk;
2216 nbytes -= chunk;
2217 count -= chunk;
2218 addr_offset += chunk;
2219 fresh = 0;
2220 if ((iov->iov_size -= chunk) == 0) {
2221 iov++;
2222 nr_req--;
2223 fresh = 1; /* new element is optional */
2224 addr_offset = 0;
2225 }
2226 }
2227
2228 while (count > 0) { /* Excess data. */
2229 chunk = count;
2230 if (chunk > DMA_BUF_SIZE) chunk = DMA_BUF_SIZE;
2231 if ((s=sys_insw(wn->base_cmd + REG_DATA, SELF, tmp_buf, chunk)) != OK)
2232 panic(w_name(),"Call to sys_insw() failed", s);
2233 count -= chunk;
2234 }
2235 }
2236
2237 if (r < 0) {
2238 err: /* Don't retry if too many errors. */
2239 if (atapi_debug) sense_request();
2240 if (++errors == max_errors) {
2241 w_command = CMD_IDLE;
2242 if (atapi_debug) printf("giving up (%d)\n", errors);
2243 return(EIO);
2244 }
2245 if (atapi_debug) printf("retry (%d)\n", errors);
2246 }
2247 }
2248
2249 w_command = CMD_IDLE;
2250 return(OK);
2251 }
2252
2253 /*===========================================================================*
2254 * atapi_sendpacket *
2255 *===========================================================================*/
2256 PRIVATE int atapi_sendpacket(packet, cnt)
2257 u8_t *packet;
2258 unsigned cnt;
2259 {
2260 /* Send an Atapi Packet Command */
2261 struct wini *wn = w_wn;
2262 pvb_pair_t outbyte[6]; /* vector for sys_voutb() */
2263 int s;
2264
2265 if (wn->state & IGNORING) return ERR;
2266
2267 /* Select Master/Slave drive */
2268 if ((s=sys_outb(wn->base_cmd + REG_DRIVE, wn->ldhpref)) != OK)
2269 panic(w_name(),"Couldn't select master/ slave drive",s);
2270
2271 if (!w_waitfor(STATUS_BSY | STATUS_DRQ, 0)) {
2272 printf("%s: atapi_sendpacket: drive not ready\n", w_name());
2273 return(ERR);
2274 }
2275
2276 /* Schedule a wakeup call, some controllers are flaky. This is done with
2277 * a synchronous alarm. If a timeout occurs a SYN_ALARM message is sent
2278 * from HARDWARE, so that w_intr_wait() can call w_timeout() in case the
2279 * controller was not able to execute the command. Leftover timeouts are
2280 * simply ignored by the main loop.
2281 */
2282 sys_setalarm(wakeup_ticks, 0);
2283
2284 #if _WORD_SIZE > 2
2285 if (cnt > 0xFFFE) cnt = 0xFFFE; /* Max data per interrupt. */
2286 #endif
2287
2288 w_command = ATAPI_PACKETCMD;
2289 pv_set(outbyte[0], wn->base_cmd + REG_FEAT, 0);
2290 pv_set(outbyte[1], wn->base_cmd + REG_IRR, 0);
2291 pv_set(outbyte[2], wn->base_cmd + REG_SAMTAG, 0);
2292 pv_set(outbyte[3], wn->base_cmd + REG_CNT_LO, (cnt >> 0) & 0xFF);
2293 pv_set(outbyte[4], wn->base_cmd + REG_CNT_HI, (cnt >> 8) & 0xFF);
2294 pv_set(outbyte[5], wn->base_cmd + REG_COMMAND, w_command);
2295 if (atapi_debug) printf("cmd: %x ", w_command);
2296 if ((s=sys_voutb(outbyte,6)) != OK)
2297 panic(w_name(),"Couldn't write registers with sys_voutb()",s);
2298
2299 if (!w_waitfor(STATUS_BSY | STATUS_DRQ, STATUS_DRQ)) {
2300 printf("%s: timeout (BSY|DRQ -> DRQ)\n", w_name());
2301 return(ERR);
2302 }
2303 wn->w_status |= STATUS_ADMBSY; /* Command not at all done yet. */
2304
2305 /* Send the command packet to the device. */
2306 if ((s=sys_outsw(wn->base_cmd + REG_DATA, SELF, packet, ATAPI_PACKETSIZE)) != OK)
2307 panic(w_name(),"sys_outsw() failed", s);
2308
2309 {
2310 int p;
2311 if (atapi_debug) {
2312 printf("sent command:");
2313 for(p = 0; p < ATAPI_PACKETSIZE; p++) { printf(" %02x", packet[p]); }
2314 printf("\n");
2315 }
2316 }
2317 return(OK);
2318 }
2319
2320
2321 #endif /* ENABLE_ATAPI */
2322
2323 /*===========================================================================*
2324 * w_other *
2325 *===========================================================================*/
2326 PRIVATE int w_other(dr, m, safe)
2327 struct driver *dr;
2328 message *m;
2329 int safe;
2330 {
2331 int r, timeout, prev;
2332
2333 if (m->m_type != DEV_IOCTL && m->m_type != DEV_IOCTL_S ) {
2334 return EINVAL;
2335 }
2336
2337 if (m->REQUEST == DIOCTIMEOUT) {
2338 if(safe) {
2339 r= sys_safecopyfrom(m->IO_ENDPT, (vir_bytes) m->IO_GRANT,
2340 0, (vir_bytes)&timeout, sizeof(timeout), D);
2341 } else {
2342 r= sys_datacopy(m->IO_ENDPT, (vir_bytes)m->ADDRESS,
2343 SELF, (vir_bytes)&timeout, sizeof(timeout));
2344 }
2345
2346 if(r != OK)
2347 return r;
2348
2349 if (timeout == 0) {
2350 /* Restore defaults. */
2351 timeout_ticks = DEF_TIMEOUT_TICKS;
2352 max_errors = MAX_ERRORS;
2353 wakeup_ticks = WAKEUP;
2354 w_silent = 0;
2355 } else if (timeout < 0) {
2356 return EINVAL;
2357 } else {
2358 prev = wakeup_ticks;
2359
2360 if (!w_standard_timeouts) {
2361 /* Set (lower) timeout, lower error
2362 * tolerance and set silent mode.
2363 */
2364 wakeup_ticks = timeout;
2365 max_errors = 3;
2366 w_silent = 1;
2367
2368 if (timeout_ticks > timeout)
2369 timeout_ticks = timeout;
2370 }
2371
2372 if(safe) {
2373 r= sys_safecopyto(m->IO_ENDPT,
2374 (vir_bytes) m->IO_GRANT,
2375 0, (vir_bytes)&prev, sizeof(prev), D);
2376 } else {
2377 r=sys_datacopy(SELF, (vir_bytes)&prev,
2378 m->IO_ENDPT, (vir_bytes)m->ADDRESS,
2379 sizeof(prev));
2380 }
2381
2382 if(r != OK)
2383 return r;
2384 }
2385
2386 return OK;
2387 } else if (m->REQUEST == DIOCOPENCT) {
2388 int count;
2389 if (w_prepare(m->DEVICE) == NIL_DEV) return ENXIO;
2390 count = w_wn->open_ct;
2391 if(safe) {
2392 r= sys_safecopyto(m->IO_ENDPT, (vir_bytes) m->IO_GRANT,
2393 0, (vir_bytes)&count, sizeof(count), D);
2394 } else {
2395 r=sys_datacopy(SELF, (vir_bytes)&count,
2396 m->IO_ENDPT, (vir_bytes)m->ADDRESS, sizeof(count));
2397 }
2398
2399 if(r != OK)
2400 return r;
2401
2402 return OK;
2403 }
2404 return EINVAL;
2405 }
2406
2407 /*===========================================================================*
2408 * w_hw_int *
2409 *===========================================================================*/
2410 PRIVATE int w_hw_int(dr, m)
2411 struct driver *dr;
2412 message *m;
2413 {
2414 /* Leftover interrupt(s) received; ack it/them. */
2415 ack_irqs(m->NOTIFY_ARG);
2416
2417 return OK;
2418 }
2419
2420
2421 /*===========================================================================*
2422 * ack_irqs *
2423 *===========================================================================*/
2424 PRIVATE void ack_irqs(unsigned int irqs)
2425 {
2426 unsigned int drive;
2427 unsigned long w_status;
2428
2429 for (drive = 0; drive < MAX_DRIVES && irqs; drive++) {
2430 if (!(wini[drive].state & IGNORING) && wini[drive].irq_need_ack &&
2431 (wini[drive].irq_mask & irqs)) {
2432 if (sys_inb((wini[drive].base_cmd + REG_STATUS),
2433 &w_status) != OK)
2434 {
2435 panic(w_name(), "couldn't ack irq on drive %d\n",
2436 drive);
2437 }
2438 wini[drive].w_status= w_status;
2439 if (sys_irqenable(&wini[drive].irq_hook_id) != OK)
2440 printf("couldn't re-enable drive %d\n", drive);
2441 irqs &= ~wini[drive].irq_mask;
2442 }
2443 }
2444 }
2445
2446
2447 #define STSTR(a) if (status & STATUS_ ## a) { strcat(str, #a); strcat(str, " "); }
2448 #define ERRSTR(a) if (e & ERROR_ ## a) { strcat(str, #a); strcat(str, " "); }
2449 char *strstatus(int status)
2450 {
2451 static char str[200];
2452 str[0] = '\0';
2453
2454 STSTR(BSY);
2455 STSTR(DRDY);
2456 STSTR(DMADF);
2457 STSTR(SRVCDSC);
2458 STSTR(DRQ);
2459 STSTR(CORR);
2460 STSTR(CHECK);
2461 return str;
2462 }
2463
2464 char *strerr(int e)
2465 {
2466 static char str[200];
2467 str[0] = '\0';
2468
2469 ERRSTR(BB);
2470 ERRSTR(ECC);
2471 ERRSTR(ID);
2472 ERRSTR(AC);
2473 ERRSTR(TK);
2474 ERRSTR(DM);
2475
2476 return str;
2477 }
2478
2479 #if ENABLE_ATAPI
2480
2481 /*===========================================================================*
2482 * atapi_intr_wait *
2483 *===========================================================================*/
2484 PRIVATE int atapi_intr_wait()
2485 {
2486 /* Wait for an interrupt and study the results. Returns a number of bytes
2487 * that need to be transferred, or an error code.
2488 */
2489 struct wini *wn = w_wn;
2490 pvb_pair_t inbyte[4]; /* vector for sys_vinb() */
2491 int s; /* status for sys_vinb() */
2492 int e;
2493 int len;
2494 int irr;
2495 int r;
2496 int phase;
2497
2498 w_intr_wait();
2499
2500 /* Request series of device I/O. */
2501 inbyte[0].port = wn->base_cmd + REG_ERROR;
2502 inbyte[1].port = wn->base_cmd + REG_CNT_LO;
2503 inbyte[2].port = wn->base_cmd + REG_CNT_HI;
2504 inbyte[3].port = wn->base_cmd + REG_IRR;
2505 if ((s=sys_vinb(inbyte, 4)) != OK)
2506 panic(w_name(),"ATAPI failed sys_vinb()", s);
2507 e = inbyte[0].value;
2508 len = inbyte[1].value;
2509 len |= inbyte[2].value << 8;
2510 irr = inbyte[3].value;
2511
2512 #if ATAPI_DEBUG
2513 printf("wn %p S=%x=%s E=%02x=%s L=%04x I=%02x\n", wn, wn->w_status, strstatus(wn->w_status), e, strerr(e), len, irr);
2514 #endif
2515 if (wn->w_status & (STATUS_BSY | STATUS_CHECK)) {
2516 if (atapi_debug) {
2517 printf("atapi fail: S=%x=%s E=%02x=%s L=%04x I=%02x\n", wn->w_status, strstatus(wn->w_status), e, strerr(e), len, irr);
2518 }
2519 return ERR;
2520 }
2521
2522 phase = (wn->w_status & STATUS_DRQ) | (irr & (IRR_COD | IRR_IO));
2523
2524 switch (phase) {
2525 case IRR_COD | IRR_IO:
2526 if (ATAPI_DEBUG) printf("ACD: Phase Command Complete\n");
2527 r = OK;
2528 break;
2529 case 0:
2530 if (ATAPI_DEBUG) printf("ACD: Phase Command Aborted\n");
2531 r = ERR;
2532 break;
2533 case STATUS_DRQ | IRR_COD:
2534 if (ATAPI_DEBUG) printf("ACD: Phase Command Out\n");
2535 r = ERR;
2536 break;
2537 case STATUS_DRQ:
2538 if (ATAPI_DEBUG) printf("ACD: Phase Data Out %d\n", len);
2539 r = len;
2540 break;
2541 case STATUS_DRQ | IRR_IO:
2542 if (ATAPI_DEBUG) printf("ACD: Phase Data In %d\n", len);
2543 r = len;
2544 break;
2545 default:
2546 if (ATAPI_DEBUG) printf("ACD: Phase Unknown\n");
2547 r = ERR;
2548 break;
2549 }
2550
2551 #if 0
2552 /* retry if the media changed */
2553 XXX while (phase == (IRR_IO | IRR_COD) && (wn->w_status & STATUS_CHECK)
2554 && (e & ERROR_SENSE) == SENSE_UATTN && --try > 0);
2555 #endif
2556
2557 wn->w_status |= STATUS_ADMBSY; /* Assume not done yet. */
2558 return(r);
2559 }
2560 #endif /* ENABLE_ATAPI */
MINIX 3 (repo.or.cz mirror)