"[PATCH] Fix leaks on /proc/{*/sched,sched_debug,timer_list,timer_stats}" and
[mmotm.git] / arch / arm / mach-davinci / board-dm644x-evm.c
blob00a80467b491f5aa3a98e693eb797a774fdbc27d
1 /*
2 * TI DaVinci EVM board support
4 * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
6 * 2007 (c) MontaVista Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/dma-mapping.h>
14 #include <linux/platform_device.h>
15 #include <linux/gpio.h>
16 #include <linux/i2c.h>
17 #include <linux/i2c/pcf857x.h>
18 #include <linux/i2c/at24.h>
19 #include <linux/mtd/mtd.h>
20 #include <linux/mtd/nand.h>
21 #include <linux/mtd/partitions.h>
22 #include <linux/mtd/physmap.h>
23 #include <linux/phy.h>
24 #include <linux/clk.h>
25 #include <linux/videodev2.h>
27 #include <media/tvp514x.h>
29 #include <asm/mach-types.h>
30 #include <asm/mach/arch.h>
32 #include <mach/dm644x.h>
33 #include <mach/common.h>
34 #include <mach/i2c.h>
35 #include <mach/serial.h>
36 #include <mach/mux.h>
37 #include <mach/nand.h>
38 #include <mach/mmc.h>
40 #define DM644X_EVM_PHY_MASK (0x2)
41 #define DM644X_EVM_MDIO_FREQUENCY (2200000) /* PHY bus frequency */
43 #define DAVINCI_CFC_ATA_BASE 0x01C66000
45 #define DAVINCI_ASYNC_EMIF_CONTROL_BASE 0x01e00000
46 #define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x02000000
47 #define DAVINCI_ASYNC_EMIF_DATA_CE1_BASE 0x04000000
48 #define DAVINCI_ASYNC_EMIF_DATA_CE2_BASE 0x06000000
49 #define DAVINCI_ASYNC_EMIF_DATA_CE3_BASE 0x08000000
51 #define LXT971_PHY_ID (0x001378e2)
52 #define LXT971_PHY_MASK (0xfffffff0)
54 static struct mtd_partition davinci_evm_norflash_partitions[] = {
55 /* bootloader (UBL, U-Boot, etc) in first 5 sectors */
57 .name = "bootloader",
58 .offset = 0,
59 .size = 5 * SZ_64K,
60 .mask_flags = MTD_WRITEABLE, /* force read-only */
62 /* bootloader params in the next 1 sectors */
64 .name = "params",
65 .offset = MTDPART_OFS_APPEND,
66 .size = SZ_64K,
67 .mask_flags = 0,
69 /* kernel */
71 .name = "kernel",
72 .offset = MTDPART_OFS_APPEND,
73 .size = SZ_2M,
74 .mask_flags = 0
76 /* file system */
78 .name = "filesystem",
79 .offset = MTDPART_OFS_APPEND,
80 .size = MTDPART_SIZ_FULL,
81 .mask_flags = 0
85 static struct physmap_flash_data davinci_evm_norflash_data = {
86 .width = 2,
87 .parts = davinci_evm_norflash_partitions,
88 .nr_parts = ARRAY_SIZE(davinci_evm_norflash_partitions),
91 /* NOTE: CFI probe will correctly detect flash part as 32M, but EMIF
92 * limits addresses to 16M, so using addresses past 16M will wrap */
93 static struct resource davinci_evm_norflash_resource = {
94 .start = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE,
95 .end = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
96 .flags = IORESOURCE_MEM,
99 static struct platform_device davinci_evm_norflash_device = {
100 .name = "physmap-flash",
101 .id = 0,
102 .dev = {
103 .platform_data = &davinci_evm_norflash_data,
105 .num_resources = 1,
106 .resource = &davinci_evm_norflash_resource,
109 /* DM644x EVM includes a 64 MByte small-page NAND flash (16K blocks).
110 * It may used instead of the (default) NOR chip to boot, using TI's
111 * tools to install the secondary boot loader (UBL) and U-Boot.
113 struct mtd_partition davinci_evm_nandflash_partition[] = {
114 /* Bootloader layout depends on whose u-boot is installed, but we
115 * can hide all the details.
116 * - block 0 for u-boot environment ... in mainline u-boot
117 * - block 1 for UBL (plus up to four backup copies in blocks 2..5)
118 * - blocks 6...? for u-boot
119 * - blocks 16..23 for u-boot environment ... in TI's u-boot
122 .name = "bootloader",
123 .offset = 0,
124 .size = SZ_256K + SZ_128K,
125 .mask_flags = MTD_WRITEABLE, /* force read-only */
127 /* Kernel */
129 .name = "kernel",
130 .offset = MTDPART_OFS_APPEND,
131 .size = SZ_4M,
132 .mask_flags = 0,
134 /* File system (older GIT kernels started this on the 5MB mark) */
136 .name = "filesystem",
137 .offset = MTDPART_OFS_APPEND,
138 .size = MTDPART_SIZ_FULL,
139 .mask_flags = 0,
141 /* A few blocks at end hold a flash BBT ... created by TI's CCS
142 * using flashwriter_nand.out, but ignored by TI's versions of
143 * Linux and u-boot. We boot faster by using them.
147 static struct davinci_nand_pdata davinci_evm_nandflash_data = {
148 .parts = davinci_evm_nandflash_partition,
149 .nr_parts = ARRAY_SIZE(davinci_evm_nandflash_partition),
150 .ecc_mode = NAND_ECC_HW,
151 .options = NAND_USE_FLASH_BBT,
154 static struct resource davinci_evm_nandflash_resource[] = {
156 .start = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE,
157 .end = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
158 .flags = IORESOURCE_MEM,
159 }, {
160 .start = DAVINCI_ASYNC_EMIF_CONTROL_BASE,
161 .end = DAVINCI_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
162 .flags = IORESOURCE_MEM,
166 static struct platform_device davinci_evm_nandflash_device = {
167 .name = "davinci_nand",
168 .id = 0,
169 .dev = {
170 .platform_data = &davinci_evm_nandflash_data,
172 .num_resources = ARRAY_SIZE(davinci_evm_nandflash_resource),
173 .resource = davinci_evm_nandflash_resource,
176 static u64 davinci_fb_dma_mask = DMA_BIT_MASK(32);
178 static struct platform_device davinci_fb_device = {
179 .name = "davincifb",
180 .id = -1,
181 .dev = {
182 .dma_mask = &davinci_fb_dma_mask,
183 .coherent_dma_mask = DMA_BIT_MASK(32),
185 .num_resources = 0,
188 static struct tvp514x_platform_data tvp5146_pdata = {
189 .clk_polarity = 0,
190 .hs_polarity = 1,
191 .vs_polarity = 1
194 #define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
195 /* Inputs available at the TVP5146 */
196 static struct v4l2_input tvp5146_inputs[] = {
198 .index = 0,
199 .name = "Composite",
200 .type = V4L2_INPUT_TYPE_CAMERA,
201 .std = TVP514X_STD_ALL,
204 .index = 1,
205 .name = "S-Video",
206 .type = V4L2_INPUT_TYPE_CAMERA,
207 .std = TVP514X_STD_ALL,
212 * this is the route info for connecting each input to decoder
213 * ouput that goes to vpfe. There is a one to one correspondence
214 * with tvp5146_inputs
216 static struct vpfe_route tvp5146_routes[] = {
218 .input = INPUT_CVBS_VI2B,
219 .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
222 .input = INPUT_SVIDEO_VI2C_VI1C,
223 .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
227 static struct vpfe_subdev_info vpfe_sub_devs[] = {
229 .name = "tvp5146",
230 .grp_id = 0,
231 .num_inputs = ARRAY_SIZE(tvp5146_inputs),
232 .inputs = tvp5146_inputs,
233 .routes = tvp5146_routes,
234 .can_route = 1,
235 .ccdc_if_params = {
236 .if_type = VPFE_BT656,
237 .hdpol = VPFE_PINPOL_POSITIVE,
238 .vdpol = VPFE_PINPOL_POSITIVE,
240 .board_info = {
241 I2C_BOARD_INFO("tvp5146", 0x5d),
242 .platform_data = &tvp5146_pdata,
247 static struct vpfe_config vpfe_cfg = {
248 .num_subdevs = ARRAY_SIZE(vpfe_sub_devs),
249 .sub_devs = vpfe_sub_devs,
250 .card_name = "DM6446 EVM",
251 .ccdc = "DM6446 CCDC",
254 static struct platform_device rtc_dev = {
255 .name = "rtc_davinci_evm",
256 .id = -1,
259 static struct resource ide_resources[] = {
261 .start = DAVINCI_CFC_ATA_BASE,
262 .end = DAVINCI_CFC_ATA_BASE + 0x7ff,
263 .flags = IORESOURCE_MEM,
266 .start = IRQ_IDE,
267 .end = IRQ_IDE,
268 .flags = IORESOURCE_IRQ,
272 static u64 ide_dma_mask = DMA_BIT_MASK(32);
274 static struct platform_device ide_dev = {
275 .name = "palm_bk3710",
276 .id = -1,
277 .resource = ide_resources,
278 .num_resources = ARRAY_SIZE(ide_resources),
279 .dev = {
280 .dma_mask = &ide_dma_mask,
281 .coherent_dma_mask = DMA_BIT_MASK(32),
285 static struct snd_platform_data dm644x_evm_snd_data;
287 /*----------------------------------------------------------------------*/
290 * I2C GPIO expanders
293 #define PCF_Uxx_BASE(x) (DAVINCI_N_GPIO + ((x) * 8))
296 /* U2 -- LEDs */
298 static struct gpio_led evm_leds[] = {
299 { .name = "DS8", .active_low = 1,
300 .default_trigger = "heartbeat", },
301 { .name = "DS7", .active_low = 1, },
302 { .name = "DS6", .active_low = 1, },
303 { .name = "DS5", .active_low = 1, },
304 { .name = "DS4", .active_low = 1, },
305 { .name = "DS3", .active_low = 1, },
306 { .name = "DS2", .active_low = 1,
307 .default_trigger = "mmc0", },
308 { .name = "DS1", .active_low = 1,
309 .default_trigger = "ide-disk", },
312 static const struct gpio_led_platform_data evm_led_data = {
313 .num_leds = ARRAY_SIZE(evm_leds),
314 .leds = evm_leds,
317 static struct platform_device *evm_led_dev;
319 static int
320 evm_led_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
322 struct gpio_led *leds = evm_leds;
323 int status;
325 while (ngpio--) {
326 leds->gpio = gpio++;
327 leds++;
330 /* what an extremely annoying way to be forced to handle
331 * device unregistration ...
333 evm_led_dev = platform_device_alloc("leds-gpio", 0);
334 platform_device_add_data(evm_led_dev,
335 &evm_led_data, sizeof evm_led_data);
337 evm_led_dev->dev.parent = &client->dev;
338 status = platform_device_add(evm_led_dev);
339 if (status < 0) {
340 platform_device_put(evm_led_dev);
341 evm_led_dev = NULL;
343 return status;
346 static int
347 evm_led_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
349 if (evm_led_dev) {
350 platform_device_unregister(evm_led_dev);
351 evm_led_dev = NULL;
353 return 0;
356 static struct pcf857x_platform_data pcf_data_u2 = {
357 .gpio_base = PCF_Uxx_BASE(0),
358 .setup = evm_led_setup,
359 .teardown = evm_led_teardown,
363 /* U18 - A/V clock generator and user switch */
365 static int sw_gpio;
367 static ssize_t
368 sw_show(struct device *d, struct device_attribute *a, char *buf)
370 char *s = gpio_get_value_cansleep(sw_gpio) ? "on\n" : "off\n";
372 strcpy(buf, s);
373 return strlen(s);
376 static DEVICE_ATTR(user_sw, S_IRUGO, sw_show, NULL);
378 static int
379 evm_u18_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
381 int status;
383 /* export dip switch option */
384 sw_gpio = gpio + 7;
385 status = gpio_request(sw_gpio, "user_sw");
386 if (status == 0)
387 status = gpio_direction_input(sw_gpio);
388 if (status == 0)
389 status = device_create_file(&client->dev, &dev_attr_user_sw);
390 else
391 gpio_free(sw_gpio);
392 if (status != 0)
393 sw_gpio = -EINVAL;
395 /* audio PLL: 48 kHz (vs 44.1 or 32), single rate (vs double) */
396 gpio_request(gpio + 3, "pll_fs2");
397 gpio_direction_output(gpio + 3, 0);
399 gpio_request(gpio + 2, "pll_fs1");
400 gpio_direction_output(gpio + 2, 0);
402 gpio_request(gpio + 1, "pll_sr");
403 gpio_direction_output(gpio + 1, 0);
405 return 0;
408 static int
409 evm_u18_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
411 gpio_free(gpio + 1);
412 gpio_free(gpio + 2);
413 gpio_free(gpio + 3);
415 if (sw_gpio > 0) {
416 device_remove_file(&client->dev, &dev_attr_user_sw);
417 gpio_free(sw_gpio);
419 return 0;
422 static struct pcf857x_platform_data pcf_data_u18 = {
423 .gpio_base = PCF_Uxx_BASE(1),
424 .n_latch = (1 << 3) | (1 << 2) | (1 << 1),
425 .setup = evm_u18_setup,
426 .teardown = evm_u18_teardown,
430 /* U35 - various I/O signals used to manage USB, CF, ATA, etc */
432 static int
433 evm_u35_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
435 /* p0 = nDRV_VBUS (initial: don't supply it) */
436 gpio_request(gpio + 0, "nDRV_VBUS");
437 gpio_direction_output(gpio + 0, 1);
439 /* p1 = VDDIMX_EN */
440 gpio_request(gpio + 1, "VDDIMX_EN");
441 gpio_direction_output(gpio + 1, 1);
443 /* p2 = VLYNQ_EN */
444 gpio_request(gpio + 2, "VLYNQ_EN");
445 gpio_direction_output(gpio + 2, 1);
447 /* p3 = n3V3_CF_RESET (initial: stay in reset) */
448 gpio_request(gpio + 3, "nCF_RESET");
449 gpio_direction_output(gpio + 3, 0);
451 /* (p4 unused) */
453 /* p5 = 1V8_WLAN_RESET (initial: stay in reset) */
454 gpio_request(gpio + 5, "WLAN_RESET");
455 gpio_direction_output(gpio + 5, 1);
457 /* p6 = nATA_SEL (initial: select) */
458 gpio_request(gpio + 6, "nATA_SEL");
459 gpio_direction_output(gpio + 6, 0);
461 /* p7 = nCF_SEL (initial: deselect) */
462 gpio_request(gpio + 7, "nCF_SEL");
463 gpio_direction_output(gpio + 7, 1);
465 /* irlml6401 switches over 1A, in under 8 msec;
466 * now it can be managed by nDRV_VBUS ...
468 setup_usb(500, 8);
470 return 0;
473 static int
474 evm_u35_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
476 gpio_free(gpio + 7);
477 gpio_free(gpio + 6);
478 gpio_free(gpio + 5);
479 gpio_free(gpio + 3);
480 gpio_free(gpio + 2);
481 gpio_free(gpio + 1);
482 gpio_free(gpio + 0);
483 return 0;
486 static struct pcf857x_platform_data pcf_data_u35 = {
487 .gpio_base = PCF_Uxx_BASE(2),
488 .setup = evm_u35_setup,
489 .teardown = evm_u35_teardown,
492 /*----------------------------------------------------------------------*/
494 /* Most of this EEPROM is unused, but U-Boot uses some data:
495 * - 0x7f00, 6 bytes Ethernet Address
496 * - 0x0039, 1 byte NTSC vs PAL (bit 0x80 == PAL)
497 * - ... newer boards may have more
500 static struct at24_platform_data eeprom_info = {
501 .byte_len = (256*1024) / 8,
502 .page_size = 64,
503 .flags = AT24_FLAG_ADDR16,
504 .setup = davinci_get_mac_addr,
505 .context = (void *)0x7f00,
509 * MSP430 supports RTC, card detection, input from IR remote, and
510 * a bit more. It triggers interrupts on GPIO(7) from pressing
511 * buttons on the IR remote, and for card detect switches.
513 static struct i2c_client *dm6446evm_msp;
515 static int dm6446evm_msp_probe(struct i2c_client *client,
516 const struct i2c_device_id *id)
518 dm6446evm_msp = client;
519 return 0;
522 static int dm6446evm_msp_remove(struct i2c_client *client)
524 dm6446evm_msp = NULL;
525 return 0;
528 static const struct i2c_device_id dm6446evm_msp_ids[] = {
529 { "dm6446evm_msp", 0, },
530 { /* end of list */ },
533 static struct i2c_driver dm6446evm_msp_driver = {
534 .driver.name = "dm6446evm_msp",
535 .id_table = dm6446evm_msp_ids,
536 .probe = dm6446evm_msp_probe,
537 .remove = dm6446evm_msp_remove,
540 static int dm6444evm_msp430_get_pins(void)
542 static const char txbuf[2] = { 2, 4, };
543 char buf[4];
544 struct i2c_msg msg[2] = {
546 .addr = dm6446evm_msp->addr,
547 .flags = 0,
548 .len = 2,
549 .buf = (void __force *)txbuf,
552 .addr = dm6446evm_msp->addr,
553 .flags = I2C_M_RD,
554 .len = 4,
555 .buf = buf,
558 int status;
560 if (!dm6446evm_msp)
561 return -ENXIO;
563 /* Command 4 == get input state, returns port 2 and port3 data
564 * S Addr W [A] len=2 [A] cmd=4 [A]
565 * RS Addr R [A] [len=4] A [cmd=4] A [port2] A [port3] N P
567 status = i2c_transfer(dm6446evm_msp->adapter, msg, 2);
568 if (status < 0)
569 return status;
571 dev_dbg(&dm6446evm_msp->dev,
572 "PINS: %02x %02x %02x %02x\n",
573 buf[0], buf[1], buf[2], buf[3]);
575 return (buf[3] << 8) | buf[2];
578 static int dm6444evm_mmc_get_cd(int module)
580 int status = dm6444evm_msp430_get_pins();
582 return (status < 0) ? status : !(status & BIT(1));
585 static int dm6444evm_mmc_get_ro(int module)
587 int status = dm6444evm_msp430_get_pins();
589 return (status < 0) ? status : status & BIT(6 + 8);
592 static struct davinci_mmc_config dm6446evm_mmc_config = {
593 .get_cd = dm6444evm_mmc_get_cd,
594 .get_ro = dm6444evm_mmc_get_ro,
595 .wires = 4,
596 .version = MMC_CTLR_VERSION_1
599 static struct i2c_board_info __initdata i2c_info[] = {
601 I2C_BOARD_INFO("dm6446evm_msp", 0x23),
604 I2C_BOARD_INFO("pcf8574", 0x38),
605 .platform_data = &pcf_data_u2,
608 I2C_BOARD_INFO("pcf8574", 0x39),
609 .platform_data = &pcf_data_u18,
612 I2C_BOARD_INFO("pcf8574", 0x3a),
613 .platform_data = &pcf_data_u35,
616 I2C_BOARD_INFO("24c256", 0x50),
617 .platform_data = &eeprom_info,
620 I2C_BOARD_INFO("tlv320aic33", 0x1b),
624 /* The msp430 uses a slow bitbanged I2C implementation (ergo 20 KHz),
625 * which requires 100 usec of idle bus after i2c writes sent to it.
627 static struct davinci_i2c_platform_data i2c_pdata = {
628 .bus_freq = 20 /* kHz */,
629 .bus_delay = 100 /* usec */,
632 static void __init evm_init_i2c(void)
634 davinci_init_i2c(&i2c_pdata);
635 i2c_add_driver(&dm6446evm_msp_driver);
636 i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
639 static struct platform_device *davinci_evm_devices[] __initdata = {
640 &davinci_fb_device,
641 &rtc_dev,
644 static struct davinci_uart_config uart_config __initdata = {
645 .enabled_uarts = (1 << 0),
648 static void __init
649 davinci_evm_map_io(void)
651 /* setup input configuration for VPFE input devices */
652 dm644x_set_vpfe_config(&vpfe_cfg);
653 dm644x_init();
656 static int davinci_phy_fixup(struct phy_device *phydev)
658 unsigned int control;
659 /* CRITICAL: Fix for increasing PHY signal drive strength for
660 * TX lockup issue. On DaVinci EVM, the Intel LXT971 PHY
661 * signal strength was low causing TX to fail randomly. The
662 * fix is to Set bit 11 (Increased MII drive strength) of PHY
663 * register 26 (Digital Config register) on this phy. */
664 control = phy_read(phydev, 26);
665 phy_write(phydev, 26, (control | 0x800));
666 return 0;
669 #if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
670 defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE)
671 #define HAS_ATA 1
672 #else
673 #define HAS_ATA 0
674 #endif
676 #if defined(CONFIG_MTD_PHYSMAP) || \
677 defined(CONFIG_MTD_PHYSMAP_MODULE)
678 #define HAS_NOR 1
679 #else
680 #define HAS_NOR 0
681 #endif
683 #if defined(CONFIG_MTD_NAND_DAVINCI) || \
684 defined(CONFIG_MTD_NAND_DAVINCI_MODULE)
685 #define HAS_NAND 1
686 #else
687 #define HAS_NAND 0
688 #endif
690 static __init void davinci_evm_init(void)
692 struct clk *aemif_clk;
693 struct davinci_soc_info *soc_info = &davinci_soc_info;
695 aemif_clk = clk_get(NULL, "aemif");
696 clk_enable(aemif_clk);
698 if (HAS_ATA) {
699 if (HAS_NAND || HAS_NOR)
700 pr_warning("WARNING: both IDE and Flash are "
701 "enabled, but they share AEMIF pins.\n"
702 "\tDisable IDE for NAND/NOR support.\n");
703 davinci_cfg_reg(DM644X_HPIEN_DISABLE);
704 davinci_cfg_reg(DM644X_ATAEN);
705 davinci_cfg_reg(DM644X_HDIREN);
706 platform_device_register(&ide_dev);
707 } else if (HAS_NAND || HAS_NOR) {
708 davinci_cfg_reg(DM644X_HPIEN_DISABLE);
709 davinci_cfg_reg(DM644X_ATAEN_DISABLE);
711 /* only one device will be jumpered and detected */
712 if (HAS_NAND) {
713 platform_device_register(&davinci_evm_nandflash_device);
714 evm_leds[7].default_trigger = "nand-disk";
715 if (HAS_NOR)
716 pr_warning("WARNING: both NAND and NOR flash "
717 "are enabled; disable one of them.\n");
718 } else if (HAS_NOR)
719 platform_device_register(&davinci_evm_norflash_device);
722 platform_add_devices(davinci_evm_devices,
723 ARRAY_SIZE(davinci_evm_devices));
724 evm_init_i2c();
726 davinci_setup_mmc(0, &dm6446evm_mmc_config);
728 davinci_serial_init(&uart_config);
729 dm644x_init_asp(&dm644x_evm_snd_data);
731 soc_info->emac_pdata->phy_mask = DM644X_EVM_PHY_MASK;
732 soc_info->emac_pdata->mdio_max_freq = DM644X_EVM_MDIO_FREQUENCY;
734 /* Register the fixup for PHY on DaVinci */
735 phy_register_fixup_for_uid(LXT971_PHY_ID, LXT971_PHY_MASK,
736 davinci_phy_fixup);
740 static __init void davinci_evm_irq_init(void)
742 davinci_irq_init();
745 MACHINE_START(DAVINCI_EVM, "DaVinci DM644x EVM")
746 /* Maintainer: MontaVista Software <source@mvista.com> */
747 .phys_io = IO_PHYS,
748 .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
749 .boot_params = (DAVINCI_DDR_BASE + 0x100),
750 .map_io = davinci_evm_map_io,
751 .init_irq = davinci_evm_irq_init,
752 .timer = &davinci_timer,
753 .init_machine = davinci_evm_init,
754 MACHINE_END