2 * linux/arch/$(ARCH)/platform/$(PLATFORM)/ints.c
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file COPYING in the main directory of this archive
8 * Copyright (c) 2000 Michael Leslie <mleslie@lineo.com>
9 * Copyright (c) 1996 Roman Zippel
10 * Copyright (c) 1999 D. Jeff Dionne <jeff@uclinux.org>
13 #include <linux/types.h>
14 #include <linux/kernel.h>
15 #include <linux/init.h>
16 #include <linux/interrupt.h>
17 #include <linux/irq.h>
18 #include <asm/traps.h>
19 #include <asm/machdep.h>
20 #include <asm/m68360.h>
22 /* from quicc/commproc.c: */
24 extern void cpm_interrupt_init(void);
26 #define INTERNAL_IRQS (96)
28 /* assembler routines */
29 asmlinkage
void system_call(void);
30 asmlinkage
void buserr(void);
31 asmlinkage
void trap(void);
32 asmlinkage
void bad_interrupt(void);
33 asmlinkage
void inthandler(void);
35 extern void *_ramvec
[];
37 /* The number of spurious interrupts */
38 volatile unsigned int num_spurious
;
40 static void intc_irq_unmask(unsigned int irq
)
42 pquicc
->intr_cimr
|= (1 << irq
);
45 static void intc_irq_mask(unsigned int irq
)
47 pquicc
->intr_cimr
&= ~(1 << irq
);
50 static void intc_irq_ack(unsigned int irq
)
52 pquicc
->intr_cisr
= (1 << irq
);
55 static struct irq_chip intc_irq_chip
= {
57 .mask
= intc_irq_mask
,
58 .unmask
= intc_irq_unmask
,
63 * This function should be called during kernel startup to initialize
69 int vba
= (CPM_VECTOR_BASE
<<4);
71 /* set up the vectors */
87 _ramvec
[32] = system_call
;
92 /* set up CICR for vector base address and irq level */
93 /* irl = 4, hp = 1f - see MC68360UM p 7-377 */
94 pquicc
->intr_cicr
= 0x00e49f00 | vba
;
96 /* CPM interrupt vectors: (p 7-376) */
97 _ramvec
[vba
+CPMVEC_ERROR
] = bad_interrupt
; /* Error */
98 _ramvec
[vba
+CPMVEC_PIO_PC11
] = inthandler
; /* pio - pc11 */
99 _ramvec
[vba
+CPMVEC_PIO_PC10
] = inthandler
; /* pio - pc10 */
100 _ramvec
[vba
+CPMVEC_SMC2
] = inthandler
; /* smc2/pip */
101 _ramvec
[vba
+CPMVEC_SMC1
] = inthandler
; /* smc1 */
102 _ramvec
[vba
+CPMVEC_SPI
] = inthandler
; /* spi */
103 _ramvec
[vba
+CPMVEC_PIO_PC9
] = inthandler
; /* pio - pc9 */
104 _ramvec
[vba
+CPMVEC_TIMER4
] = inthandler
; /* timer 4 */
105 _ramvec
[vba
+CPMVEC_RESERVED1
] = inthandler
; /* reserved */
106 _ramvec
[vba
+CPMVEC_PIO_PC8
] = inthandler
; /* pio - pc8 */
107 _ramvec
[vba
+CPMVEC_PIO_PC7
] = inthandler
; /* pio - pc7 */
108 _ramvec
[vba
+CPMVEC_PIO_PC6
] = inthandler
; /* pio - pc6 */
109 _ramvec
[vba
+CPMVEC_TIMER3
] = inthandler
; /* timer 3 */
110 _ramvec
[vba
+CPMVEC_RISCTIMER
] = inthandler
; /* reserved */
111 _ramvec
[vba
+CPMVEC_PIO_PC5
] = inthandler
; /* pio - pc5 */
112 _ramvec
[vba
+CPMVEC_PIO_PC4
] = inthandler
; /* pio - pc4 */
113 _ramvec
[vba
+CPMVEC_RESERVED2
] = inthandler
; /* reserved */
114 _ramvec
[vba
+CPMVEC_RISCTIMER
] = inthandler
; /* timer table */
115 _ramvec
[vba
+CPMVEC_TIMER2
] = inthandler
; /* timer 2 */
116 _ramvec
[vba
+CPMVEC_RESERVED3
] = inthandler
; /* reserved */
117 _ramvec
[vba
+CPMVEC_IDMA2
] = inthandler
; /* idma 2 */
118 _ramvec
[vba
+CPMVEC_IDMA1
] = inthandler
; /* idma 1 */
119 _ramvec
[vba
+CPMVEC_SDMA_CB_ERR
] = inthandler
; /* sdma channel bus error */
120 _ramvec
[vba
+CPMVEC_PIO_PC3
] = inthandler
; /* pio - pc3 */
121 _ramvec
[vba
+CPMVEC_PIO_PC2
] = inthandler
; /* pio - pc2 */
122 /* _ramvec[vba+CPMVEC_TIMER1] = cpm_isr_timer1; */ /* timer 1 */
123 _ramvec
[vba
+CPMVEC_TIMER1
] = inthandler
; /* timer 1 */
124 _ramvec
[vba
+CPMVEC_PIO_PC1
] = inthandler
; /* pio - pc1 */
125 _ramvec
[vba
+CPMVEC_SCC4
] = inthandler
; /* scc 4 */
126 _ramvec
[vba
+CPMVEC_SCC3
] = inthandler
; /* scc 3 */
127 _ramvec
[vba
+CPMVEC_SCC2
] = inthandler
; /* scc 2 */
128 _ramvec
[vba
+CPMVEC_SCC1
] = inthandler
; /* scc 1 */
129 _ramvec
[vba
+CPMVEC_PIO_PC0
] = inthandler
; /* pio - pc0 */
132 /* turn off all CPM interrupts */
133 pquicc
->intr_cimr
= 0x00000000;
135 for (i
= 0; (i
< NR_IRQS
); i
++) {
136 irq_desc
[i
].status
= IRQ_DISABLED
;
137 irq_desc
[i
].action
= NULL
;
138 irq_desc
[i
].depth
= 1;
139 irq_desc
[i
].chip
= &intc_irq_chip
;