"[PATCH] Fix leaks on /proc/{*/sched,sched_debug,timer_list,timer_stats}" and
[mmotm.git] / arch / mips / include / asm / mach-bcm63xx / bcm63xx_io.h
blob91180fac6ed9ce82ba5eb731e0ccb37f6f367613
1 #ifndef BCM63XX_IO_H_
2 #define BCM63XX_IO_H_
4 #include "bcm63xx_cpu.h"
6 /*
7 * Physical memory map, RAM is mapped at 0x0.
9 * Note that size MUST be a power of two.
11 #define BCM_PCMCIA_COMMON_BASE_PA (0x20000000)
12 #define BCM_PCMCIA_COMMON_SIZE (16 * 1024 * 1024)
13 #define BCM_PCMCIA_COMMON_END_PA (BCM_PCMCIA_COMMON_BASE_PA + \
14 BCM_PCMCIA_COMMON_SIZE - 1)
16 #define BCM_PCMCIA_ATTR_BASE_PA (0x21000000)
17 #define BCM_PCMCIA_ATTR_SIZE (16 * 1024 * 1024)
18 #define BCM_PCMCIA_ATTR_END_PA (BCM_PCMCIA_ATTR_BASE_PA + \
19 BCM_PCMCIA_ATTR_SIZE - 1)
21 #define BCM_PCMCIA_IO_BASE_PA (0x22000000)
22 #define BCM_PCMCIA_IO_SIZE (64 * 1024)
23 #define BCM_PCMCIA_IO_END_PA (BCM_PCMCIA_IO_BASE_PA + \
24 BCM_PCMCIA_IO_SIZE - 1)
26 #define BCM_PCI_MEM_BASE_PA (0x30000000)
27 #define BCM_PCI_MEM_SIZE (128 * 1024 * 1024)
28 #define BCM_PCI_MEM_END_PA (BCM_PCI_MEM_BASE_PA + \
29 BCM_PCI_MEM_SIZE - 1)
31 #define BCM_PCI_IO_BASE_PA (0x08000000)
32 #define BCM_PCI_IO_SIZE (64 * 1024)
33 #define BCM_PCI_IO_END_PA (BCM_PCI_IO_BASE_PA + \
34 BCM_PCI_IO_SIZE - 1)
35 #define BCM_PCI_IO_HALF_PA (BCM_PCI_IO_BASE_PA + \
36 (BCM_PCI_IO_SIZE / 2) - 1)
38 #define BCM_CB_MEM_BASE_PA (0x38000000)
39 #define BCM_CB_MEM_SIZE (128 * 1024 * 1024)
40 #define BCM_CB_MEM_END_PA (BCM_CB_MEM_BASE_PA + \
41 BCM_CB_MEM_SIZE - 1)
45 * Internal registers are accessed through KSEG3
47 #define BCM_REGS_VA(x) ((void __iomem *)(x))
49 #define bcm_readb(a) (*(volatile unsigned char *) BCM_REGS_VA(a))
50 #define bcm_readw(a) (*(volatile unsigned short *) BCM_REGS_VA(a))
51 #define bcm_readl(a) (*(volatile unsigned int *) BCM_REGS_VA(a))
52 #define bcm_writeb(v, a) (*(volatile unsigned char *) BCM_REGS_VA((a)) = (v))
53 #define bcm_writew(v, a) (*(volatile unsigned short *) BCM_REGS_VA((a)) = (v))
54 #define bcm_writel(v, a) (*(volatile unsigned int *) BCM_REGS_VA((a)) = (v))
57 * IO helpers to access register set for current CPU
59 #define bcm_rset_readb(s, o) bcm_readb(bcm63xx_regset_address(s) + (o))
60 #define bcm_rset_readw(s, o) bcm_readw(bcm63xx_regset_address(s) + (o))
61 #define bcm_rset_readl(s, o) bcm_readl(bcm63xx_regset_address(s) + (o))
62 #define bcm_rset_writeb(s, v, o) bcm_writeb((v), \
63 bcm63xx_regset_address(s) + (o))
64 #define bcm_rset_writew(s, v, o) bcm_writew((v), \
65 bcm63xx_regset_address(s) + (o))
66 #define bcm_rset_writel(s, v, o) bcm_writel((v), \
67 bcm63xx_regset_address(s) + (o))
70 * helpers for frequently used register sets
72 #define bcm_perf_readl(o) bcm_rset_readl(RSET_PERF, (o))
73 #define bcm_perf_writel(v, o) bcm_rset_writel(RSET_PERF, (v), (o))
74 #define bcm_timer_readl(o) bcm_rset_readl(RSET_TIMER, (o))
75 #define bcm_timer_writel(v, o) bcm_rset_writel(RSET_TIMER, (v), (o))
76 #define bcm_wdt_readl(o) bcm_rset_readl(RSET_WDT, (o))
77 #define bcm_wdt_writel(v, o) bcm_rset_writel(RSET_WDT, (v), (o))
78 #define bcm_gpio_readl(o) bcm_rset_readl(RSET_GPIO, (o))
79 #define bcm_gpio_writel(v, o) bcm_rset_writel(RSET_GPIO, (v), (o))
80 #define bcm_uart0_readl(o) bcm_rset_readl(RSET_UART0, (o))
81 #define bcm_uart0_writel(v, o) bcm_rset_writel(RSET_UART0, (v), (o))
82 #define bcm_mpi_readl(o) bcm_rset_readl(RSET_MPI, (o))
83 #define bcm_mpi_writel(v, o) bcm_rset_writel(RSET_MPI, (v), (o))
84 #define bcm_pcmcia_readl(o) bcm_rset_readl(RSET_PCMCIA, (o))
85 #define bcm_pcmcia_writel(v, o) bcm_rset_writel(RSET_PCMCIA, (v), (o))
86 #define bcm_sdram_readl(o) bcm_rset_readl(RSET_SDRAM, (o))
87 #define bcm_sdram_writel(v, o) bcm_rset_writel(RSET_SDRAM, (v), (o))
88 #define bcm_memc_readl(o) bcm_rset_readl(RSET_MEMC, (o))
89 #define bcm_memc_writel(v, o) bcm_rset_writel(RSET_MEMC, (v), (o))
90 #define bcm_ddr_readl(o) bcm_rset_readl(RSET_DDR, (o))
91 #define bcm_ddr_writel(v, o) bcm_rset_writel(RSET_DDR, (v), (o))
93 #endif /* ! BCM63XX_IO_H_ */