"[PATCH] Fix leaks on /proc/{*/sched,sched_debug,timer_list,timer_stats}" and
[mmotm.git] / arch / mips / include / asm / txx9 / rbtx4938.h
blob9f0441a28126fc32d57309cdb6eb5fed168d8c2d
1 /*
2 * Definitions for TX4937/TX4938
4 * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
5 * terms of the GNU General Public License version 2. This program is
6 * licensed "as is" without any warranty of any kind, whether express
7 * or implied.
9 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
11 #ifndef __ASM_TXX9_RBTX4938_H
12 #define __ASM_TXX9_RBTX4938_H
14 #include <asm/addrspace.h>
15 #include <asm/txx9irq.h>
16 #include <asm/txx9/tx4938.h>
18 /* Address map */
19 #define RBTX4938_FPGA_REG_ADDR (IO_BASE + TXX9_CE(2) + 0x00000000)
20 #define RBTX4938_FPGA_REV_ADDR (IO_BASE + TXX9_CE(2) + 0x00000002)
21 #define RBTX4938_CONFIG1_ADDR (IO_BASE + TXX9_CE(2) + 0x00000004)
22 #define RBTX4938_CONFIG2_ADDR (IO_BASE + TXX9_CE(2) + 0x00000006)
23 #define RBTX4938_CONFIG3_ADDR (IO_BASE + TXX9_CE(2) + 0x00000008)
24 #define RBTX4938_LED_ADDR (IO_BASE + TXX9_CE(2) + 0x00001000)
25 #define RBTX4938_DIPSW_ADDR (IO_BASE + TXX9_CE(2) + 0x00001002)
26 #define RBTX4938_BDIPSW_ADDR (IO_BASE + TXX9_CE(2) + 0x00001004)
27 #define RBTX4938_IMASK_ADDR (IO_BASE + TXX9_CE(2) + 0x00002000)
28 #define RBTX4938_IMASK2_ADDR (IO_BASE + TXX9_CE(2) + 0x00002002)
29 #define RBTX4938_INTPOL_ADDR (IO_BASE + TXX9_CE(2) + 0x00002004)
30 #define RBTX4938_ISTAT_ADDR (IO_BASE + TXX9_CE(2) + 0x00002006)
31 #define RBTX4938_ISTAT2_ADDR (IO_BASE + TXX9_CE(2) + 0x00002008)
32 #define RBTX4938_IMSTAT_ADDR (IO_BASE + TXX9_CE(2) + 0x0000200a)
33 #define RBTX4938_IMSTAT2_ADDR (IO_BASE + TXX9_CE(2) + 0x0000200c)
34 #define RBTX4938_SOFTINT_ADDR (IO_BASE + TXX9_CE(2) + 0x00003000)
35 #define RBTX4938_PIOSEL_ADDR (IO_BASE + TXX9_CE(2) + 0x00005000)
36 #define RBTX4938_SPICS_ADDR (IO_BASE + TXX9_CE(2) + 0x00005002)
37 #define RBTX4938_SFPWR_ADDR (IO_BASE + TXX9_CE(2) + 0x00005008)
38 #define RBTX4938_SFVOL_ADDR (IO_BASE + TXX9_CE(2) + 0x0000500a)
39 #define RBTX4938_SOFTRESET_ADDR (IO_BASE + TXX9_CE(2) + 0x00007000)
40 #define RBTX4938_SOFTRESETLOCK_ADDR (IO_BASE + TXX9_CE(2) + 0x00007002)
41 #define RBTX4938_PCIRESET_ADDR (IO_BASE + TXX9_CE(2) + 0x00007004)
42 #define RBTX4938_ETHER_BASE (IO_BASE + TXX9_CE(2) + 0x00020000)
44 /* Ethernet port address (Jumperless Mode (W12:Open)) */
45 #define RBTX4938_ETHER_ADDR (RBTX4938_ETHER_BASE + 0x280)
47 /* bits for ISTAT/IMASK/IMSTAT */
48 #define RBTX4938_INTB_PCID 0
49 #define RBTX4938_INTB_PCIC 1
50 #define RBTX4938_INTB_PCIB 2
51 #define RBTX4938_INTB_PCIA 3
52 #define RBTX4938_INTB_RTC 4
53 #define RBTX4938_INTB_ATA 5
54 #define RBTX4938_INTB_MODEM 6
55 #define RBTX4938_INTB_SWINT 7
56 #define RBTX4938_INTF_PCID (1 << RBTX4938_INTB_PCID)
57 #define RBTX4938_INTF_PCIC (1 << RBTX4938_INTB_PCIC)
58 #define RBTX4938_INTF_PCIB (1 << RBTX4938_INTB_PCIB)
59 #define RBTX4938_INTF_PCIA (1 << RBTX4938_INTB_PCIA)
60 #define RBTX4938_INTF_RTC (1 << RBTX4938_INTB_RTC)
61 #define RBTX4938_INTF_ATA (1 << RBTX4938_INTB_ATA)
62 #define RBTX4938_INTF_MODEM (1 << RBTX4938_INTB_MODEM)
63 #define RBTX4938_INTF_SWINT (1 << RBTX4938_INTB_SWINT)
65 #define rbtx4938_fpga_rev_addr ((__u8 __iomem *)RBTX4938_FPGA_REV_ADDR)
66 #define rbtx4938_led_addr ((__u8 __iomem *)RBTX4938_LED_ADDR)
67 #define rbtx4938_dipsw_addr ((__u8 __iomem *)RBTX4938_DIPSW_ADDR)
68 #define rbtx4938_bdipsw_addr ((__u8 __iomem *)RBTX4938_BDIPSW_ADDR)
69 #define rbtx4938_imask_addr ((__u8 __iomem *)RBTX4938_IMASK_ADDR)
70 #define rbtx4938_imask2_addr ((__u8 __iomem *)RBTX4938_IMASK2_ADDR)
71 #define rbtx4938_intpol_addr ((__u8 __iomem *)RBTX4938_INTPOL_ADDR)
72 #define rbtx4938_istat_addr ((__u8 __iomem *)RBTX4938_ISTAT_ADDR)
73 #define rbtx4938_istat2_addr ((__u8 __iomem *)RBTX4938_ISTAT2_ADDR)
74 #define rbtx4938_imstat_addr ((__u8 __iomem *)RBTX4938_IMSTAT_ADDR)
75 #define rbtx4938_imstat2_addr ((__u8 __iomem *)RBTX4938_IMSTAT2_ADDR)
76 #define rbtx4938_softint_addr ((__u8 __iomem *)RBTX4938_SOFTINT_ADDR)
77 #define rbtx4938_piosel_addr ((__u8 __iomem *)RBTX4938_PIOSEL_ADDR)
78 #define rbtx4938_spics_addr ((__u8 __iomem *)RBTX4938_SPICS_ADDR)
79 #define rbtx4938_sfpwr_addr ((__u8 __iomem *)RBTX4938_SFPWR_ADDR)
80 #define rbtx4938_sfvol_addr ((__u8 __iomem *)RBTX4938_SFVOL_ADDR)
81 #define rbtx4938_softreset_addr ((__u8 __iomem *)RBTX4938_SOFTRESET_ADDR)
82 #define rbtx4938_softresetlock_addr \
83 ((__u8 __iomem *)RBTX4938_SOFTRESETLOCK_ADDR)
84 #define rbtx4938_pcireset_addr ((__u8 __iomem *)RBTX4938_PCIRESET_ADDR)
87 * IRQ mappings
90 #define RBTX4938_SOFT_INT0 0 /* not used */
91 #define RBTX4938_SOFT_INT1 1 /* not used */
92 #define RBTX4938_IRC_INT 2
93 #define RBTX4938_TIMER_INT 7
95 /* These are the virtual IRQ numbers, we divide all IRQ's into
96 * 'spaces', the 'space' determines where and how to enable/disable
97 * that particular IRQ on an RBTX4938 machine. Add new 'spaces' as new
98 * IRQ hardware is supported.
100 #define RBTX4938_NR_IRQ_IOC 8
102 #define RBTX4938_IRQ_IRC TXX9_IRQ_BASE
103 #define RBTX4938_IRQ_IOC (TXX9_IRQ_BASE + TX4938_NUM_IR)
104 #define RBTX4938_IRQ_END (RBTX4938_IRQ_IOC + RBTX4938_NR_IRQ_IOC)
106 #define RBTX4938_IRQ_IRC_ECCERR (RBTX4938_IRQ_IRC + TX4938_IR_ECCERR)
107 #define RBTX4938_IRQ_IRC_WTOERR (RBTX4938_IRQ_IRC + TX4938_IR_WTOERR)
108 #define RBTX4938_IRQ_IRC_INT(n) (RBTX4938_IRQ_IRC + TX4938_IR_INT(n))
109 #define RBTX4938_IRQ_IRC_SIO(n) (RBTX4938_IRQ_IRC + TX4938_IR_SIO(n))
110 #define RBTX4938_IRQ_IRC_DMA(ch, n) (RBTX4938_IRQ_IRC + TX4938_IR_DMA(ch, n))
111 #define RBTX4938_IRQ_IRC_PIO (RBTX4938_IRQ_IRC + TX4938_IR_PIO)
112 #define RBTX4938_IRQ_IRC_PDMAC (RBTX4938_IRQ_IRC + TX4938_IR_PDMAC)
113 #define RBTX4938_IRQ_IRC_PCIC (RBTX4938_IRQ_IRC + TX4938_IR_PCIC)
114 #define RBTX4938_IRQ_IRC_TMR(n) (RBTX4938_IRQ_IRC + TX4938_IR_TMR(n))
115 #define RBTX4938_IRQ_IRC_NDFMC (RBTX4938_IRQ_IRC + TX4938_IR_NDFMC)
116 #define RBTX4938_IRQ_IRC_PCIERR (RBTX4938_IRQ_IRC + TX4938_IR_PCIERR)
117 #define RBTX4938_IRQ_IRC_PCIPME (RBTX4938_IRQ_IRC + TX4938_IR_PCIPME)
118 #define RBTX4938_IRQ_IRC_ACLC (RBTX4938_IRQ_IRC + TX4938_IR_ACLC)
119 #define RBTX4938_IRQ_IRC_ACLCPME (RBTX4938_IRQ_IRC + TX4938_IR_ACLCPME)
120 #define RBTX4938_IRQ_IRC_PCIC1 (RBTX4938_IRQ_IRC + TX4938_IR_PCIC1)
121 #define RBTX4938_IRQ_IRC_SPI (RBTX4938_IRQ_IRC + TX4938_IR_SPI)
122 #define RBTX4938_IRQ_IOC_PCID (RBTX4938_IRQ_IOC + RBTX4938_INTB_PCID)
123 #define RBTX4938_IRQ_IOC_PCIC (RBTX4938_IRQ_IOC + RBTX4938_INTB_PCIC)
124 #define RBTX4938_IRQ_IOC_PCIB (RBTX4938_IRQ_IOC + RBTX4938_INTB_PCIB)
125 #define RBTX4938_IRQ_IOC_PCIA (RBTX4938_IRQ_IOC + RBTX4938_INTB_PCIA)
126 #define RBTX4938_IRQ_IOC_RTC (RBTX4938_IRQ_IOC + RBTX4938_INTB_RTC)
127 #define RBTX4938_IRQ_IOC_ATA (RBTX4938_IRQ_IOC + RBTX4938_INTB_ATA)
128 #define RBTX4938_IRQ_IOC_MODEM (RBTX4938_IRQ_IOC + RBTX4938_INTB_MODEM)
129 #define RBTX4938_IRQ_IOC_SWINT (RBTX4938_IRQ_IOC + RBTX4938_INTB_SWINT)
132 /* IOC (PCI, etc) */
133 #define RBTX4938_IRQ_IOCINT (TXX9_IRQ_BASE + TX4938_IR_INT(0))
134 /* Onboard 10M Ether */
135 #define RBTX4938_IRQ_ETHER (TXX9_IRQ_BASE + TX4938_IR_INT(1))
137 #define RBTX4938_RTL_8019_BASE (RBTX4938_ETHER_ADDR - mips_io_port_base)
138 #define RBTX4938_RTL_8019_IRQ (RBTX4938_IRQ_ETHER)
140 void rbtx4938_prom_init(void);
141 void rbtx4938_irq_setup(void);
142 struct pci_dev;
143 int rbtx4938_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
145 #endif /* __ASM_TXX9_RBTX4938_H */