arch/s390/include/asm/sigp.h

   1 /*
   2  *  include/asm-s390/sigp.h
   3  *
   4  *  S390 version
   5  *    Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
   6  *    Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
   7  *               Martin Schwidefsky (schwidefsky@de.ibm.com)
   8  *               Heiko Carstens (heiko.carstens@de.ibm.com)
   9  *
  10  *  sigp.h by D.J. Barrow (c) IBM 1999
  11  *  contains routines / structures for signalling other S/390 processors in an
  12  *  SMP configuration.
  13  */
  14
  15 #ifndef __SIGP__
  16 #define __SIGP__
  17
  18 #include <asm/ptrace.h>
  19 #include <asm/atomic.h>
  20
  21 /* get real cpu address from logical cpu number */
  22 extern volatile int __cpu_logical_map[];
  23
  24 typedef enum
  25 {
  26         sigp_unassigned=0x0,
  27         sigp_sense,
  28         sigp_external_call,
  29         sigp_emergency_signal,
  30         sigp_start,
  31         sigp_stop,
  32         sigp_restart,
  33         sigp_unassigned1,
  34         sigp_unassigned2,
  35         sigp_stop_and_store_status,
  36         sigp_unassigned3,
  37         sigp_initial_cpu_reset,
  38         sigp_cpu_reset,
  39         sigp_set_prefix,
  40         sigp_store_status_at_address,
  41         sigp_store_extended_status_at_address
  42 } sigp_order_code;
  43
  44 typedef __u32 sigp_status_word;
  45
  46 typedef enum
  47 {
  48         sigp_order_code_accepted=0,
  49         sigp_status_stored,
  50         sigp_busy,
  51         sigp_not_operational
  52 } sigp_ccode;
  53
  54
  55 /*
  56  * Definitions for the external call
  57  */
  58
  59 /* 'Bit' signals, asynchronous */
  60 typedef enum
  61 {
  62         ec_schedule=0,
  63         ec_call_function,
  64         ec_call_function_single,
  65         ec_bit_last
  66 } ec_bit_sig;
  67
  68 /*
  69  * Signal processor
  70  */
  71 static inline sigp_ccode
  72 signal_processor(__u16 cpu_addr, sigp_order_code order_code)
  73 {
  74         register unsigned long reg1 asm ("1") = 0;
  75         sigp_ccode ccode;
  76
  77         asm volatile(
  78                 "       sigp    %1,%2,0(%3)\n"
  79                 "       ipm     %0\n"
  80                 "       srl     %0,28\n"
  81                 :       "=d"    (ccode)
  82                 : "d" (reg1), "d" (__cpu_logical_map[cpu_addr]),
  83                   "a" (order_code) : "cc" , "memory");
  84         return ccode;
  85 }
  86
  87 /*
  88  * Signal processor with parameter
  89  */
  90 static inline sigp_ccode
  91 signal_processor_p(__u32 parameter, __u16 cpu_addr, sigp_order_code order_code)
  92 {
  93         register unsigned int reg1 asm ("1") = parameter;
  94         sigp_ccode ccode;
  95
  96         asm volatile(
  97                 "       sigp    %1,%2,0(%3)\n"
  98                 "       ipm     %0\n"
  99                 "       srl     %0,28\n"
 100                 : "=d" (ccode)
 101                 : "d" (reg1), "d" (__cpu_logical_map[cpu_addr]),
 102                   "a" (order_code) : "cc" , "memory");
 103         return ccode;
 104 }
 105
 106 /*
 107  * Signal processor with parameter and return status
 108  */
 109 static inline sigp_ccode
 110 signal_processor_ps(__u32 *statusptr, __u32 parameter, __u16 cpu_addr,
 111                     sigp_order_code order_code)
 112 {
 113         register unsigned int reg1 asm ("1") = parameter;
 114         sigp_ccode ccode;
 115
 116         asm volatile(
 117                 "       sigp    %1,%2,0(%3)\n"
 118                 "       ipm     %0\n"
 119                 "       srl     %0,28\n"
 120                 : "=d" (ccode), "+d" (reg1)
 121                 : "d" (__cpu_logical_map[cpu_addr]), "a" (order_code)
 122                 : "cc" , "memory");
 123         *statusptr = reg1;
 124         return ccode;
 125 }
 126
 127 #endif /* __SIGP__ */