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On Tue, Nov 06, 2007 at 02:33:53AM -0800, akpm@linux-foundation.org wrote:
[mmotm.git] / drivers / net / wireless / iwlwifi / iwl-agn.c
blob401295cf20fb379df584452a3edaf2f23d5f3e7b
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/pci.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/delay.h>
36 #include <linux/sched.h>
37 #include <linux/skbuff.h>
38 #include <linux/netdevice.h>
39 #include <linux/wireless.h>
40 #include <linux/firmware.h>
41 #include <linux/etherdevice.h>
42 #include <linux/if_arp.h>
43
44 #include <net/mac80211.h>
45
46 #include <asm/div64.h>
47
48 #define DRV_NAME "iwlagn"
49
50 #include "iwl-eeprom.h"
51 #include "iwl-dev.h"
52 #include "iwl-core.h"
53 #include "iwl-io.h"
54 #include "iwl-helpers.h"
55 #include "iwl-sta.h"
56 #include "iwl-calib.h"
57
58
59 /******************************************************************************
60 *
61 * module boiler plate
62 *
63 ******************************************************************************/
64
65 /*
66 * module name, copyright, version, etc.
67 */
68 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
69
70 #ifdef CONFIG_IWLWIFI_DEBUG
71 #define VD "d"
72 #else
73 #define VD
74 #endif
75
76 #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
77 #define VS "s"
78 #else
79 #define VS
80 #endif
81
82 #define DRV_VERSION IWLWIFI_VERSION VD VS
83
84
85 MODULE_DESCRIPTION(DRV_DESCRIPTION);
86 MODULE_VERSION(DRV_VERSION);
87 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
88 MODULE_LICENSE("GPL");
89 MODULE_ALIAS("iwl4965");
90
91 /*************** STATION TABLE MANAGEMENT ****
92 * mac80211 should be examined to determine if sta_info is duplicating
93 * the functionality provided here
94 */
95
96 /**************************************************************/
97
98 /**
99 * iwl_commit_rxon - commit staging_rxon to hardware
100 *
101 * The RXON command in staging_rxon is committed to the hardware and
102 * the active_rxon structure is updated with the new data. This
103 * function correctly transitions out of the RXON_ASSOC_MSK state if
104 * a HW tune is required based on the RXON structure changes.
105 */
106 int iwl_commit_rxon(struct iwl_priv *priv)
107 {
108 /* cast away the const for active_rxon in this function */
109 struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
110 int ret;
111 bool new_assoc =
112 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
113
114 if (!iwl_is_alive(priv))
115 return -EBUSY;
116
117 /* always get timestamp with Rx frame */
118 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
119
120 ret = iwl_check_rxon_cmd(priv);
121 if (ret) {
122 IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
123 return -EINVAL;
124 }
125
126 /* If we don't need to send a full RXON, we can use
127 * iwl_rxon_assoc_cmd which is used to reconfigure filter
128 * and other flags for the current radio configuration. */
129 if (!iwl_full_rxon_required(priv)) {
130 ret = iwl_send_rxon_assoc(priv);
131 if (ret) {
132 IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
133 return ret;
134 }
135
136 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
137 return 0;
138 }
139
140 /* station table will be cleared */
141 priv->assoc_station_added = 0;
142
143 /* If we are currently associated and the new config requires
144 * an RXON_ASSOC and the new config wants the associated mask enabled,
145 * we must clear the associated from the active configuration
146 * before we apply the new config */
147 if (iwl_is_associated(priv) && new_assoc) {
148 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
149 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
150
151 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
152 sizeof(struct iwl_rxon_cmd),
153 &priv->active_rxon);
154
155 /* If the mask clearing failed then we set
156 * active_rxon back to what it was previously */
157 if (ret) {
158 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
159 IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
160 return ret;
161 }
162 }
163
164 IWL_DEBUG_INFO(priv, "Sending RXON\n"
165 "* with%s RXON_FILTER_ASSOC_MSK\n"
166 "* channel = %d\n"
167 "* bssid = %pM\n",
168 (new_assoc ? "" : "out"),
169 le16_to_cpu(priv->staging_rxon.channel),
170 priv->staging_rxon.bssid_addr);
171
172 iwl_set_rxon_hwcrypto(priv, !priv->cfg->mod_params->sw_crypto);
173
174 /* Apply the new configuration
175 * RXON unassoc clears the station table in uCode, send it before
176 * we add the bcast station. If assoc bit is set, we will send RXON
177 * after having added the bcast and bssid station.
178 */
179 if (!new_assoc) {
180 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
181 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
182 if (ret) {
183 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
184 return ret;
185 }
186 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
187 }
188
189 iwl_clear_stations_table(priv);
190
191 priv->start_calib = 0;
192
193 /* Add the broadcast address so we can send broadcast frames */
194 if (iwl_rxon_add_station(priv, iwl_bcast_addr, 0) ==
195 IWL_INVALID_STATION) {
196 IWL_ERR(priv, "Error adding BROADCAST address for transmit.\n");
197 return -EIO;
198 }
199
200 /* If we have set the ASSOC_MSK and we are in BSS mode then
201 * add the IWL_AP_ID to the station rate table */
202 if (new_assoc) {
203 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
204 ret = iwl_rxon_add_station(priv,
205 priv->active_rxon.bssid_addr, 1);
206 if (ret == IWL_INVALID_STATION) {
207 IWL_ERR(priv,
208 "Error adding AP address for TX.\n");
209 return -EIO;
210 }
211 priv->assoc_station_added = 1;
212 if (priv->default_wep_key &&
213 iwl_send_static_wepkey_cmd(priv, 0))
214 IWL_ERR(priv,
215 "Could not send WEP static key.\n");
216 }
217
218 /*
219 * allow CTS-to-self if possible for new association.
220 * this is relevant only for 5000 series and up,
221 * but will not damage 4965
222 */
223 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
224
225 /* Apply the new configuration
226 * RXON assoc doesn't clear the station table in uCode,
227 */
228 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
229 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
230 if (ret) {
231 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
232 return ret;
233 }
234 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
235 }
236
237 iwl_init_sensitivity(priv);
238
239 /* If we issue a new RXON command which required a tune then we must
240 * send a new TXPOWER command or we won't be able to Tx any frames */
241 ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
242 if (ret) {
243 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
244 return ret;
245 }
246
247 return 0;
248 }
249
250 void iwl_update_chain_flags(struct iwl_priv *priv)
251 {
252
253 if (priv->cfg->ops->hcmd->set_rxon_chain)
254 priv->cfg->ops->hcmd->set_rxon_chain(priv);
255 iwlcore_commit_rxon(priv);
256 }
257
258 static void iwl_clear_free_frames(struct iwl_priv *priv)
259 {
260 struct list_head *element;
261
262 IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
263 priv->frames_count);
264
265 while (!list_empty(&priv->free_frames)) {
266 element = priv->free_frames.next;
267 list_del(element);
268 kfree(list_entry(element, struct iwl_frame, list));
269 priv->frames_count--;
270 }
271
272 if (priv->frames_count) {
273 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
274 priv->frames_count);
275 priv->frames_count = 0;
276 }
277 }
278
279 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
280 {
281 struct iwl_frame *frame;
282 struct list_head *element;
283 if (list_empty(&priv->free_frames)) {
284 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
285 if (!frame) {
286 IWL_ERR(priv, "Could not allocate frame!\n");
287 return NULL;
288 }
289
290 priv->frames_count++;
291 return frame;
292 }
293
294 element = priv->free_frames.next;
295 list_del(element);
296 return list_entry(element, struct iwl_frame, list);
297 }
298
299 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
300 {
301 memset(frame, 0, sizeof(*frame));
302 list_add(&frame->list, &priv->free_frames);
303 }
304
305 static unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv,
306 struct ieee80211_hdr *hdr,
307 int left)
308 {
309 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
310 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
311 (priv->iw_mode != NL80211_IFTYPE_AP)))
312 return 0;
313
314 if (priv->ibss_beacon->len > left)
315 return 0;
316
317 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
318
319 return priv->ibss_beacon->len;
320 }
321
322 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
323 struct iwl_frame *frame, u8 rate)
324 {
325 struct iwl_tx_beacon_cmd *tx_beacon_cmd;
326 unsigned int frame_size;
327
328 tx_beacon_cmd = &frame->u.beacon;
329 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
330
331 tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
332 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
333
334 frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
335 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
336
337 BUG_ON(frame_size > MAX_MPDU_SIZE);
338 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
339
340 if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
341 tx_beacon_cmd->tx.rate_n_flags =
342 iwl_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
343 else
344 tx_beacon_cmd->tx.rate_n_flags =
345 iwl_hw_set_rate_n_flags(rate, 0);
346
347 tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
348 TX_CMD_FLG_TSF_MSK |
349 TX_CMD_FLG_STA_RATE_MSK;
350
351 return sizeof(*tx_beacon_cmd) + frame_size;
352 }
353 static int iwl_send_beacon_cmd(struct iwl_priv *priv)
354 {
355 struct iwl_frame *frame;
356 unsigned int frame_size;
357 int rc;
358 u8 rate;
359
360 frame = iwl_get_free_frame(priv);
361
362 if (!frame) {
363 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
364 "command.\n");
365 return -ENOMEM;
366 }
367
368 rate = iwl_rate_get_lowest_plcp(priv);
369
370 frame_size = iwl_hw_get_beacon_cmd(priv, frame, rate);
371
372 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
373 &frame->u.cmd[0]);
374
375 iwl_free_frame(priv, frame);
376
377 return rc;
378 }
379
380 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
381 {
382 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
383
384 dma_addr_t addr = get_unaligned_le32(&tb->lo);
385 if (sizeof(dma_addr_t) > sizeof(u32))
386 addr |=
387 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
388
389 return addr;
390 }
391
392 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
393 {
394 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
395
396 return le16_to_cpu(tb->hi_n_len) >> 4;
397 }
398
399 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
400 dma_addr_t addr, u16 len)
401 {
402 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
403 u16 hi_n_len = len << 4;
404
405 put_unaligned_le32(addr, &tb->lo);
406 if (sizeof(dma_addr_t) > sizeof(u32))
407 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
408
409 tb->hi_n_len = cpu_to_le16(hi_n_len);
410
411 tfd->num_tbs = idx + 1;
412 }
413
414 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
415 {
416 return tfd->num_tbs & 0x1f;
417 }
418
419 /**
420 * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
421 * @priv - driver private data
422 * @txq - tx queue
423 *
424 * Does NOT advance any TFD circular buffer read/write indexes
425 * Does NOT free the TFD itself (which is within circular buffer)
426 */
427 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
428 {
429 struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
430 struct iwl_tfd *tfd;
431 struct pci_dev *dev = priv->pci_dev;
432 int index = txq->q.read_ptr;
433 int i;
434 int num_tbs;
435
436 tfd = &tfd_tmp[index];
437
438 /* Sanity check on number of chunks */
439 num_tbs = iwl_tfd_get_num_tbs(tfd);
440
441 if (num_tbs >= IWL_NUM_OF_TBS) {
442 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
443 /* @todo issue fatal error, it is quite serious situation */
444 return;
445 }
446
447 /* Unmap tx_cmd */
448 if (num_tbs)
449 pci_unmap_single(dev,
450 pci_unmap_addr(&txq->meta[index], mapping),
451 pci_unmap_len(&txq->meta[index], len),
452 PCI_DMA_BIDIRECTIONAL);
453
454 /* Unmap chunks, if any. */
455 for (i = 1; i < num_tbs; i++) {
456 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
457 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
458
459 if (txq->txb) {
460 dev_kfree_skb(txq->txb[txq->q.read_ptr].skb[i - 1]);
461 txq->txb[txq->q.read_ptr].skb[i - 1] = NULL;
462 }
463 }
464 }
465
466 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
467 struct iwl_tx_queue *txq,
468 dma_addr_t addr, u16 len,
469 u8 reset, u8 pad)
470 {
471 struct iwl_queue *q;
472 struct iwl_tfd *tfd, *tfd_tmp;
473 u32 num_tbs;
474
475 q = &txq->q;
476 tfd_tmp = (struct iwl_tfd *)txq->tfds;
477 tfd = &tfd_tmp[q->write_ptr];
478
479 if (reset)
480 memset(tfd, 0, sizeof(*tfd));
481
482 num_tbs = iwl_tfd_get_num_tbs(tfd);
483
484 /* Each TFD can point to a maximum 20 Tx buffers */
485 if (num_tbs >= IWL_NUM_OF_TBS) {
486 IWL_ERR(priv, "Error can not send more than %d chunks\n",
487 IWL_NUM_OF_TBS);
488 return -EINVAL;
489 }
490
491 BUG_ON(addr & ~DMA_BIT_MASK(36));
492 if (unlikely(addr & ~IWL_TX_DMA_MASK))
493 IWL_ERR(priv, "Unaligned address = %llx\n",
494 (unsigned long long)addr);
495
496 iwl_tfd_set_tb(tfd, num_tbs, addr, len);
497
498 return 0;
499 }
500
501 /*
502 * Tell nic where to find circular buffer of Tx Frame Descriptors for
503 * given Tx queue, and enable the DMA channel used for that queue.
504 *
505 * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
506 * channels supported in hardware.
507 */
508 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
509 struct iwl_tx_queue *txq)
510 {
511 int txq_id = txq->q.id;
512
513 /* Circular buffer (TFD queue in DRAM) physical base address */
514 iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
515 txq->q.dma_addr >> 8);
516
517 return 0;
518 }
519
520 /******************************************************************************
521 *
522 * Generic RX handler implementations
523 *
524 ******************************************************************************/
525 static void iwl_rx_reply_alive(struct iwl_priv *priv,
526 struct iwl_rx_mem_buffer *rxb)
527 {
528 struct iwl_rx_packet *pkt = rxb_addr(rxb);
529 struct iwl_alive_resp *palive;
530 struct delayed_work *pwork;
531
532 palive = &pkt->u.alive_frame;
533
534 IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
535 "0x%01X 0x%01X\n",
536 palive->is_valid, palive->ver_type,
537 palive->ver_subtype);
538
539 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
540 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
541 memcpy(&priv->card_alive_init,
542 &pkt->u.alive_frame,
543 sizeof(struct iwl_init_alive_resp));
544 pwork = &priv->init_alive_start;
545 } else {
546 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
547 memcpy(&priv->card_alive, &pkt->u.alive_frame,
548 sizeof(struct iwl_alive_resp));
549 pwork = &priv->alive_start;
550 }
551
552 /* We delay the ALIVE response by 5ms to
553 * give the HW RF Kill time to activate... */
554 if (palive->is_valid == UCODE_VALID_OK)
555 queue_delayed_work(priv->workqueue, pwork,
556 msecs_to_jiffies(5));
557 else
558 IWL_WARN(priv, "uCode did not respond OK.\n");
559 }
560
561 static void iwl_bg_beacon_update(struct work_struct *work)
562 {
563 struct iwl_priv *priv =
564 container_of(work, struct iwl_priv, beacon_update);
565 struct sk_buff *beacon;
566
567 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
568 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
569
570 if (!beacon) {
571 IWL_ERR(priv, "update beacon failed\n");
572 return;
573 }
574
575 mutex_lock(&priv->mutex);
576 /* new beacon skb is allocated every time; dispose previous.*/
577 if (priv->ibss_beacon)
578 dev_kfree_skb(priv->ibss_beacon);
579
580 priv->ibss_beacon = beacon;
581 mutex_unlock(&priv->mutex);
582
583 iwl_send_beacon_cmd(priv);
584 }
585
586 /**
587 * iwl_bg_statistics_periodic - Timer callback to queue statistics
588 *
589 * This callback is provided in order to send a statistics request.
590 *
591 * This timer function is continually reset to execute within
592 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
593 * was received. We need to ensure we receive the statistics in order
594 * to update the temperature used for calibrating the TXPOWER.
595 */
596 static void iwl_bg_statistics_periodic(unsigned long data)
597 {
598 struct iwl_priv *priv = (struct iwl_priv *)data;
599
600 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
601 return;
602
603 /* dont send host command if rf-kill is on */
604 if (!iwl_is_ready_rf(priv))
605 return;
606
607 iwl_send_statistics_request(priv, CMD_ASYNC);
608 }
609
610 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
611 struct iwl_rx_mem_buffer *rxb)
612 {
613 #ifdef CONFIG_IWLWIFI_DEBUG
614 struct iwl_rx_packet *pkt = rxb_addr(rxb);
615 struct iwl4965_beacon_notif *beacon =
616 (struct iwl4965_beacon_notif *)pkt->u.raw;
617 u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
618
619 IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
620 "tsf %d %d rate %d\n",
621 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
622 beacon->beacon_notify_hdr.failure_frame,
623 le32_to_cpu(beacon->ibss_mgr_status),
624 le32_to_cpu(beacon->high_tsf),
625 le32_to_cpu(beacon->low_tsf), rate);
626 #endif
627
628 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
629 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
630 queue_work(priv->workqueue, &priv->beacon_update);
631 }
632
633 /* Handle notification from uCode that card's power state is changing
634 * due to software, hardware, or critical temperature RFKILL */
635 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
636 struct iwl_rx_mem_buffer *rxb)
637 {
638 struct iwl_rx_packet *pkt = rxb_addr(rxb);
639 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
640 unsigned long status = priv->status;
641
642 IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s\n",
643 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
644 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
645
646 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
647 RF_CARD_DISABLED)) {
648
649 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
650 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
651
652 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
653 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
654
655 if (!(flags & RXON_CARD_DISABLED)) {
656 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
657 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
658 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
659 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
660 }
661 if (flags & RF_CARD_DISABLED)
662 iwl_tt_enter_ct_kill(priv);
663 }
664 if (!(flags & RF_CARD_DISABLED))
665 iwl_tt_exit_ct_kill(priv);
666
667 if (flags & HW_CARD_DISABLED)
668 set_bit(STATUS_RF_KILL_HW, &priv->status);
669 else
670 clear_bit(STATUS_RF_KILL_HW, &priv->status);
671
672
673 if (!(flags & RXON_CARD_DISABLED))
674 iwl_scan_cancel(priv);
675
676 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
677 test_bit(STATUS_RF_KILL_HW, &priv->status)))
678 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
679 test_bit(STATUS_RF_KILL_HW, &priv->status));
680 else
681 wake_up_interruptible(&priv->wait_command_queue);
682 }
683
684 int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
685 {
686 if (src == IWL_PWR_SRC_VAUX) {
687 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
688 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
689 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
690 ~APMG_PS_CTRL_MSK_PWR_SRC);
691 } else {
692 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
693 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
694 ~APMG_PS_CTRL_MSK_PWR_SRC);
695 }
696
697 return 0;
698 }
699
700 /**
701 * iwl_setup_rx_handlers - Initialize Rx handler callbacks
702 *
703 * Setup the RX handlers for each of the reply types sent from the uCode
704 * to the host.
705 *
706 * This function chains into the hardware specific files for them to setup
707 * any hardware specific handlers as well.
708 */
709 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
710 {
711 priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
712 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
713 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
714 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
715 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
716 iwl_rx_pm_debug_statistics_notif;
717 priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
718
719 /*
720 * The same handler is used for both the REPLY to a discrete
721 * statistics request from the host as well as for the periodic
722 * statistics notifications (after received beacons) from the uCode.
723 */
724 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_rx_statistics;
725 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
726
727 iwl_setup_spectrum_handlers(priv);
728 iwl_setup_rx_scan_handlers(priv);
729
730 /* status change handler */
731 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
732
733 priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
734 iwl_rx_missed_beacon_notif;
735 /* Rx handlers */
736 priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy;
737 priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx;
738 /* block ack */
739 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl_rx_reply_compressed_ba;
740 /* Set up hardware specific Rx handlers */
741 priv->cfg->ops->lib->rx_handler_setup(priv);
742 }
743
744 /**
745 * iwl_rx_handle - Main entry function for receiving responses from uCode
746 *
747 * Uses the priv->rx_handlers callback function array to invoke
748 * the appropriate handlers, including command responses,
749 * frame-received notifications, and other notifications.
750 */
751 void iwl_rx_handle(struct iwl_priv *priv)
752 {
753 struct iwl_rx_mem_buffer *rxb;
754 struct iwl_rx_packet *pkt;
755 struct iwl_rx_queue *rxq = &priv->rxq;
756 u32 r, i;
757 int reclaim;
758 unsigned long flags;
759 u8 fill_rx = 0;
760 u32 count = 8;
761 int total_empty;
762
763 /* uCode's read index (stored in shared DRAM) indicates the last Rx
764 * buffer that the driver may process (last buffer filled by ucode). */
765 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
766 i = rxq->read;
767
768 /* Rx interrupt, but nothing sent from uCode */
769 if (i == r)
770 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
771
772 /* calculate total frames need to be restock after handling RX */
773 total_empty = r - priv->rxq.write_actual;
774 if (total_empty < 0)
775 total_empty += RX_QUEUE_SIZE;
776
777 if (total_empty > (RX_QUEUE_SIZE / 2))
778 fill_rx = 1;
779
780 while (i != r) {
781 rxb = rxq->queue[i];
782
783 /* If an RXB doesn't have a Rx queue slot associated with it,
784 * then a bug has been introduced in the queue refilling
785 * routines -- catch it here */
786 BUG_ON(rxb == NULL);
787
788 rxq->queue[i] = NULL;
789
790 pci_unmap_page(priv->pci_dev, rxb->page_dma,
791 PAGE_SIZE << priv->hw_params.rx_page_order,
792 PCI_DMA_FROMDEVICE);
793 pkt = rxb_addr(rxb);
794
795 trace_iwlwifi_dev_rx(priv, pkt,
796 le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
797
798 /* Reclaim a command buffer only if this packet is a response
799 * to a (driver-originated) command.
800 * If the packet (e.g. Rx frame) originated from uCode,
801 * there is no command buffer to reclaim.
802 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
803 * but apparently a few don't get set; catch them here. */
804 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
805 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
806 (pkt->hdr.cmd != REPLY_RX) &&
807 (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
808 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
809 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
810 (pkt->hdr.cmd != REPLY_TX);
811
812 /* Based on type of command response or notification,
813 * handle those that need handling via function in
814 * rx_handlers table. See iwl_setup_rx_handlers() */
815 if (priv->rx_handlers[pkt->hdr.cmd]) {
816 IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
817 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
818 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
819 priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
820 } else {
821 /* No handling needed */
822 IWL_DEBUG_RX(priv,
823 "r %d i %d No handler needed for %s, 0x%02x\n",
824 r, i, get_cmd_string(pkt->hdr.cmd),
825 pkt->hdr.cmd);
826 }
827
828 if (reclaim) {
829 /* Invoke any callbacks, transfer the buffer to caller,
830 * and fire off the (possibly) blocking iwl_send_cmd()
831 * as we reclaim the driver command queue */
832 if (rxb && rxb->page)
833 iwl_tx_cmd_complete(priv, rxb);
834 else
835 IWL_WARN(priv, "Claim null rxb?\n");
836 }
837
838 /* For now we just don't re-use anything. We can tweak this
839 * later to try and re-use notification packets and SKBs that
840 * fail to Rx correctly */
841 if (rxb->page != NULL) {
842 priv->alloc_rxb_page--;
843 __free_pages(rxb->page, priv->hw_params.rx_page_order);
844 rxb->page = NULL;
845 }
846
847 spin_lock_irqsave(&rxq->lock, flags);
848 list_add_tail(&rxb->list, &priv->rxq.rx_used);
849 spin_unlock_irqrestore(&rxq->lock, flags);
850 i = (i + 1) & RX_QUEUE_MASK;
851 /* If there are a lot of unused frames,
852 * restock the Rx queue so ucode wont assert. */
853 if (fill_rx) {
854 count++;
855 if (count >= 8) {
856 priv->rxq.read = i;
857 iwl_rx_replenish_now(priv);
858 count = 0;
859 }
860 }
861 }
862
863 /* Backtrack one entry */
864 priv->rxq.read = i;
865 if (fill_rx)
866 iwl_rx_replenish_now(priv);
867 else
868 iwl_rx_queue_restock(priv);
869 }
870
871 /* call this function to flush any scheduled tasklet */
872 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
873 {
874 /* wait to make sure we flush pending tasklet*/
875 synchronize_irq(priv->pci_dev->irq);
876 tasklet_kill(&priv->irq_tasklet);
877 }
878
879 static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
880 {
881 u32 inta, handled = 0;
882 u32 inta_fh;
883 unsigned long flags;
884 #ifdef CONFIG_IWLWIFI_DEBUG
885 u32 inta_mask;
886 #endif
887
888 spin_lock_irqsave(&priv->lock, flags);
889
890 /* Ack/clear/reset pending uCode interrupts.
891 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
892 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
893 inta = iwl_read32(priv, CSR_INT);
894 iwl_write32(priv, CSR_INT, inta);
895
896 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
897 * Any new interrupts that happen after this, either while we're
898 * in this tasklet, or later, will show up in next ISR/tasklet. */
899 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
900 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
901
902 #ifdef CONFIG_IWLWIFI_DEBUG
903 if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
904 /* just for debug */
905 inta_mask = iwl_read32(priv, CSR_INT_MASK);
906 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
907 inta, inta_mask, inta_fh);
908 }
909 #endif
910
911 spin_unlock_irqrestore(&priv->lock, flags);
912
913 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
914 * atomic, make sure that inta covers all the interrupts that
915 * we've discovered, even if FH interrupt came in just after
916 * reading CSR_INT. */
917 if (inta_fh & CSR49_FH_INT_RX_MASK)
918 inta |= CSR_INT_BIT_FH_RX;
919 if (inta_fh & CSR49_FH_INT_TX_MASK)
920 inta |= CSR_INT_BIT_FH_TX;
921
922 /* Now service all interrupt bits discovered above. */
923 if (inta & CSR_INT_BIT_HW_ERR) {
924 IWL_ERR(priv, "Hardware error detected. Restarting.\n");
925
926 /* Tell the device to stop sending interrupts */
927 iwl_disable_interrupts(priv);
928
929 priv->isr_stats.hw++;
930 iwl_irq_handle_error(priv);
931
932 handled |= CSR_INT_BIT_HW_ERR;
933
934 return;
935 }
936
937 #ifdef CONFIG_IWLWIFI_DEBUG
938 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
939 /* NIC fires this, but we don't use it, redundant with WAKEUP */
940 if (inta & CSR_INT_BIT_SCD) {
941 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
942 "the frame/frames.\n");
943 priv->isr_stats.sch++;
944 }
945
946 /* Alive notification via Rx interrupt will do the real work */
947 if (inta & CSR_INT_BIT_ALIVE) {
948 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
949 priv->isr_stats.alive++;
950 }
951 }
952 #endif
953 /* Safely ignore these bits for debug checks below */
954 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
955
956 /* HW RF KILL switch toggled */
957 if (inta & CSR_INT_BIT_RF_KILL) {
958 int hw_rf_kill = 0;
959 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
960 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
961 hw_rf_kill = 1;
962
963 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
964 hw_rf_kill ? "disable radio" : "enable radio");
965
966 priv->isr_stats.rfkill++;
967
968 /* driver only loads ucode once setting the interface up.
969 * the driver allows loading the ucode even if the radio
970 * is killed. Hence update the killswitch state here. The
971 * rfkill handler will care about restarting if needed.
972 */
973 if (!test_bit(STATUS_ALIVE, &priv->status)) {
974 if (hw_rf_kill)
975 set_bit(STATUS_RF_KILL_HW, &priv->status);
976 else
977 clear_bit(STATUS_RF_KILL_HW, &priv->status);
978 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
979 }
980
981 handled |= CSR_INT_BIT_RF_KILL;
982 }
983
984 /* Chip got too hot and stopped itself */
985 if (inta & CSR_INT_BIT_CT_KILL) {
986 IWL_ERR(priv, "Microcode CT kill error detected.\n");
987 priv->isr_stats.ctkill++;
988 handled |= CSR_INT_BIT_CT_KILL;
989 }
990
991 /* Error detected by uCode */
992 if (inta & CSR_INT_BIT_SW_ERR) {
993 IWL_ERR(priv, "Microcode SW error detected. "
994 " Restarting 0x%X.\n", inta);
995 priv->isr_stats.sw++;
996 priv->isr_stats.sw_err = inta;
997 iwl_irq_handle_error(priv);
998 handled |= CSR_INT_BIT_SW_ERR;
999 }
1000
1001 /* uCode wakes up after power-down sleep */
1002 if (inta & CSR_INT_BIT_WAKEUP) {
1003 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1004 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1005 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1006 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1007 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1008 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1009 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1010 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
1011
1012 priv->isr_stats.wakeup++;
1013
1014 handled |= CSR_INT_BIT_WAKEUP;
1015 }
1016
1017 /* All uCode command responses, including Tx command responses,
1018 * Rx "responses" (frame-received notification), and other
1019 * notifications from uCode come through here*/
1020 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1021 iwl_rx_handle(priv);
1022 priv->isr_stats.rx++;
1023 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1024 }
1025
1026 if (inta & CSR_INT_BIT_FH_TX) {
1027 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
1028 priv->isr_stats.tx++;
1029 handled |= CSR_INT_BIT_FH_TX;
1030 /* FH finished to write, send event */
1031 priv->ucode_write_complete = 1;
1032 wake_up_interruptible(&priv->wait_command_queue);
1033 }
1034
1035 if (inta & ~handled) {
1036 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1037 priv->isr_stats.unhandled++;
1038 }
1039
1040 if (inta & ~(priv->inta_mask)) {
1041 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1042 inta & ~priv->inta_mask);
1043 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
1044 }
1045
1046 /* Re-enable all interrupts */
1047 /* only Re-enable if diabled by irq */
1048 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1049 iwl_enable_interrupts(priv);
1050
1051 #ifdef CONFIG_IWLWIFI_DEBUG
1052 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1053 inta = iwl_read32(priv, CSR_INT);
1054 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1055 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1056 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1057 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1058 }
1059 #endif
1060 }
1061
1062 /* tasklet for iwlagn interrupt */
1063 static void iwl_irq_tasklet(struct iwl_priv *priv)
1064 {
1065 u32 inta = 0;
1066 u32 handled = 0;
1067 unsigned long flags;
1068 #ifdef CONFIG_IWLWIFI_DEBUG
1069 u32 inta_mask;
1070 #endif
1071
1072 spin_lock_irqsave(&priv->lock, flags);
1073
1074 /* Ack/clear/reset pending uCode interrupts.
1075 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1076 */
1077 iwl_write32(priv, CSR_INT, priv->inta);
1078
1079 inta = priv->inta;
1080
1081 #ifdef CONFIG_IWLWIFI_DEBUG
1082 if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1083 /* just for debug */
1084 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1085 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1086 inta, inta_mask);
1087 }
1088 #endif
1089
1090 spin_unlock_irqrestore(&priv->lock, flags);
1091
1092 /* saved interrupt in inta variable now we can reset priv->inta */
1093 priv->inta = 0;
1094
1095 /* Now service all interrupt bits discovered above. */
1096 if (inta & CSR_INT_BIT_HW_ERR) {
1097 IWL_ERR(priv, "Hardware error detected. Restarting.\n");
1098
1099 /* Tell the device to stop sending interrupts */
1100 iwl_disable_interrupts(priv);
1101
1102 priv->isr_stats.hw++;
1103 iwl_irq_handle_error(priv);
1104
1105 handled |= CSR_INT_BIT_HW_ERR;
1106
1107 return;
1108 }
1109
1110 #ifdef CONFIG_IWLWIFI_DEBUG
1111 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1112 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1113 if (inta & CSR_INT_BIT_SCD) {
1114 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1115 "the frame/frames.\n");
1116 priv->isr_stats.sch++;
1117 }
1118
1119 /* Alive notification via Rx interrupt will do the real work */
1120 if (inta & CSR_INT_BIT_ALIVE) {
1121 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1122 priv->isr_stats.alive++;
1123 }
1124 }
1125 #endif
1126 /* Safely ignore these bits for debug checks below */
1127 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1128
1129 /* HW RF KILL switch toggled */
1130 if (inta & CSR_INT_BIT_RF_KILL) {
1131 int hw_rf_kill = 0;
1132 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1133 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1134 hw_rf_kill = 1;
1135
1136 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1137 hw_rf_kill ? "disable radio" : "enable radio");
1138
1139 priv->isr_stats.rfkill++;
1140
1141 /* driver only loads ucode once setting the interface up.
1142 * the driver allows loading the ucode even if the radio
1143 * is killed. Hence update the killswitch state here. The
1144 * rfkill handler will care about restarting if needed.
1145 */
1146 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1147 if (hw_rf_kill)
1148 set_bit(STATUS_RF_KILL_HW, &priv->status);
1149 else
1150 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1151 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1152 }
1153
1154 handled |= CSR_INT_BIT_RF_KILL;
1155 }
1156
1157 /* Chip got too hot and stopped itself */
1158 if (inta & CSR_INT_BIT_CT_KILL) {
1159 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1160 priv->isr_stats.ctkill++;
1161 handled |= CSR_INT_BIT_CT_KILL;
1162 }
1163
1164 /* Error detected by uCode */
1165 if (inta & CSR_INT_BIT_SW_ERR) {
1166 IWL_ERR(priv, "Microcode SW error detected. "
1167 " Restarting 0x%X.\n", inta);
1168 priv->isr_stats.sw++;
1169 priv->isr_stats.sw_err = inta;
1170 iwl_irq_handle_error(priv);
1171 handled |= CSR_INT_BIT_SW_ERR;
1172 }
1173
1174 /* uCode wakes up after power-down sleep */
1175 if (inta & CSR_INT_BIT_WAKEUP) {
1176 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1177 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1178 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1179 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1180 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1181 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1182 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1183 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
1184
1185 priv->isr_stats.wakeup++;
1186
1187 handled |= CSR_INT_BIT_WAKEUP;
1188 }
1189
1190 /* All uCode command responses, including Tx command responses,
1191 * Rx "responses" (frame-received notification), and other
1192 * notifications from uCode come through here*/
1193 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1194 CSR_INT_BIT_RX_PERIODIC)) {
1195 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1196 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1197 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1198 iwl_write32(priv, CSR_FH_INT_STATUS,
1199 CSR49_FH_INT_RX_MASK);
1200 }
1201 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1202 handled |= CSR_INT_BIT_RX_PERIODIC;
1203 iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
1204 }
1205 /* Sending RX interrupt require many steps to be done in the
1206 * the device:
1207 * 1- write interrupt to current index in ICT table.
1208 * 2- dma RX frame.
1209 * 3- update RX shared data to indicate last write index.
1210 * 4- send interrupt.
1211 * This could lead to RX race, driver could receive RX interrupt
1212 * but the shared data changes does not reflect this.
1213 * this could lead to RX race, RX periodic will solve this race
1214 */
1215 iwl_write32(priv, CSR_INT_PERIODIC_REG,
1216 CSR_INT_PERIODIC_DIS);
1217 iwl_rx_handle(priv);
1218 /* Only set RX periodic if real RX is received. */
1219 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1220 iwl_write32(priv, CSR_INT_PERIODIC_REG,
1221 CSR_INT_PERIODIC_ENA);
1222
1223 priv->isr_stats.rx++;
1224 }
1225
1226 if (inta & CSR_INT_BIT_FH_TX) {
1227 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1228 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
1229 priv->isr_stats.tx++;
1230 handled |= CSR_INT_BIT_FH_TX;
1231 /* FH finished to write, send event */
1232 priv->ucode_write_complete = 1;
1233 wake_up_interruptible(&priv->wait_command_queue);
1234 }
1235
1236 if (inta & ~handled) {
1237 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1238 priv->isr_stats.unhandled++;
1239 }
1240
1241 if (inta & ~(priv->inta_mask)) {
1242 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1243 inta & ~priv->inta_mask);
1244 }
1245
1246 /* Re-enable all interrupts */
1247 /* only Re-enable if diabled by irq */
1248 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1249 iwl_enable_interrupts(priv);
1250 }
1251
1252
1253 /******************************************************************************
1254 *
1255 * uCode download functions
1256 *
1257 ******************************************************************************/
1258
1259 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1260 {
1261 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1262 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1263 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1264 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1265 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1266 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1267 }
1268
1269 static void iwl_nic_start(struct iwl_priv *priv)
1270 {
1271 /* Remove all resets to allow NIC to operate */
1272 iwl_write32(priv, CSR_RESET, 0);
1273 }
1274
1275
1276 /**
1277 * iwl_read_ucode - Read uCode images from disk file.
1278 *
1279 * Copy into buffers for card to fetch via bus-mastering
1280 */
1281 static int iwl_read_ucode(struct iwl_priv *priv)
1282 {
1283 struct iwl_ucode_header *ucode;
1284 int ret = -EINVAL, index;
1285 const struct firmware *ucode_raw;
1286 const char *name_pre = priv->cfg->fw_name_pre;
1287 const unsigned int api_max = priv->cfg->ucode_api_max;
1288 const unsigned int api_min = priv->cfg->ucode_api_min;
1289 char buf[25];
1290 u8 *src;
1291 size_t len;
1292 u32 api_ver, build;
1293 u32 inst_size, data_size, init_size, init_data_size, boot_size;
1294 u16 eeprom_ver;
1295
1296 /* Ask kernel firmware_class module to get the boot firmware off disk.
1297 * request_firmware() is synchronous, file is in memory on return. */
1298 for (index = api_max; index >= api_min; index--) {
1299 sprintf(buf, "%s%d%s", name_pre, index, ".ucode");
1300 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
1301 if (ret < 0) {
1302 IWL_ERR(priv, "%s firmware file req failed: %d\n",
1303 buf, ret);
1304 if (ret == -ENOENT)
1305 continue;
1306 else
1307 goto error;
1308 } else {
1309 if (index < api_max)
1310 IWL_ERR(priv, "Loaded firmware %s, "
1311 "which is deprecated. "
1312 "Please use API v%u instead.\n",
1313 buf, api_max);
1314
1315 IWL_DEBUG_INFO(priv, "Got firmware '%s' file (%zd bytes) from disk\n",
1316 buf, ucode_raw->size);
1317 break;
1318 }
1319 }
1320
1321 if (ret < 0)
1322 goto error;
1323
1324 /* Make sure that we got at least the v1 header! */
1325 if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) {
1326 IWL_ERR(priv, "File size way too small!\n");
1327 ret = -EINVAL;
1328 goto err_release;
1329 }
1330
1331 /* Data from ucode file: header followed by uCode images */
1332 ucode = (struct iwl_ucode_header *)ucode_raw->data;
1333
1334 priv->ucode_ver = le32_to_cpu(ucode->ver);
1335 api_ver = IWL_UCODE_API(priv->ucode_ver);
1336 build = priv->cfg->ops->ucode->get_build(ucode, api_ver);
1337 inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver);
1338 data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver);
1339 init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver);
1340 init_data_size =
1341 priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver);
1342 boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver);
1343 src = priv->cfg->ops->ucode->get_data(ucode, api_ver);
1344
1345 /* api_ver should match the api version forming part of the
1346 * firmware filename ... but we don't check for that and only rely
1347 * on the API version read from firmware header from here on forward */
1348
1349 if (api_ver < api_min || api_ver > api_max) {
1350 IWL_ERR(priv, "Driver unable to support your firmware API. "
1351 "Driver supports v%u, firmware is v%u.\n",
1352 api_max, api_ver);
1353 priv->ucode_ver = 0;
1354 ret = -EINVAL;
1355 goto err_release;
1356 }
1357 if (api_ver != api_max)
1358 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
1359 "got v%u. New firmware can be obtained "
1360 "from http://www.intellinuxwireless.org.\n",
1361 api_max, api_ver);
1362
1363 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
1364 IWL_UCODE_MAJOR(priv->ucode_ver),
1365 IWL_UCODE_MINOR(priv->ucode_ver),
1366 IWL_UCODE_API(priv->ucode_ver),
1367 IWL_UCODE_SERIAL(priv->ucode_ver));
1368
1369 if (build)
1370 IWL_DEBUG_INFO(priv, "Build %u\n", build);
1371
1372 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
1373 IWL_DEBUG_INFO(priv, "NVM Type: %s, version: 0x%x\n",
1374 (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
1375 ? "OTP" : "EEPROM", eeprom_ver);
1376
1377 IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
1378 priv->ucode_ver);
1379 IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
1380 inst_size);
1381 IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
1382 data_size);
1383 IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
1384 init_size);
1385 IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
1386 init_data_size);
1387 IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
1388 boot_size);
1389
1390 /* Verify size of file vs. image size info in file's header */
1391 if (ucode_raw->size !=
1392 priv->cfg->ops->ucode->get_header_size(api_ver) +
1393 inst_size + data_size + init_size +
1394 init_data_size + boot_size) {
1395
1396 IWL_DEBUG_INFO(priv,
1397 "uCode file size %d does not match expected size\n",
1398 (int)ucode_raw->size);
1399 ret = -EINVAL;
1400 goto err_release;
1401 }
1402
1403 /* Verify that uCode images will fit in card's SRAM */
1404 if (inst_size > priv->hw_params.max_inst_size) {
1405 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
1406 inst_size);
1407 ret = -EINVAL;
1408 goto err_release;
1409 }
1410
1411 if (data_size > priv->hw_params.max_data_size) {
1412 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
1413 data_size);
1414 ret = -EINVAL;
1415 goto err_release;
1416 }
1417 if (init_size > priv->hw_params.max_inst_size) {
1418 IWL_INFO(priv, "uCode init instr len %d too large to fit in\n",
1419 init_size);
1420 ret = -EINVAL;
1421 goto err_release;
1422 }
1423 if (init_data_size > priv->hw_params.max_data_size) {
1424 IWL_INFO(priv, "uCode init data len %d too large to fit in\n",
1425 init_data_size);
1426 ret = -EINVAL;
1427 goto err_release;
1428 }
1429 if (boot_size > priv->hw_params.max_bsm_size) {
1430 IWL_INFO(priv, "uCode boot instr len %d too large to fit in\n",
1431 boot_size);
1432 ret = -EINVAL;
1433 goto err_release;
1434 }
1435
1436 /* Allocate ucode buffers for card's bus-master loading ... */
1437
1438 /* Runtime instructions and 2 copies of data:
1439 * 1) unmodified from disk
1440 * 2) backup cache for save/restore during power-downs */
1441 priv->ucode_code.len = inst_size;
1442 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
1443
1444 priv->ucode_data.len = data_size;
1445 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
1446
1447 priv->ucode_data_backup.len = data_size;
1448 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1449
1450 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
1451 !priv->ucode_data_backup.v_addr)
1452 goto err_pci_alloc;
1453
1454 /* Initialization instructions and data */
1455 if (init_size && init_data_size) {
1456 priv->ucode_init.len = init_size;
1457 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
1458
1459 priv->ucode_init_data.len = init_data_size;
1460 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1461
1462 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1463 goto err_pci_alloc;
1464 }
1465
1466 /* Bootstrap (instructions only, no data) */
1467 if (boot_size) {
1468 priv->ucode_boot.len = boot_size;
1469 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
1470
1471 if (!priv->ucode_boot.v_addr)
1472 goto err_pci_alloc;
1473 }
1474
1475 /* Copy images into buffers for card's bus-master reads ... */
1476
1477 /* Runtime instructions (first block of data in file) */
1478 len = inst_size;
1479 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n", len);
1480 memcpy(priv->ucode_code.v_addr, src, len);
1481 src += len;
1482
1483 IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1484 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1485
1486 /* Runtime data (2nd block)
1487 * NOTE: Copy into backup buffer will be done in iwl_up() */
1488 len = data_size;
1489 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n", len);
1490 memcpy(priv->ucode_data.v_addr, src, len);
1491 memcpy(priv->ucode_data_backup.v_addr, src, len);
1492 src += len;
1493
1494 /* Initialization instructions (3rd block) */
1495 if (init_size) {
1496 len = init_size;
1497 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
1498 len);
1499 memcpy(priv->ucode_init.v_addr, src, len);
1500 src += len;
1501 }
1502
1503 /* Initialization data (4th block) */
1504 if (init_data_size) {
1505 len = init_data_size;
1506 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
1507 len);
1508 memcpy(priv->ucode_init_data.v_addr, src, len);
1509 src += len;
1510 }
1511
1512 /* Bootstrap instructions (5th block) */
1513 len = boot_size;
1514 IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n", len);
1515 memcpy(priv->ucode_boot.v_addr, src, len);
1516
1517 /* We have our copies now, allow OS release its copies */
1518 release_firmware(ucode_raw);
1519 return 0;
1520
1521 err_pci_alloc:
1522 IWL_ERR(priv, "failed to allocate pci memory\n");
1523 ret = -ENOMEM;
1524 iwl_dealloc_ucode_pci(priv);
1525
1526 err_release:
1527 release_firmware(ucode_raw);
1528
1529 error:
1530 return ret;
1531 }
1532
1533 #ifdef CONFIG_IWLWIFI_DEBUG
1534 static const char *desc_lookup_text[] = {
1535 "OK",
1536 "FAIL",
1537 "BAD_PARAM",
1538 "BAD_CHECKSUM",
1539 "NMI_INTERRUPT_WDG",
1540 "SYSASSERT",
1541 "FATAL_ERROR",
1542 "BAD_COMMAND",
1543 "HW_ERROR_TUNE_LOCK",
1544 "HW_ERROR_TEMPERATURE",
1545 "ILLEGAL_CHAN_FREQ",
1546 "VCC_NOT_STABLE",
1547 "FH_ERROR",
1548 "NMI_INTERRUPT_HOST",
1549 "NMI_INTERRUPT_ACTION_PT",
1550 "NMI_INTERRUPT_UNKNOWN",
1551 "UCODE_VERSION_MISMATCH",
1552 "HW_ERROR_ABS_LOCK",
1553 "HW_ERROR_CAL_LOCK_FAIL",
1554 "NMI_INTERRUPT_INST_ACTION_PT",
1555 "NMI_INTERRUPT_DATA_ACTION_PT",
1556 "NMI_TRM_HW_ER",
1557 "NMI_INTERRUPT_TRM",
1558 "NMI_INTERRUPT_BREAK_POINT"
1559 "DEBUG_0",
1560 "DEBUG_1",
1561 "DEBUG_2",
1562 "DEBUG_3",
1563 "UNKNOWN"
1564 };
1565
1566 static const char *desc_lookup(int i)
1567 {
1568 int max = ARRAY_SIZE(desc_lookup_text) - 1;
1569
1570 if (i < 0 || i > max)
1571 i = max;
1572
1573 return desc_lookup_text[i];
1574 }
1575
1576 #define ERROR_START_OFFSET (1 * sizeof(u32))
1577 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
1578
1579 void iwl_dump_nic_error_log(struct iwl_priv *priv)
1580 {
1581 u32 data2, line;
1582 u32 desc, time, count, base, data1;
1583 u32 blink1, blink2, ilink1, ilink2;
1584
1585 if (priv->ucode_type == UCODE_INIT)
1586 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
1587 else
1588 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1589
1590 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1591 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
1592 return;
1593 }
1594
1595 count = iwl_read_targ_mem(priv, base);
1596
1597 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1598 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1599 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1600 priv->status, count);
1601 }
1602
1603 desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
1604 blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
1605 blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
1606 ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
1607 ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
1608 data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
1609 data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
1610 line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
1611 time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
1612
1613 trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, data2, line,
1614 blink1, blink2, ilink1, ilink2);
1615
1616 IWL_ERR(priv, "Desc Time "
1617 "data1 data2 line\n");
1618 IWL_ERR(priv, "%-28s (#%02d) %010u 0x%08X 0x%08X %u\n",
1619 desc_lookup(desc), desc, time, data1, data2, line);
1620 IWL_ERR(priv, "blink1 blink2 ilink1 ilink2\n");
1621 IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
1622 ilink1, ilink2);
1623
1624 }
1625
1626 #define EVENT_START_OFFSET (4 * sizeof(u32))
1627
1628 /**
1629 * iwl_print_event_log - Dump error event log to syslog
1630 *
1631 */
1632 static void iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
1633 u32 num_events, u32 mode)
1634 {
1635 u32 i;
1636 u32 base; /* SRAM byte address of event log header */
1637 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1638 u32 ptr; /* SRAM byte address of log data */
1639 u32 ev, time, data; /* event log data */
1640
1641 if (num_events == 0)
1642 return;
1643 if (priv->ucode_type == UCODE_INIT)
1644 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1645 else
1646 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1647
1648 if (mode == 0)
1649 event_size = 2 * sizeof(u32);
1650 else
1651 event_size = 3 * sizeof(u32);
1652
1653 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1654
1655 /* "time" is actually "data" for mode 0 (no timestamp).
1656 * place event id # at far right for easier visual parsing. */
1657 for (i = 0; i < num_events; i++) {
1658 ev = iwl_read_targ_mem(priv, ptr);
1659 ptr += sizeof(u32);
1660 time = iwl_read_targ_mem(priv, ptr);
1661 ptr += sizeof(u32);
1662 if (mode == 0) {
1663 /* data, ev */
1664 trace_iwlwifi_dev_ucode_event(priv, 0, time, ev);
1665 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n", time, ev);
1666 } else {
1667 data = iwl_read_targ_mem(priv, ptr);
1668 ptr += sizeof(u32);
1669 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
1670 time, data, ev);
1671 trace_iwlwifi_dev_ucode_event(priv, time, data, ev);
1672 }
1673 }
1674 }
1675
1676 void iwl_dump_nic_event_log(struct iwl_priv *priv)
1677 {
1678 u32 base; /* SRAM byte address of event log header */
1679 u32 capacity; /* event log capacity in # entries */
1680 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
1681 u32 num_wraps; /* # times uCode wrapped to top of log */
1682 u32 next_entry; /* index of next entry to be written by uCode */
1683 u32 size; /* # entries that we'll print */
1684
1685 if (priv->ucode_type == UCODE_INIT)
1686 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1687 else
1688 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1689
1690 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1691 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
1692 return;
1693 }
1694
1695 /* event log header */
1696 capacity = iwl_read_targ_mem(priv, base);
1697 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
1698 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
1699 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
1700
1701 size = num_wraps ? capacity : next_entry;
1702
1703 /* bail out if nothing in log */
1704 if (size == 0) {
1705 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
1706 return;
1707 }
1708
1709 IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
1710 size, num_wraps);
1711
1712 /* if uCode has wrapped back to top of log, start at the oldest entry,
1713 * i.e the next one that uCode would fill. */
1714 if (num_wraps)
1715 iwl_print_event_log(priv, next_entry,
1716 capacity - next_entry, mode);
1717 /* (then/else) start at top of log */
1718 iwl_print_event_log(priv, 0, next_entry, mode);
1719
1720 }
1721 #endif
1722
1723 /**
1724 * iwl_alive_start - called after REPLY_ALIVE notification received
1725 * from protocol/runtime uCode (initialization uCode's
1726 * Alive gets handled by iwl_init_alive_start()).
1727 */
1728 static void iwl_alive_start(struct iwl_priv *priv)
1729 {
1730 int ret = 0;
1731
1732 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
1733
1734 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
1735 /* We had an error bringing up the hardware, so take it
1736 * all the way back down so we can try again */
1737 IWL_DEBUG_INFO(priv, "Alive failed.\n");
1738 goto restart;
1739 }
1740
1741 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
1742 * This is a paranoid check, because we would not have gotten the
1743 * "runtime" alive if code weren't properly loaded. */
1744 if (iwl_verify_ucode(priv)) {
1745 /* Runtime instruction load was bad;
1746 * take it all the way back down so we can try again */
1747 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
1748 goto restart;
1749 }
1750
1751 iwl_clear_stations_table(priv);
1752 ret = priv->cfg->ops->lib->alive_notify(priv);
1753 if (ret) {
1754 IWL_WARN(priv,
1755 "Could not complete ALIVE transition [ntf]: %d\n", ret);
1756 goto restart;
1757 }
1758
1759 /* After the ALIVE response, we can send host commands to the uCode */
1760 set_bit(STATUS_ALIVE, &priv->status);
1761
1762 if (iwl_is_rfkill(priv))
1763 return;
1764
1765 ieee80211_wake_queues(priv->hw);
1766
1767 priv->active_rate = priv->rates_mask;
1768 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1769
1770 /* Configure Tx antenna selection based on H/W config */
1771 if (priv->cfg->ops->hcmd->set_tx_ant)
1772 priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
1773
1774 if (iwl_is_associated(priv)) {
1775 struct iwl_rxon_cmd *active_rxon =
1776 (struct iwl_rxon_cmd *)&priv->active_rxon;
1777 /* apply any changes in staging */
1778 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
1779 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1780 } else {
1781 /* Initialize our rx_config data */
1782 iwl_connection_init_rx_config(priv, priv->iw_mode);
1783
1784 if (priv->cfg->ops->hcmd->set_rxon_chain)
1785 priv->cfg->ops->hcmd->set_rxon_chain(priv);
1786
1787 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1788 }
1789
1790 /* Configure Bluetooth device coexistence support */
1791 iwl_send_bt_config(priv);
1792
1793 iwl_reset_run_time_calib(priv);
1794
1795 /* Configure the adapter for unassociated operation */
1796 iwlcore_commit_rxon(priv);
1797
1798 /* At this point, the NIC is initialized and operational */
1799 iwl_rf_kill_ct_config(priv);
1800
1801 iwl_leds_init(priv);
1802
1803 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
1804 set_bit(STATUS_READY, &priv->status);
1805 wake_up_interruptible(&priv->wait_command_queue);
1806
1807 iwl_power_update_mode(priv, true);
1808
1809 /* reassociate for ADHOC mode */
1810 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
1811 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
1812 priv->vif);
1813 if (beacon)
1814 iwl_mac_beacon_update(priv->hw, beacon);
1815 }
1816
1817
1818 if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
1819 iwl_set_mode(priv, priv->iw_mode);
1820
1821 return;
1822
1823 restart:
1824 queue_work(priv->workqueue, &priv->restart);
1825 }
1826
1827 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
1828
1829 static void __iwl_down(struct iwl_priv *priv)
1830 {
1831 unsigned long flags;
1832 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
1833
1834 IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
1835
1836 if (!exit_pending)
1837 set_bit(STATUS_EXIT_PENDING, &priv->status);
1838
1839 iwl_clear_stations_table(priv);
1840
1841 /* Unblock any waiting calls */
1842 wake_up_interruptible_all(&priv->wait_command_queue);
1843
1844 /* Wipe out the EXIT_PENDING status bit if we are not actually
1845 * exiting the module */
1846 if (!exit_pending)
1847 clear_bit(STATUS_EXIT_PENDING, &priv->status);
1848
1849 /* stop and reset the on-board processor */
1850 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
1851
1852 /* tell the device to stop sending interrupts */
1853 spin_lock_irqsave(&priv->lock, flags);
1854 iwl_disable_interrupts(priv);
1855 spin_unlock_irqrestore(&priv->lock, flags);
1856 iwl_synchronize_irq(priv);
1857
1858 if (priv->mac80211_registered)
1859 ieee80211_stop_queues(priv->hw);
1860
1861 /* If we have not previously called iwl_init() then
1862 * clear all bits but the RF Kill bit and return */
1863 if (!iwl_is_init(priv)) {
1864 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1865 STATUS_RF_KILL_HW |
1866 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1867 STATUS_GEO_CONFIGURED |
1868 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1869 STATUS_EXIT_PENDING;
1870 goto exit;
1871 }
1872
1873 /* ...otherwise clear out all the status bits but the RF Kill
1874 * bit and continue taking the NIC down. */
1875 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1876 STATUS_RF_KILL_HW |
1877 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1878 STATUS_GEO_CONFIGURED |
1879 test_bit(STATUS_FW_ERROR, &priv->status) <<
1880 STATUS_FW_ERROR |
1881 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1882 STATUS_EXIT_PENDING;
1883
1884 /* device going down, Stop using ICT table */
1885 iwl_disable_ict(priv);
1886 spin_lock_irqsave(&priv->lock, flags);
1887 iwl_clear_bit(priv, CSR_GP_CNTRL,
1888 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
1889 spin_unlock_irqrestore(&priv->lock, flags);
1890
1891 iwl_txq_ctx_stop(priv);
1892 iwl_rxq_stop(priv);
1893
1894 iwl_write_prph(priv, APMG_CLK_DIS_REG,
1895 APMG_CLK_VAL_DMA_CLK_RQT);
1896
1897 udelay(5);
1898
1899 /* Stop the device, and put it in low power state */
1900 priv->cfg->ops->lib->apm_ops.stop(priv);
1901
1902 exit:
1903 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
1904
1905 if (priv->ibss_beacon)
1906 dev_kfree_skb(priv->ibss_beacon);
1907 priv->ibss_beacon = NULL;
1908
1909 /* clear out any free frames */
1910 iwl_clear_free_frames(priv);
1911 }
1912
1913 static void iwl_down(struct iwl_priv *priv)
1914 {
1915 mutex_lock(&priv->mutex);
1916 __iwl_down(priv);
1917 mutex_unlock(&priv->mutex);
1918
1919 iwl_cancel_deferred_work(priv);
1920 }
1921
1922 #define HW_READY_TIMEOUT (50)
1923
1924 static int iwl_set_hw_ready(struct iwl_priv *priv)
1925 {
1926 int ret = 0;
1927
1928 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1929 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
1930
1931 /* See if we got it */
1932 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
1933 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
1934 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
1935 HW_READY_TIMEOUT);
1936 if (ret != -ETIMEDOUT)
1937 priv->hw_ready = true;
1938 else
1939 priv->hw_ready = false;
1940
1941 IWL_DEBUG_INFO(priv, "hardware %s\n",
1942 (priv->hw_ready == 1) ? "ready" : "not ready");
1943 return ret;
1944 }
1945
1946 static int iwl_prepare_card_hw(struct iwl_priv *priv)
1947 {
1948 int ret = 0;
1949
1950 IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter \n");
1951
1952 ret = iwl_set_hw_ready(priv);
1953 if (priv->hw_ready)
1954 return ret;
1955
1956 /* If HW is not ready, prepare the conditions to check again */
1957 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1958 CSR_HW_IF_CONFIG_REG_PREPARE);
1959
1960 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
1961 ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
1962 CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
1963
1964 /* HW should be ready by now, check again. */
1965 if (ret != -ETIMEDOUT)
1966 iwl_set_hw_ready(priv);
1967
1968 return ret;
1969 }
1970
1971 #define MAX_HW_RESTARTS 5
1972
1973 static int __iwl_up(struct iwl_priv *priv)
1974 {
1975 int i;
1976 int ret;
1977
1978 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
1979 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
1980 return -EIO;
1981 }
1982
1983 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
1984 IWL_ERR(priv, "ucode not available for device bringup\n");
1985 return -EIO;
1986 }
1987
1988 iwl_prepare_card_hw(priv);
1989
1990 if (!priv->hw_ready) {
1991 IWL_WARN(priv, "Exit HW not ready\n");
1992 return -EIO;
1993 }
1994
1995 /* If platform's RF_KILL switch is NOT set to KILL */
1996 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
1997 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1998 else
1999 set_bit(STATUS_RF_KILL_HW, &priv->status);
2000
2001 if (iwl_is_rfkill(priv)) {
2002 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
2003
2004 iwl_enable_interrupts(priv);
2005 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2006 return 0;
2007 }
2008
2009 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2010
2011 ret = iwl_hw_nic_init(priv);
2012 if (ret) {
2013 IWL_ERR(priv, "Unable to init nic\n");
2014 return ret;
2015 }
2016
2017 /* make sure rfkill handshake bits are cleared */
2018 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2019 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2020 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2021
2022 /* clear (again), then enable host interrupts */
2023 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2024 iwl_enable_interrupts(priv);
2025
2026 /* really make sure rfkill handshake bits are cleared */
2027 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2028 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2029
2030 /* Copy original ucode data image from disk into backup cache.
2031 * This will be used to initialize the on-board processor's
2032 * data SRAM for a clean start when the runtime program first loads. */
2033 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2034 priv->ucode_data.len);
2035
2036 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2037
2038 iwl_clear_stations_table(priv);
2039
2040 /* load bootstrap state machine,
2041 * load bootstrap program into processor's memory,
2042 * prepare to load the "initialize" uCode */
2043 ret = priv->cfg->ops->lib->load_ucode(priv);
2044
2045 if (ret) {
2046 IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
2047 ret);
2048 continue;
2049 }
2050
2051 /* start card; "initialize" will load runtime ucode */
2052 iwl_nic_start(priv);
2053
2054 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2055
2056 return 0;
2057 }
2058
2059 set_bit(STATUS_EXIT_PENDING, &priv->status);
2060 __iwl_down(priv);
2061 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2062
2063 /* tried to restart and config the device for as long as our
2064 * patience could withstand */
2065 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2066 return -EIO;
2067 }
2068
2069
2070 /*****************************************************************************
2071 *
2072 * Workqueue callbacks
2073 *
2074 *****************************************************************************/
2075
2076 static void iwl_bg_init_alive_start(struct work_struct *data)
2077 {
2078 struct iwl_priv *priv =
2079 container_of(data, struct iwl_priv, init_alive_start.work);
2080
2081 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2082 return;
2083
2084 mutex_lock(&priv->mutex);
2085 priv->cfg->ops->lib->init_alive_start(priv);
2086 mutex_unlock(&priv->mutex);
2087 }
2088
2089 static void iwl_bg_alive_start(struct work_struct *data)
2090 {
2091 struct iwl_priv *priv =
2092 container_of(data, struct iwl_priv, alive_start.work);
2093
2094 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2095 return;
2096
2097 /* enable dram interrupt */
2098 iwl_reset_ict(priv);
2099
2100 mutex_lock(&priv->mutex);
2101 iwl_alive_start(priv);
2102 mutex_unlock(&priv->mutex);
2103 }
2104
2105 static void iwl_bg_run_time_calib_work(struct work_struct *work)
2106 {
2107 struct iwl_priv *priv = container_of(work, struct iwl_priv,
2108 run_time_calib_work);
2109
2110 mutex_lock(&priv->mutex);
2111
2112 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2113 test_bit(STATUS_SCANNING, &priv->status)) {
2114 mutex_unlock(&priv->mutex);
2115 return;
2116 }
2117
2118 if (priv->start_calib) {
2119 iwl_chain_noise_calibration(priv, &priv->statistics);
2120
2121 iwl_sensitivity_calibration(priv, &priv->statistics);
2122 }
2123
2124 mutex_unlock(&priv->mutex);
2125 return;
2126 }
2127
2128 static void iwl_bg_up(struct work_struct *data)
2129 {
2130 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
2131
2132 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2133 return;
2134
2135 mutex_lock(&priv->mutex);
2136 __iwl_up(priv);
2137 mutex_unlock(&priv->mutex);
2138 }
2139
2140 static void iwl_bg_restart(struct work_struct *data)
2141 {
2142 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
2143
2144 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2145 return;
2146
2147 if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2148 mutex_lock(&priv->mutex);
2149 priv->vif = NULL;
2150 priv->is_open = 0;
2151 mutex_unlock(&priv->mutex);
2152 iwl_down(priv);
2153 ieee80211_restart_hw(priv->hw);
2154 } else {
2155 iwl_down(priv);
2156 queue_work(priv->workqueue, &priv->up);
2157 }
2158 }
2159
2160 static void iwl_bg_rx_replenish(struct work_struct *data)
2161 {
2162 struct iwl_priv *priv =
2163 container_of(data, struct iwl_priv, rx_replenish);
2164
2165 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2166 return;
2167
2168 mutex_lock(&priv->mutex);
2169 iwl_rx_replenish(priv);
2170 mutex_unlock(&priv->mutex);
2171 }
2172
2173 #define IWL_DELAY_NEXT_SCAN (HZ*2)
2174
2175 void iwl_post_associate(struct iwl_priv *priv)
2176 {
2177 struct ieee80211_conf *conf = NULL;
2178 int ret = 0;
2179 unsigned long flags;
2180
2181 if (priv->iw_mode == NL80211_IFTYPE_AP) {
2182 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
2183 return;
2184 }
2185
2186 IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
2187 priv->assoc_id, priv->active_rxon.bssid_addr);
2188
2189
2190 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2191 return;
2192
2193
2194 if (!priv->vif || !priv->is_open)
2195 return;
2196
2197 iwl_scan_cancel_timeout(priv, 200);
2198
2199 conf = ieee80211_get_hw_conf(priv->hw);
2200
2201 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2202 iwlcore_commit_rxon(priv);
2203
2204 iwl_setup_rxon_timing(priv);
2205 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2206 sizeof(priv->rxon_timing), &priv->rxon_timing);
2207 if (ret)
2208 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2209 "Attempting to continue.\n");
2210
2211 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2212
2213 iwl_set_rxon_ht(priv, &priv->current_ht_config);
2214
2215 if (priv->cfg->ops->hcmd->set_rxon_chain)
2216 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2217
2218 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2219
2220 IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
2221 priv->assoc_id, priv->beacon_int);
2222
2223 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2224 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2225 else
2226 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2227
2228 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2229 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2230 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2231 else
2232 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2233
2234 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2235 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2236
2237 }
2238
2239 iwlcore_commit_rxon(priv);
2240
2241 switch (priv->iw_mode) {
2242 case NL80211_IFTYPE_STATION:
2243 break;
2244
2245 case NL80211_IFTYPE_ADHOC:
2246
2247 /* assume default assoc id */
2248 priv->assoc_id = 1;
2249
2250 iwl_rxon_add_station(priv, priv->bssid, 0);
2251 iwl_send_beacon_cmd(priv);
2252
2253 break;
2254
2255 default:
2256 IWL_ERR(priv, "%s Should not be called in %d mode\n",
2257 __func__, priv->iw_mode);
2258 break;
2259 }
2260
2261 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2262 priv->assoc_station_added = 1;
2263
2264 spin_lock_irqsave(&priv->lock, flags);
2265 iwl_activate_qos(priv, 0);
2266 spin_unlock_irqrestore(&priv->lock, flags);
2267
2268 /* the chain noise calibration will enabled PM upon completion
2269 * If chain noise has already been run, then we need to enable
2270 * power management here */
2271 if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
2272 iwl_power_update_mode(priv, false);
2273
2274 /* Enable Rx differential gain and sensitivity calibrations */
2275 iwl_chain_noise_reset(priv);
2276 priv->start_calib = 1;
2277
2278 }
2279
2280 /*****************************************************************************
2281 *
2282 * mac80211 entry point functions
2283 *
2284 *****************************************************************************/
2285
2286 #define UCODE_READY_TIMEOUT (4 * HZ)
2287
2288 static int iwl_mac_start(struct ieee80211_hw *hw)
2289 {
2290 struct iwl_priv *priv = hw->priv;
2291 int ret;
2292
2293 IWL_DEBUG_MAC80211(priv, "enter\n");
2294
2295 /* we should be verifying the device is ready to be opened */
2296 mutex_lock(&priv->mutex);
2297
2298 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
2299 * ucode filename and max sizes are card-specific. */
2300
2301 if (!priv->ucode_code.len) {
2302 ret = iwl_read_ucode(priv);
2303 if (ret) {
2304 IWL_ERR(priv, "Could not read microcode: %d\n", ret);
2305 mutex_unlock(&priv->mutex);
2306 return ret;
2307 }
2308 }
2309
2310 ret = __iwl_up(priv);
2311
2312 mutex_unlock(&priv->mutex);
2313
2314 if (ret)
2315 return ret;
2316
2317 if (iwl_is_rfkill(priv))
2318 goto out;
2319
2320 IWL_DEBUG_INFO(priv, "Start UP work done.\n");
2321
2322 /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
2323 * mac80211 will not be run successfully. */
2324 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2325 test_bit(STATUS_READY, &priv->status),
2326 UCODE_READY_TIMEOUT);
2327 if (!ret) {
2328 if (!test_bit(STATUS_READY, &priv->status)) {
2329 IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
2330 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2331 return -ETIMEDOUT;
2332 }
2333 }
2334
2335 iwl_led_start(priv);
2336
2337 out:
2338 priv->is_open = 1;
2339 IWL_DEBUG_MAC80211(priv, "leave\n");
2340 return 0;
2341 }
2342
2343 static void iwl_mac_stop(struct ieee80211_hw *hw)
2344 {
2345 struct iwl_priv *priv = hw->priv;
2346
2347 IWL_DEBUG_MAC80211(priv, "enter\n");
2348
2349 if (!priv->is_open)
2350 return;
2351
2352 priv->is_open = 0;
2353
2354 if (iwl_is_ready_rf(priv) || test_bit(STATUS_SCAN_HW, &priv->status)) {
2355 /* stop mac, cancel any scan request and clear
2356 * RXON_FILTER_ASSOC_MSK BIT
2357 */
2358 mutex_lock(&priv->mutex);
2359 iwl_scan_cancel_timeout(priv, 100);
2360 mutex_unlock(&priv->mutex);
2361 }
2362
2363 iwl_down(priv);
2364
2365 flush_workqueue(priv->workqueue);
2366
2367 /* enable interrupts again in order to receive rfkill changes */
2368 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2369 iwl_enable_interrupts(priv);
2370
2371 IWL_DEBUG_MAC80211(priv, "leave\n");
2372 }
2373
2374 static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2375 {
2376 struct iwl_priv *priv = hw->priv;
2377
2378 IWL_DEBUG_MACDUMP(priv, "enter\n");
2379
2380 IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2381 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2382
2383 if (iwl_tx_skb(priv, skb))
2384 dev_kfree_skb_any(skb);
2385
2386 IWL_DEBUG_MACDUMP(priv, "leave\n");
2387 return NETDEV_TX_OK;
2388 }
2389
2390 void iwl_config_ap(struct iwl_priv *priv)
2391 {
2392 int ret = 0;
2393 unsigned long flags;
2394
2395 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2396 return;
2397
2398 /* The following should be done only at AP bring up */
2399 if (!iwl_is_associated(priv)) {
2400
2401 /* RXON - unassoc (to set timing command) */
2402 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2403 iwlcore_commit_rxon(priv);
2404
2405 /* RXON Timing */
2406 iwl_setup_rxon_timing(priv);
2407 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2408 sizeof(priv->rxon_timing), &priv->rxon_timing);
2409 if (ret)
2410 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2411 "Attempting to continue.\n");
2412
2413 if (priv->cfg->ops->hcmd->set_rxon_chain)
2414 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2415
2416 /* FIXME: what should be the assoc_id for AP? */
2417 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2418 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2419 priv->staging_rxon.flags |=
2420 RXON_FLG_SHORT_PREAMBLE_MSK;
2421 else
2422 priv->staging_rxon.flags &=
2423 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2424
2425 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2426 if (priv->assoc_capability &
2427 WLAN_CAPABILITY_SHORT_SLOT_TIME)
2428 priv->staging_rxon.flags |=
2429 RXON_FLG_SHORT_SLOT_MSK;
2430 else
2431 priv->staging_rxon.flags &=
2432 ~RXON_FLG_SHORT_SLOT_MSK;
2433
2434 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2435 priv->staging_rxon.flags &=
2436 ~RXON_FLG_SHORT_SLOT_MSK;
2437 }
2438 /* restore RXON assoc */
2439 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2440 iwlcore_commit_rxon(priv);
2441 spin_lock_irqsave(&priv->lock, flags);
2442 iwl_activate_qos(priv, 1);
2443 spin_unlock_irqrestore(&priv->lock, flags);
2444 iwl_rxon_add_station(priv, iwl_bcast_addr, 0);
2445 }
2446 iwl_send_beacon_cmd(priv);
2447
2448 /* FIXME - we need to add code here to detect a totally new
2449 * configuration, reset the AP, unassoc, rxon timing, assoc,
2450 * clear sta table, add BCAST sta... */
2451 }
2452
2453 static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
2454 struct ieee80211_key_conf *keyconf, const u8 *addr,
2455 u32 iv32, u16 *phase1key)
2456 {
2457
2458 struct iwl_priv *priv = hw->priv;
2459 IWL_DEBUG_MAC80211(priv, "enter\n");
2460
2461 iwl_update_tkip_key(priv, keyconf, addr, iv32, phase1key);
2462
2463 IWL_DEBUG_MAC80211(priv, "leave\n");
2464 }
2465
2466 static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2467 struct ieee80211_vif *vif,
2468 struct ieee80211_sta *sta,
2469 struct ieee80211_key_conf *key)
2470 {
2471 struct iwl_priv *priv = hw->priv;
2472 const u8 *addr;
2473 int ret;
2474 u8 sta_id;
2475 bool is_default_wep_key = false;
2476
2477 IWL_DEBUG_MAC80211(priv, "enter\n");
2478
2479 if (priv->cfg->mod_params->sw_crypto) {
2480 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
2481 return -EOPNOTSUPP;
2482 }
2483 addr = sta ? sta->addr : iwl_bcast_addr;
2484 sta_id = iwl_find_station(priv, addr);
2485 if (sta_id == IWL_INVALID_STATION) {
2486 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
2487 addr);
2488 return -EINVAL;
2489
2490 }
2491
2492 mutex_lock(&priv->mutex);
2493 iwl_scan_cancel_timeout(priv, 100);
2494 mutex_unlock(&priv->mutex);
2495
2496 /* If we are getting WEP group key and we didn't receive any key mapping
2497 * so far, we are in legacy wep mode (group key only), otherwise we are
2498 * in 1X mode.
2499 * In legacy wep mode, we use another host command to the uCode */
2500 if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
2501 priv->iw_mode != NL80211_IFTYPE_AP) {
2502 if (cmd == SET_KEY)
2503 is_default_wep_key = !priv->key_mapping_key;
2504 else
2505 is_default_wep_key =
2506 (key->hw_key_idx == HW_KEY_DEFAULT);
2507 }
2508
2509 switch (cmd) {
2510 case SET_KEY:
2511 if (is_default_wep_key)
2512 ret = iwl_set_default_wep_key(priv, key);
2513 else
2514 ret = iwl_set_dynamic_key(priv, key, sta_id);
2515
2516 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
2517 break;
2518 case DISABLE_KEY:
2519 if (is_default_wep_key)
2520 ret = iwl_remove_default_wep_key(priv, key);
2521 else
2522 ret = iwl_remove_dynamic_key(priv, key, sta_id);
2523
2524 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
2525 break;
2526 default:
2527 ret = -EINVAL;
2528 }
2529
2530 IWL_DEBUG_MAC80211(priv, "leave\n");
2531
2532 return ret;
2533 }
2534
2535 static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
2536 enum ieee80211_ampdu_mlme_action action,
2537 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
2538 {
2539 struct iwl_priv *priv = hw->priv;
2540 int ret;
2541
2542 IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
2543 sta->addr, tid);
2544
2545 if (!(priv->cfg->sku & IWL_SKU_N))
2546 return -EACCES;
2547
2548 switch (action) {
2549 case IEEE80211_AMPDU_RX_START:
2550 IWL_DEBUG_HT(priv, "start Rx\n");
2551 return iwl_sta_rx_agg_start(priv, sta->addr, tid, *ssn);
2552 case IEEE80211_AMPDU_RX_STOP:
2553 IWL_DEBUG_HT(priv, "stop Rx\n");
2554 ret = iwl_sta_rx_agg_stop(priv, sta->addr, tid);
2555 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2556 return 0;
2557 else
2558 return ret;
2559 case IEEE80211_AMPDU_TX_START:
2560 IWL_DEBUG_HT(priv, "start Tx\n");
2561 return iwl_tx_agg_start(priv, sta->addr, tid, ssn);
2562 case IEEE80211_AMPDU_TX_STOP:
2563 IWL_DEBUG_HT(priv, "stop Tx\n");
2564 ret = iwl_tx_agg_stop(priv, sta->addr, tid);
2565 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2566 return 0;
2567 else
2568 return ret;
2569 default:
2570 IWL_DEBUG_HT(priv, "unknown\n");
2571 return -EINVAL;
2572 break;
2573 }
2574 return 0;
2575 }
2576
2577 static int iwl_mac_get_stats(struct ieee80211_hw *hw,
2578 struct ieee80211_low_level_stats *stats)
2579 {
2580 struct iwl_priv *priv = hw->priv;
2581
2582 priv = hw->priv;
2583 IWL_DEBUG_MAC80211(priv, "enter\n");
2584 IWL_DEBUG_MAC80211(priv, "leave\n");
2585
2586 return 0;
2587 }
2588
2589 /*****************************************************************************
2590 *
2591 * sysfs attributes
2592 *
2593 *****************************************************************************/
2594
2595 #ifdef CONFIG_IWLWIFI_DEBUG
2596
2597 /*
2598 * The following adds a new attribute to the sysfs representation
2599 * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
2600 * used for controlling the debug level.
2601 *
2602 * See the level definitions in iwl for details.
2603 *
2604 * The debug_level being managed using sysfs below is a per device debug
2605 * level that is used instead of the global debug level if it (the per
2606 * device debug level) is set.
2607 */
2608 static ssize_t show_debug_level(struct device *d,
2609 struct device_attribute *attr, char *buf)
2610 {
2611 struct iwl_priv *priv = dev_get_drvdata(d);
2612 return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
2613 }
2614 static ssize_t store_debug_level(struct device *d,
2615 struct device_attribute *attr,
2616 const char *buf, size_t count)
2617 {
2618 struct iwl_priv *priv = dev_get_drvdata(d);
2619 unsigned long val;
2620 int ret;
2621
2622 ret = strict_strtoul(buf, 0, &val);
2623 if (ret)
2624 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
2625 else {
2626 priv->debug_level = val;
2627 if (iwl_alloc_traffic_mem(priv))
2628 IWL_ERR(priv,
2629 "Not enough memory to generate traffic log\n");
2630 }
2631 return strnlen(buf, count);
2632 }
2633
2634 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
2635 show_debug_level, store_debug_level);
2636
2637
2638 #endif /* CONFIG_IWLWIFI_DEBUG */
2639
2640
2641 static ssize_t show_temperature(struct device *d,
2642 struct device_attribute *attr, char *buf)
2643 {
2644 struct iwl_priv *priv = dev_get_drvdata(d);
2645
2646 if (!iwl_is_alive(priv))
2647 return -EAGAIN;
2648
2649 return sprintf(buf, "%d\n", priv->temperature);
2650 }
2651
2652 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
2653
2654 static ssize_t show_tx_power(struct device *d,
2655 struct device_attribute *attr, char *buf)
2656 {
2657 struct iwl_priv *priv = dev_get_drvdata(d);
2658
2659 if (!iwl_is_ready_rf(priv))
2660 return sprintf(buf, "off\n");
2661 else
2662 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
2663 }
2664
2665 static ssize_t store_tx_power(struct device *d,
2666 struct device_attribute *attr,
2667 const char *buf, size_t count)
2668 {
2669 struct iwl_priv *priv = dev_get_drvdata(d);
2670 unsigned long val;
2671 int ret;
2672
2673 ret = strict_strtoul(buf, 10, &val);
2674 if (ret)
2675 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
2676 else {
2677 ret = iwl_set_tx_power(priv, val, false);
2678 if (ret)
2679 IWL_ERR(priv, "failed setting tx power (0x%d).\n",
2680 ret);
2681 else
2682 ret = count;
2683 }
2684 return ret;
2685 }
2686
2687 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
2688
2689 static ssize_t show_flags(struct device *d,
2690 struct device_attribute *attr, char *buf)
2691 {
2692 struct iwl_priv *priv = dev_get_drvdata(d);
2693
2694 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
2695 }
2696
2697 static ssize_t store_flags(struct device *d,
2698 struct device_attribute *attr,
2699 const char *buf, size_t count)
2700 {
2701 struct iwl_priv *priv = dev_get_drvdata(d);
2702 unsigned long val;
2703 u32 flags;
2704 int ret = strict_strtoul(buf, 0, &val);
2705 if (ret)
2706 return ret;
2707 flags = (u32)val;
2708
2709 mutex_lock(&priv->mutex);
2710 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
2711 /* Cancel any currently running scans... */
2712 if (iwl_scan_cancel_timeout(priv, 100))
2713 IWL_WARN(priv, "Could not cancel scan.\n");
2714 else {
2715 IWL_DEBUG_INFO(priv, "Commit rxon.flags = 0x%04X\n", flags);
2716 priv->staging_rxon.flags = cpu_to_le32(flags);
2717 iwlcore_commit_rxon(priv);
2718 }
2719 }
2720 mutex_unlock(&priv->mutex);
2721
2722 return count;
2723 }
2724
2725 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
2726
2727 static ssize_t show_filter_flags(struct device *d,
2728 struct device_attribute *attr, char *buf)
2729 {
2730 struct iwl_priv *priv = dev_get_drvdata(d);
2731
2732 return sprintf(buf, "0x%04X\n",
2733 le32_to_cpu(priv->active_rxon.filter_flags));
2734 }
2735
2736 static ssize_t store_filter_flags(struct device *d,
2737 struct device_attribute *attr,
2738 const char *buf, size_t count)
2739 {
2740 struct iwl_priv *priv = dev_get_drvdata(d);
2741 unsigned long val;
2742 u32 filter_flags;
2743 int ret = strict_strtoul(buf, 0, &val);
2744 if (ret)
2745 return ret;
2746 filter_flags = (u32)val;
2747
2748 mutex_lock(&priv->mutex);
2749 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
2750 /* Cancel any currently running scans... */
2751 if (iwl_scan_cancel_timeout(priv, 100))
2752 IWL_WARN(priv, "Could not cancel scan.\n");
2753 else {
2754 IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
2755 "0x%04X\n", filter_flags);
2756 priv->staging_rxon.filter_flags =
2757 cpu_to_le32(filter_flags);
2758 iwlcore_commit_rxon(priv);
2759 }
2760 }
2761 mutex_unlock(&priv->mutex);
2762
2763 return count;
2764 }
2765
2766 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
2767 store_filter_flags);
2768
2769
2770 static ssize_t show_statistics(struct device *d,
2771 struct device_attribute *attr, char *buf)
2772 {
2773 struct iwl_priv *priv = dev_get_drvdata(d);
2774 u32 size = sizeof(struct iwl_notif_statistics);
2775 u32 len = 0, ofs = 0;
2776 u8 *data = (u8 *)&priv->statistics;
2777 int rc = 0;
2778
2779 if (!iwl_is_alive(priv))
2780 return -EAGAIN;
2781
2782 mutex_lock(&priv->mutex);
2783 rc = iwl_send_statistics_request(priv, 0);
2784 mutex_unlock(&priv->mutex);
2785
2786 if (rc) {
2787 len = sprintf(buf,
2788 "Error sending statistics request: 0x%08X\n", rc);
2789 return len;
2790 }
2791
2792 while (size && (PAGE_SIZE - len)) {
2793 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
2794 PAGE_SIZE - len, 1);
2795 len = strlen(buf);
2796 if (PAGE_SIZE - len)
2797 buf[len++] = '\n';
2798
2799 ofs += 16;
2800 size -= min(size, 16U);
2801 }
2802
2803 return len;
2804 }
2805
2806 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
2807
2808 static ssize_t show_rts_ht_protection(struct device *d,
2809 struct device_attribute *attr, char *buf)
2810 {
2811 struct iwl_priv *priv = dev_get_drvdata(d);
2812
2813 return sprintf(buf, "%s\n",
2814 priv->cfg->use_rts_for_ht ? "RTS/CTS" : "CTS-to-self");
2815 }
2816
2817 static ssize_t store_rts_ht_protection(struct device *d,
2818 struct device_attribute *attr,
2819 const char *buf, size_t count)
2820 {
2821 struct iwl_priv *priv = dev_get_drvdata(d);
2822 unsigned long val;
2823 int ret;
2824
2825 ret = strict_strtoul(buf, 10, &val);
2826 if (ret)
2827 IWL_INFO(priv, "Input is not in decimal form.\n");
2828 else {
2829 if (!iwl_is_associated(priv))
2830 priv->cfg->use_rts_for_ht = val ? true : false;
2831 else
2832 IWL_ERR(priv, "Sta associated with AP - "
2833 "Change protection mechanism is not allowed\n");
2834 ret = count;
2835 }
2836 return ret;
2837 }
2838
2839 static DEVICE_ATTR(rts_ht_protection, S_IWUSR | S_IRUGO,
2840 show_rts_ht_protection, store_rts_ht_protection);
2841
2842
2843 /*****************************************************************************
2844 *
2845 * driver setup and teardown
2846 *
2847 *****************************************************************************/
2848
2849 static void iwl_setup_deferred_work(struct iwl_priv *priv)
2850 {
2851 priv->workqueue = create_singlethread_workqueue(DRV_NAME);
2852
2853 init_waitqueue_head(&priv->wait_command_queue);
2854
2855 INIT_WORK(&priv->up, iwl_bg_up);
2856 INIT_WORK(&priv->restart, iwl_bg_restart);
2857 INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
2858 INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
2859 INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
2860 INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
2861 INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
2862
2863 iwl_setup_scan_deferred_work(priv);
2864
2865 if (priv->cfg->ops->lib->setup_deferred_work)
2866 priv->cfg->ops->lib->setup_deferred_work(priv);
2867
2868 init_timer(&priv->statistics_periodic);
2869 priv->statistics_periodic.data = (unsigned long)priv;
2870 priv->statistics_periodic.function = iwl_bg_statistics_periodic;
2871
2872 if (!priv->cfg->use_isr_legacy)
2873 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
2874 iwl_irq_tasklet, (unsigned long)priv);
2875 else
2876 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
2877 iwl_irq_tasklet_legacy, (unsigned long)priv);
2878 }
2879
2880 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
2881 {
2882 if (priv->cfg->ops->lib->cancel_deferred_work)
2883 priv->cfg->ops->lib->cancel_deferred_work(priv);
2884
2885 cancel_delayed_work_sync(&priv->init_alive_start);
2886 cancel_delayed_work(&priv->scan_check);
2887 cancel_delayed_work(&priv->alive_start);
2888 cancel_work_sync(&priv->beacon_update);
2889 del_timer_sync(&priv->statistics_periodic);
2890 }
2891
2892 static struct attribute *iwl_sysfs_entries[] = {
2893 &dev_attr_flags.attr,
2894 &dev_attr_filter_flags.attr,
2895 &dev_attr_statistics.attr,
2896 &dev_attr_temperature.attr,
2897 &dev_attr_tx_power.attr,
2898 &dev_attr_rts_ht_protection.attr,
2899 #ifdef CONFIG_IWLWIFI_DEBUG
2900 &dev_attr_debug_level.attr,
2901 #endif
2902 NULL
2903 };
2904
2905 static struct attribute_group iwl_attribute_group = {
2906 .name = NULL, /* put in device directory */
2907 .attrs = iwl_sysfs_entries,
2908 };
2909
2910 static struct ieee80211_ops iwl_hw_ops = {
2911 .tx = iwl_mac_tx,
2912 .start = iwl_mac_start,
2913 .stop = iwl_mac_stop,
2914 .add_interface = iwl_mac_add_interface,
2915 .remove_interface = iwl_mac_remove_interface,
2916 .config = iwl_mac_config,
2917 .configure_filter = iwl_configure_filter,
2918 .set_key = iwl_mac_set_key,
2919 .update_tkip_key = iwl_mac_update_tkip_key,
2920 .get_stats = iwl_mac_get_stats,
2921 .get_tx_stats = iwl_mac_get_tx_stats,
2922 .conf_tx = iwl_mac_conf_tx,
2923 .reset_tsf = iwl_mac_reset_tsf,
2924 .bss_info_changed = iwl_bss_info_changed,
2925 .ampdu_action = iwl_mac_ampdu_action,
2926 .hw_scan = iwl_mac_hw_scan
2927 };
2928
2929 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2930 {
2931 int err = 0;
2932 struct iwl_priv *priv;
2933 struct ieee80211_hw *hw;
2934 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
2935 unsigned long flags;
2936 u16 pci_cmd;
2937
2938 /************************
2939 * 1. Allocating HW data
2940 ************************/
2941
2942 /* Disabling hardware scan means that mac80211 will perform scans
2943 * "the hard way", rather than using device's scan. */
2944 if (cfg->mod_params->disable_hw_scan) {
2945 if (iwl_debug_level & IWL_DL_INFO)
2946 dev_printk(KERN_DEBUG, &(pdev->dev),
2947 "Disabling hw_scan\n");
2948 iwl_hw_ops.hw_scan = NULL;
2949 }
2950
2951 hw = iwl_alloc_all(cfg, &iwl_hw_ops);
2952 if (!hw) {
2953 err = -ENOMEM;
2954 goto out;
2955 }
2956 priv = hw->priv;
2957 /* At this point both hw and priv are allocated. */
2958
2959 SET_IEEE80211_DEV(hw, &pdev->dev);
2960
2961 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
2962 priv->cfg = cfg;
2963 priv->pci_dev = pdev;
2964 priv->inta_mask = CSR_INI_SET_MASK;
2965
2966 #ifdef CONFIG_IWLWIFI_DEBUG
2967 atomic_set(&priv->restrict_refcnt, 0);
2968 #endif
2969 if (iwl_alloc_traffic_mem(priv))
2970 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
2971
2972 /**************************
2973 * 2. Initializing PCI bus
2974 **************************/
2975 if (pci_enable_device(pdev)) {
2976 err = -ENODEV;
2977 goto out_ieee80211_free_hw;
2978 }
2979
2980 pci_set_master(pdev);
2981
2982 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
2983 if (!err)
2984 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
2985 if (err) {
2986 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
2987 if (!err)
2988 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
2989 /* both attempts failed: */
2990 if (err) {
2991 IWL_WARN(priv, "No suitable DMA available.\n");
2992 goto out_pci_disable_device;
2993 }
2994 }
2995
2996 err = pci_request_regions(pdev, DRV_NAME);
2997 if (err)
2998 goto out_pci_disable_device;
2999
3000 pci_set_drvdata(pdev, priv);
3001
3002
3003 /***********************
3004 * 3. Read REV register
3005 ***********************/
3006 priv->hw_base = pci_iomap(pdev, 0, 0);
3007 if (!priv->hw_base) {
3008 err = -ENODEV;
3009 goto out_pci_release_regions;
3010 }
3011
3012 IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
3013 (unsigned long long) pci_resource_len(pdev, 0));
3014 IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
3015
3016 /* this spin lock will be used in apm_ops.init and EEPROM access
3017 * we should init now
3018 */
3019 spin_lock_init(&priv->reg_lock);
3020 iwl_hw_detect(priv);
3021 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s REV=0x%X\n",
3022 priv->cfg->name, priv->hw_rev);
3023
3024 /* We disable the RETRY_TIMEOUT register (0x41) to keep
3025 * PCI Tx retries from interfering with C3 CPU state */
3026 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
3027
3028 iwl_prepare_card_hw(priv);
3029 if (!priv->hw_ready) {
3030 IWL_WARN(priv, "Failed, HW not ready\n");
3031 goto out_iounmap;
3032 }
3033
3034 /* amp init */
3035 err = priv->cfg->ops->lib->apm_ops.init(priv);
3036 if (err < 0) {
3037 IWL_ERR(priv, "Failed to init APMG\n");
3038 goto out_iounmap;
3039 }
3040 /*****************
3041 * 4. Read EEPROM
3042 *****************/
3043 /* Read the EEPROM */
3044 err = iwl_eeprom_init(priv);
3045 if (err) {
3046 IWL_ERR(priv, "Unable to init EEPROM\n");
3047 goto out_iounmap;
3048 }
3049 err = iwl_eeprom_check_version(priv);
3050 if (err)
3051 goto out_free_eeprom;
3052
3053 /* extract MAC Address */
3054 iwl_eeprom_get_mac(priv, priv->mac_addr);
3055 IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
3056 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
3057
3058 /************************
3059 * 5. Setup HW constants
3060 ************************/
3061 if (iwl_set_hw_params(priv)) {
3062 IWL_ERR(priv, "failed to set hw parameters\n");
3063 goto out_free_eeprom;
3064 }
3065
3066 /*******************
3067 * 6. Setup priv
3068 *******************/
3069
3070 err = iwl_init_drv(priv);
3071 if (err)
3072 goto out_free_eeprom;
3073 /* At this point both hw and priv are initialized. */
3074
3075 /********************
3076 * 7. Setup services
3077 ********************/
3078 spin_lock_irqsave(&priv->lock, flags);
3079 iwl_disable_interrupts(priv);
3080 spin_unlock_irqrestore(&priv->lock, flags);
3081
3082 pci_enable_msi(priv->pci_dev);
3083
3084 iwl_alloc_isr_ict(priv);
3085 err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
3086 IRQF_SHARED, DRV_NAME, priv);
3087 if (err) {
3088 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
3089 goto out_disable_msi;
3090 }
3091 err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
3092 if (err) {
3093 IWL_ERR(priv, "failed to create sysfs device attributes\n");
3094 goto out_free_irq;
3095 }
3096
3097 iwl_setup_deferred_work(priv);
3098 iwl_setup_rx_handlers(priv);
3099
3100 /**********************************
3101 * 8. Setup and register mac80211
3102 **********************************/
3103
3104 /* enable interrupts if needed: hw bug w/a */
3105 pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
3106 if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
3107 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
3108 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
3109 }
3110
3111 iwl_enable_interrupts(priv);
3112
3113 err = iwl_setup_mac(priv);
3114 if (err)
3115 goto out_remove_sysfs;
3116
3117 err = iwl_dbgfs_register(priv, DRV_NAME);
3118 if (err)
3119 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
3120
3121 /* If platform's RF_KILL switch is NOT set to KILL */
3122 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3123 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3124 else
3125 set_bit(STATUS_RF_KILL_HW, &priv->status);
3126
3127 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
3128 test_bit(STATUS_RF_KILL_HW, &priv->status));
3129
3130 iwl_power_initialize(priv);
3131 iwl_tt_initialize(priv);
3132 return 0;
3133
3134 out_remove_sysfs:
3135 destroy_workqueue(priv->workqueue);
3136 priv->workqueue = NULL;
3137 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3138 out_free_irq:
3139 free_irq(priv->pci_dev->irq, priv);
3140 iwl_free_isr_ict(priv);
3141 out_disable_msi:
3142 pci_disable_msi(priv->pci_dev);
3143 iwl_uninit_drv(priv);
3144 out_free_eeprom:
3145 iwl_eeprom_free(priv);
3146 out_iounmap:
3147 pci_iounmap(pdev, priv->hw_base);
3148 out_pci_release_regions:
3149 pci_set_drvdata(pdev, NULL);
3150 pci_release_regions(pdev);
3151 out_pci_disable_device:
3152 pci_disable_device(pdev);
3153 out_ieee80211_free_hw:
3154 iwl_free_traffic_mem(priv);
3155 ieee80211_free_hw(priv->hw);
3156 out:
3157 return err;
3158 }
3159
3160 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
3161 {
3162 struct iwl_priv *priv = pci_get_drvdata(pdev);
3163 unsigned long flags;
3164
3165 if (!priv)
3166 return;
3167
3168 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
3169
3170 iwl_dbgfs_unregister(priv);
3171 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3172
3173 /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
3174 * to be called and iwl_down since we are removing the device
3175 * we need to set STATUS_EXIT_PENDING bit.
3176 */
3177 set_bit(STATUS_EXIT_PENDING, &priv->status);
3178 if (priv->mac80211_registered) {
3179 ieee80211_unregister_hw(priv->hw);
3180 priv->mac80211_registered = 0;
3181 } else {
3182 iwl_down(priv);
3183 }
3184
3185 iwl_tt_exit(priv);
3186
3187 /* make sure we flush any pending irq or
3188 * tasklet for the driver
3189 */
3190 spin_lock_irqsave(&priv->lock, flags);
3191 iwl_disable_interrupts(priv);
3192 spin_unlock_irqrestore(&priv->lock, flags);
3193
3194 iwl_synchronize_irq(priv);
3195
3196 iwl_dealloc_ucode_pci(priv);
3197
3198 if (priv->rxq.bd)
3199 iwl_rx_queue_free(priv, &priv->rxq);
3200 iwl_hw_txq_ctx_free(priv);
3201
3202 iwl_clear_stations_table(priv);
3203 iwl_eeprom_free(priv);
3204
3205
3206 /*netif_stop_queue(dev); */
3207 flush_workqueue(priv->workqueue);
3208
3209 /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
3210 * priv->workqueue... so we can't take down the workqueue
3211 * until now... */
3212 destroy_workqueue(priv->workqueue);
3213 priv->workqueue = NULL;
3214 iwl_free_traffic_mem(priv);
3215
3216 free_irq(priv->pci_dev->irq, priv);
3217 pci_disable_msi(priv->pci_dev);
3218 pci_iounmap(pdev, priv->hw_base);
3219 pci_release_regions(pdev);
3220 pci_disable_device(pdev);
3221 pci_set_drvdata(pdev, NULL);
3222
3223 iwl_uninit_drv(priv);
3224
3225 iwl_free_isr_ict(priv);
3226
3227 if (priv->ibss_beacon)
3228 dev_kfree_skb(priv->ibss_beacon);
3229
3230 ieee80211_free_hw(priv->hw);
3231 }
3232
3233
3234 /*****************************************************************************
3235 *
3236 * driver and module entry point
3237 *
3238 *****************************************************************************/
3239
3240 /* Hardware specific file defines the PCI IDs table for that hardware module */
3241 static struct pci_device_id iwl_hw_card_ids[] = {
3242 #ifdef CONFIG_IWL4965
3243 {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
3244 {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
3245 #endif /* CONFIG_IWL4965 */
3246 #ifdef CONFIG_IWL5000
3247 {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bg_cfg)},
3248 {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bg_cfg)},
3249 {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)},
3250 {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)},
3251 {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)},
3252 {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)},
3253 {IWL_PCI_DEVICE(0x4232, PCI_ANY_ID, iwl5100_agn_cfg)},
3254 {IWL_PCI_DEVICE(0x4235, PCI_ANY_ID, iwl5300_agn_cfg)},
3255 {IWL_PCI_DEVICE(0x4236, PCI_ANY_ID, iwl5300_agn_cfg)},
3256 {IWL_PCI_DEVICE(0x4237, PCI_ANY_ID, iwl5100_agn_cfg)},
3257 /* 5350 WiFi/WiMax */
3258 {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)},
3259 {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)},
3260 {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)},
3261 /* 5150 Wifi/WiMax */
3262 {IWL_PCI_DEVICE(0x423C, PCI_ANY_ID, iwl5150_agn_cfg)},
3263 {IWL_PCI_DEVICE(0x423D, PCI_ANY_ID, iwl5150_agn_cfg)},
3264
3265 /* 6x00 Series */
3266 {IWL_PCI_DEVICE(0x008D, 0x1301, iwl6000h_2agn_cfg)},
3267 {IWL_PCI_DEVICE(0x008D, 0x1321, iwl6000h_2agn_cfg)},
3268 {IWL_PCI_DEVICE(0x008D, 0x1326, iwl6000h_2abg_cfg)},
3269 {IWL_PCI_DEVICE(0x008D, 0x1306, iwl6000h_2abg_cfg)},
3270 {IWL_PCI_DEVICE(0x008D, 0x1307, iwl6000h_2bg_cfg)},
3271 {IWL_PCI_DEVICE(0x008E, 0x1311, iwl6000h_2agn_cfg)},
3272 {IWL_PCI_DEVICE(0x008E, 0x1316, iwl6000h_2abg_cfg)},
3273
3274 {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
3275 {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
3276 {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
3277 {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
3278 {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
3279 {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
3280 {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
3281 {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
3282 {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
3283 {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
3284
3285 /* 6x50 WiFi/WiMax Series */
3286 {IWL_PCI_DEVICE(0x0086, 0x1101, iwl6050_3agn_cfg)},
3287 {IWL_PCI_DEVICE(0x0086, 0x1121, iwl6050_3agn_cfg)},
3288 {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
3289 {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
3290 {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
3291 {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
3292 {IWL_PCI_DEVICE(0x0088, 0x1111, iwl6050_3agn_cfg)},
3293 {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
3294 {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
3295
3296 /* 1000 Series WiFi */
3297 {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
3298 {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
3299 {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
3300 {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
3301 {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
3302 {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
3303 {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
3304 {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
3305 {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
3306 {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
3307 {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
3308 {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
3309 #endif /* CONFIG_IWL5000 */
3310
3311 {0}
3312 };
3313 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
3314
3315 static struct pci_driver iwl_driver = {
3316 .name = DRV_NAME,
3317 .id_table = iwl_hw_card_ids,
3318 .probe = iwl_pci_probe,
3319 .remove = __devexit_p(iwl_pci_remove),
3320 #ifdef CONFIG_PM
3321 .suspend = iwl_pci_suspend,
3322 .resume = iwl_pci_resume,
3323 #endif
3324 };
3325
3326 static int __init iwl_init(void)
3327 {
3328
3329 int ret;
3330 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
3331 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
3332
3333 ret = iwlagn_rate_control_register();
3334 if (ret) {
3335 printk(KERN_ERR DRV_NAME
3336 "Unable to register rate control algorithm: %d\n", ret);
3337 return ret;
3338 }
3339
3340 ret = pci_register_driver(&iwl_driver);
3341 if (ret) {
3342 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
3343 goto error_register;
3344 }
3345
3346 return ret;
3347
3348 error_register:
3349 iwlagn_rate_control_unregister();
3350 return ret;
3351 }
3352
3353 static void __exit iwl_exit(void)
3354 {
3355 pci_unregister_driver(&iwl_driver);
3356 iwlagn_rate_control_unregister();
3357 }
3358
3359 module_exit(iwl_exit);
3360 module_init(iwl_init);
3361
3362 #ifdef CONFIG_IWLWIFI_DEBUG
3363 module_param_named(debug50, iwl_debug_level, uint, S_IRUGO);
3364 MODULE_PARM_DESC(debug50, "50XX debug output mask (deprecated)");
3365 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
3366 MODULE_PARM_DESC(debug, "debug output mask");
3367 #endif
3368
mm of the moment repository