mm-only debug patch...
[mmotm.git] / arch / alpha / kernel / irq_srm.c
blob85229369a1f8bfa31e7e326f1e0bc42020550a75
1 /*
2 * Handle interrupts from the SRM, assuming no additional weirdness.
3 */
5 #include <linux/init.h>
6 #include <linux/sched.h>
7 #include <linux/irq.h>
9 #include "proto.h"
10 #include "irq_impl.h"
14 * Is the palcode SMP safe? In other words: can we call cserve_ena/dis
15 * at the same time in multiple CPUs? To be safe I added a spinlock
16 * but it can be removed trivially if the palcode is robust against smp.
18 DEFINE_SPINLOCK(srm_irq_lock);
20 static inline void
21 srm_enable_irq(unsigned int irq)
23 spin_lock(&srm_irq_lock);
24 cserve_ena(irq - 16);
25 spin_unlock(&srm_irq_lock);
28 static void
29 srm_disable_irq(unsigned int irq)
31 spin_lock(&srm_irq_lock);
32 cserve_dis(irq - 16);
33 spin_unlock(&srm_irq_lock);
36 static unsigned int
37 srm_startup_irq(unsigned int irq)
39 srm_enable_irq(irq);
40 return 0;
43 static void
44 srm_end_irq(unsigned int irq)
46 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
47 srm_enable_irq(irq);
50 /* Handle interrupts from the SRM, assuming no additional weirdness. */
51 static struct irq_chip srm_irq_type = {
52 .typename = "SRM",
53 .startup = srm_startup_irq,
54 .shutdown = srm_disable_irq,
55 .enable = srm_enable_irq,
56 .disable = srm_disable_irq,
57 .ack = srm_disable_irq,
58 .end = srm_end_irq,
61 void __init
62 init_srm_irqs(long max, unsigned long ignore_mask)
64 long i;
66 if (NR_IRQS <= 16)
67 return;
68 for (i = 16; i < max; ++i) {
69 if (i < 64 && ((ignore_mask >> i) & 1))
70 continue;
71 irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
72 irq_desc[i].chip = &srm_irq_type;
76 void
77 srm_device_interrupt(unsigned long vector)
79 int irq = (vector - 0x800) >> 4;
80 handle_irq(irq);