mm-only debug patch...
[mmotm.git] / arch / arm / mach-davinci / board-da850-evm.c
blob23e2024c3d9ba720c65e0c12ceae53e4a45a4efa
1 /*
2 * TI DA850/OMAP-L138 EVM board
4 * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
6 * Derived from: arch/arm/mach-davinci/board-da830-evm.c
7 * Original Copyrights follow:
9 * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
10 * the terms of the GNU General Public License version 2. This program
11 * is licensed "as is" without any warranty of any kind, whether express
12 * or implied.
14 #include <linux/kernel.h>
15 #include <linux/init.h>
16 #include <linux/console.h>
17 #include <linux/i2c.h>
18 #include <linux/i2c/at24.h>
19 #include <linux/i2c/pca953x.h>
20 #include <linux/gpio.h>
21 #include <linux/platform_device.h>
22 #include <linux/mtd/mtd.h>
23 #include <linux/mtd/nand.h>
24 #include <linux/mtd/partitions.h>
25 #include <linux/mtd/physmap.h>
26 #include <linux/regulator/machine.h>
28 #include <asm/mach-types.h>
29 #include <asm/mach/arch.h>
31 #include <mach/cp_intc.h>
32 #include <mach/da8xx.h>
33 #include <mach/nand.h>
34 #include <mach/mux.h>
36 #define DA850_EVM_PHY_MASK 0x1
37 #define DA850_EVM_MDIO_FREQUENCY 2200000 /* PHY bus frequency */
39 #define DA850_LCD_PWR_PIN GPIO_TO_PIN(2, 8)
40 #define DA850_LCD_BL_PIN GPIO_TO_PIN(2, 15)
42 #define DA850_MMCSD_CD_PIN GPIO_TO_PIN(4, 0)
43 #define DA850_MMCSD_WP_PIN GPIO_TO_PIN(4, 1)
45 #define DA850_MII_MDIO_CLKEN_PIN GPIO_TO_PIN(2, 6)
47 static struct mtd_partition da850_evm_norflash_partition[] = {
49 .name = "NOR filesystem",
50 .offset = 0,
51 .size = MTDPART_SIZ_FULL,
52 .mask_flags = 0,
56 static struct physmap_flash_data da850_evm_norflash_data = {
57 .width = 2,
58 .parts = da850_evm_norflash_partition,
59 .nr_parts = ARRAY_SIZE(da850_evm_norflash_partition),
62 static struct resource da850_evm_norflash_resource[] = {
64 .start = DA8XX_AEMIF_CS2_BASE,
65 .end = DA8XX_AEMIF_CS2_BASE + SZ_32M - 1,
66 .flags = IORESOURCE_MEM,
70 static struct platform_device da850_evm_norflash_device = {
71 .name = "physmap-flash",
72 .id = 0,
73 .dev = {
74 .platform_data = &da850_evm_norflash_data,
76 .num_resources = 1,
77 .resource = da850_evm_norflash_resource,
80 /* DA850/OMAP-L138 EVM includes a 512 MByte large-page NAND flash
81 * (128K blocks). It may be used instead of the (default) SPI flash
82 * to boot, using TI's tools to install the secondary boot loader
83 * (UBL) and U-Boot.
85 struct mtd_partition da850_evm_nandflash_partition[] = {
87 .name = "u-boot env",
88 .offset = 0,
89 .size = SZ_128K,
90 .mask_flags = MTD_WRITEABLE,
93 .name = "UBL",
94 .offset = MTDPART_OFS_APPEND,
95 .size = SZ_128K,
96 .mask_flags = MTD_WRITEABLE,
99 .name = "u-boot",
100 .offset = MTDPART_OFS_APPEND,
101 .size = 4 * SZ_128K,
102 .mask_flags = MTD_WRITEABLE,
105 .name = "kernel",
106 .offset = 0x200000,
107 .size = SZ_2M,
108 .mask_flags = 0,
111 .name = "filesystem",
112 .offset = MTDPART_OFS_APPEND,
113 .size = MTDPART_SIZ_FULL,
114 .mask_flags = 0,
118 static struct davinci_nand_pdata da850_evm_nandflash_data = {
119 .parts = da850_evm_nandflash_partition,
120 .nr_parts = ARRAY_SIZE(da850_evm_nandflash_partition),
121 .ecc_mode = NAND_ECC_HW,
122 .options = NAND_USE_FLASH_BBT,
125 static struct resource da850_evm_nandflash_resource[] = {
127 .start = DA8XX_AEMIF_CS3_BASE,
128 .end = DA8XX_AEMIF_CS3_BASE + SZ_512K + 2 * SZ_1K - 1,
129 .flags = IORESOURCE_MEM,
132 .start = DA8XX_AEMIF_CTL_BASE,
133 .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
134 .flags = IORESOURCE_MEM,
138 static struct platform_device da850_evm_nandflash_device = {
139 .name = "davinci_nand",
140 .id = 1,
141 .dev = {
142 .platform_data = &da850_evm_nandflash_data,
144 .num_resources = ARRAY_SIZE(da850_evm_nandflash_resource),
145 .resource = da850_evm_nandflash_resource,
148 static u32 ui_card_detected;
149 static void da850_evm_setup_nor_nand(void);
151 static int da850_evm_ui_expander_setup(struct i2c_client *client, unsigned gpio,
152 unsigned ngpio, void *c)
154 struct davinci_soc_info *soc_info = &davinci_soc_info;
155 int sel_a, sel_b, sel_c, ret;
157 sel_a = gpio + 7;
158 sel_b = gpio + 6;
159 sel_c = gpio + 5;
161 ret = gpio_request(sel_a, "sel_a");
162 if (ret) {
163 pr_warning("Cannot open UI expander pin %d\n", sel_a);
164 goto exp_setup_sela_fail;
167 ret = gpio_request(sel_b, "sel_b");
168 if (ret) {
169 pr_warning("Cannot open UI expander pin %d\n", sel_b);
170 goto exp_setup_selb_fail;
173 ret = gpio_request(sel_c, "sel_c");
174 if (ret) {
175 pr_warning("Cannot open UI expander pin %d\n", sel_c);
176 goto exp_setup_selc_fail;
179 /* deselect all functionalities */
180 gpio_direction_output(sel_a, 1);
181 gpio_direction_output(sel_b, 1);
182 gpio_direction_output(sel_c, 1);
184 ui_card_detected = 1;
185 pr_info("DA850/OMAP-L138 EVM UI card detected\n");
187 da850_evm_setup_nor_nand();
189 if (soc_info->emac_pdata->rmii_en)
190 /* enable RMII */
191 gpio_set_value(sel_a, 0);
193 return 0;
195 exp_setup_selc_fail:
196 gpio_free(sel_b);
197 exp_setup_selb_fail:
198 gpio_free(sel_a);
199 exp_setup_sela_fail:
200 return ret;
203 static int da850_evm_ui_expander_teardown(struct i2c_client *client,
204 unsigned gpio, unsigned ngpio, void *c)
206 /* deselect all functionalities */
207 gpio_set_value(gpio + 5, 1);
208 gpio_set_value(gpio + 6, 1);
209 gpio_set_value(gpio + 7, 1);
211 gpio_free(gpio + 5);
212 gpio_free(gpio + 6);
213 gpio_free(gpio + 7);
215 return 0;
218 static struct pca953x_platform_data da850_evm_ui_expander_info = {
219 .gpio_base = DAVINCI_N_GPIO,
220 .setup = da850_evm_ui_expander_setup,
221 .teardown = da850_evm_ui_expander_teardown,
224 static struct i2c_board_info __initdata da850_evm_i2c_devices[] = {
226 I2C_BOARD_INFO("tlv320aic3x", 0x18),
229 I2C_BOARD_INFO("tca6416", 0x20),
230 .platform_data = &da850_evm_ui_expander_info,
234 static struct davinci_i2c_platform_data da850_evm_i2c_0_pdata = {
235 .bus_freq = 100, /* kHz */
236 .bus_delay = 0, /* usec */
239 static struct davinci_uart_config da850_evm_uart_config __initdata = {
240 .enabled_uarts = 0x7,
243 static struct platform_device *da850_evm_devices[] __initdata = {
244 &da850_evm_nandflash_device,
245 &da850_evm_norflash_device,
248 /* davinci da850 evm audio machine driver */
249 static u8 da850_iis_serializer_direction[] = {
250 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
251 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
252 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, TX_MODE,
253 RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
256 static struct snd_platform_data da850_evm_snd_data = {
257 .tx_dma_offset = 0x2000,
258 .rx_dma_offset = 0x2000,
259 .op_mode = DAVINCI_MCASP_IIS_MODE,
260 .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction),
261 .tdm_slots = 2,
262 .serial_dir = da850_iis_serializer_direction,
263 .eventq_no = EVENTQ_1,
264 .version = MCASP_VERSION_2,
265 .txnumevt = 1,
266 .rxnumevt = 1,
269 static int da850_evm_mmc_get_ro(int index)
271 return gpio_get_value(DA850_MMCSD_WP_PIN);
274 static int da850_evm_mmc_get_cd(int index)
276 return !gpio_get_value(DA850_MMCSD_CD_PIN);
279 static struct davinci_mmc_config da850_mmc_config = {
280 .get_ro = da850_evm_mmc_get_ro,
281 .get_cd = da850_evm_mmc_get_cd,
282 .wires = 4,
283 .version = MMC_CTLR_VERSION_2,
286 static int da850_lcd_hw_init(void)
288 int status;
290 status = gpio_request(DA850_LCD_BL_PIN, "lcd bl\n");
291 if (status < 0)
292 return status;
294 status = gpio_request(DA850_LCD_PWR_PIN, "lcd pwr\n");
295 if (status < 0) {
296 gpio_free(DA850_LCD_BL_PIN);
297 return status;
300 gpio_direction_output(DA850_LCD_BL_PIN, 0);
301 gpio_direction_output(DA850_LCD_PWR_PIN, 0);
303 /* disable lcd backlight */
304 gpio_set_value(DA850_LCD_BL_PIN, 0);
306 /* disable lcd power */
307 gpio_set_value(DA850_LCD_PWR_PIN, 0);
309 /* enable lcd power */
310 gpio_set_value(DA850_LCD_PWR_PIN, 1);
312 /* enable lcd backlight */
313 gpio_set_value(DA850_LCD_BL_PIN, 1);
315 return 0;
318 #define DA8XX_AEMIF_CE2CFG_OFFSET 0x10
319 #define DA8XX_AEMIF_ASIZE_16BIT 0x1
321 static void __init da850_evm_init_nor(void)
323 void __iomem *aemif_addr;
325 aemif_addr = ioremap(DA8XX_AEMIF_CTL_BASE, SZ_32K);
327 /* Configure data bus width of CS2 to 16 bit */
328 writel(readl(aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET) |
329 DA8XX_AEMIF_ASIZE_16BIT,
330 aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET);
332 iounmap(aemif_addr);
335 /* TPS65070 voltage regulator support */
337 /* 3.3V */
338 struct regulator_consumer_supply tps65070_dcdc1_consumers[] = {
340 .supply = "usb0_vdda33",
343 .supply = "usb1_vdda33",
347 /* 3.3V or 1.8V */
348 struct regulator_consumer_supply tps65070_dcdc2_consumers[] = {
350 .supply = "dvdd3318_a",
353 .supply = "dvdd3318_b",
356 .supply = "dvdd3318_c",
360 /* 1.2V */
361 struct regulator_consumer_supply tps65070_dcdc3_consumers[] = {
363 .supply = "cvdd",
367 /* 1.8V LDO */
368 struct regulator_consumer_supply tps65070_ldo1_consumers[] = {
370 .supply = "sata_vddr",
373 .supply = "usb0_vdda18",
376 .supply = "usb1_vdda18",
379 .supply = "ddr_dvdd18",
383 /* 1.2V LDO */
384 struct regulator_consumer_supply tps65070_ldo2_consumers[] = {
386 .supply = "sata_vdd",
389 .supply = "pll0_vdda",
392 .supply = "pll1_vdda",
395 .supply = "usbs_cvdd",
398 .supply = "vddarnwa1",
402 struct regulator_init_data tps65070_regulator_data[] = {
403 /* dcdc1 */
405 .constraints = {
406 .min_uV = 3150000,
407 .max_uV = 3450000,
408 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
409 REGULATOR_CHANGE_STATUS),
410 .boot_on = 1,
412 .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc1_consumers),
413 .consumer_supplies = tps65070_dcdc1_consumers,
416 /* dcdc2 */
418 .constraints = {
419 .min_uV = 1710000,
420 .max_uV = 3450000,
421 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
422 REGULATOR_CHANGE_STATUS),
423 .boot_on = 1,
425 .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc2_consumers),
426 .consumer_supplies = tps65070_dcdc2_consumers,
429 /* dcdc3 */
431 .constraints = {
432 .min_uV = 950000,
433 .max_uV = 1320000,
434 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
435 REGULATOR_CHANGE_STATUS),
436 .boot_on = 1,
438 .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc3_consumers),
439 .consumer_supplies = tps65070_dcdc3_consumers,
442 /* ldo1 */
444 .constraints = {
445 .min_uV = 1710000,
446 .max_uV = 1890000,
447 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
448 REGULATOR_CHANGE_STATUS),
449 .boot_on = 1,
451 .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo1_consumers),
452 .consumer_supplies = tps65070_ldo1_consumers,
455 /* ldo2 */
457 .constraints = {
458 .min_uV = 1140000,
459 .max_uV = 1320000,
460 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
461 REGULATOR_CHANGE_STATUS),
462 .boot_on = 1,
464 .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo2_consumers),
465 .consumer_supplies = tps65070_ldo2_consumers,
469 static struct i2c_board_info __initdata da850evm_tps65070_info[] = {
471 I2C_BOARD_INFO("tps6507x", 0x48),
472 .platform_data = &tps65070_regulator_data[0],
476 static int __init pmic_tps65070_init(void)
478 return i2c_register_board_info(1, da850evm_tps65070_info,
479 ARRAY_SIZE(da850evm_tps65070_info));
482 #if defined(CONFIG_MMC_DAVINCI) || \
483 defined(CONFIG_MMC_DAVINCI_MODULE)
484 #define HAS_MMC 1
485 #else
486 #define HAS_MMC 0
487 #endif
489 static void da850_evm_setup_nor_nand(void)
491 int ret = 0;
493 if (ui_card_detected & !HAS_MMC) {
494 ret = da8xx_pinmux_setup(da850_nand_pins);
495 if (ret)
496 pr_warning("da850_evm_init: nand mux setup failed: "
497 "%d\n", ret);
499 ret = da8xx_pinmux_setup(da850_nor_pins);
500 if (ret)
501 pr_warning("da850_evm_init: nor mux setup failed: %d\n",
502 ret);
504 da850_evm_init_nor();
506 platform_add_devices(da850_evm_devices,
507 ARRAY_SIZE(da850_evm_devices));
511 static const short da850_evm_lcdc_pins[] = {
512 DA850_GPIO2_8, DA850_GPIO2_15,
516 static int __init da850_evm_config_emac(u8 rmii_en)
518 void __iomem *cfg_chip3_base;
519 int ret;
520 u32 val;
522 cfg_chip3_base = DA8XX_SYSCFG_VIRT(DA8XX_CFGCHIP3_REG);
524 /* configure the CFGCHIP3 register for RMII or MII */
525 val = __raw_readl(cfg_chip3_base);
526 if (rmii_en)
527 val |= BIT(8);
528 else
529 val &= ~BIT(8);
531 __raw_writel(val, cfg_chip3_base);
533 if (!rmii_en)
534 ret = da8xx_pinmux_setup(da850_cpgmac_pins);
535 else
536 ret = da8xx_pinmux_setup(da850_rmii_pins);
537 if (ret)
538 pr_warning("da850_evm_init: cpgmac/rmii mux setup failed: %d\n",
539 ret);
541 ret = davinci_cfg_reg(DA850_GPIO2_6);
542 if (ret)
543 pr_warning("da850_evm_init:GPIO(2,6) mux setup "
544 "failed\n");
546 ret = gpio_request(DA850_MII_MDIO_CLKEN_PIN, "mdio_clk_en");
547 if (ret) {
548 pr_warning("Cannot open GPIO %d\n",
549 DA850_MII_MDIO_CLKEN_PIN);
550 return ret;
553 if (rmii_en) {
554 /* Disable MII MDIO clock */
555 gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, 1);
556 pr_info("EMAC: RMII PHY configured, MII PHY will not be"
557 " functional\n");
558 } else {
559 /* Enable MII MDIO clock */
560 gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, 0);
561 pr_info("EMAC: MII PHY configured, RMII PHY will not be"
562 " functional\n");
565 return 0;
568 static __init void da850_evm_init(void)
570 struct davinci_soc_info *soc_info = &davinci_soc_info;
571 int ret;
573 ret = pmic_tps65070_init();
574 if (ret)
575 pr_warning("da850_evm_init: TPS65070 PMIC init failed: %d\n",
576 ret);
578 ret = da8xx_register_edma();
579 if (ret)
580 pr_warning("da850_evm_init: edma registration failed: %d\n",
581 ret);
583 ret = da8xx_pinmux_setup(da850_i2c0_pins);
584 if (ret)
585 pr_warning("da850_evm_init: i2c0 mux setup failed: %d\n",
586 ret);
588 ret = da8xx_register_i2c(0, &da850_evm_i2c_0_pdata);
589 if (ret)
590 pr_warning("da850_evm_init: i2c0 registration failed: %d\n",
591 ret);
593 soc_info->emac_pdata->phy_mask = DA850_EVM_PHY_MASK;
594 soc_info->emac_pdata->mdio_max_freq = DA850_EVM_MDIO_FREQUENCY;
595 #ifdef CONFIG_DA850_UI_RMII
596 soc_info->emac_pdata->rmii_en = 1;
597 #else
598 soc_info->emac_pdata->rmii_en = 0;
599 #endif
601 ret = da850_evm_config_emac(soc_info->emac_pdata->rmii_en);
602 if (ret)
603 pr_warning("da850_evm_init: emac setup failed: %d\n", ret);
605 ret = da8xx_register_emac();
606 if (ret)
607 pr_warning("da850_evm_init: emac registration failed: %d\n",
608 ret);
610 ret = da8xx_register_watchdog();
611 if (ret)
612 pr_warning("da830_evm_init: watchdog registration failed: %d\n",
613 ret);
615 if (HAS_MMC) {
616 ret = da8xx_pinmux_setup(da850_mmcsd0_pins);
617 if (ret)
618 pr_warning("da850_evm_init: mmcsd0 mux setup failed:"
619 " %d\n", ret);
621 ret = gpio_request(DA850_MMCSD_CD_PIN, "MMC CD\n");
622 if (ret)
623 pr_warning("da850_evm_init: can not open GPIO %d\n",
624 DA850_MMCSD_CD_PIN);
625 gpio_direction_input(DA850_MMCSD_CD_PIN);
627 ret = gpio_request(DA850_MMCSD_WP_PIN, "MMC WP\n");
628 if (ret)
629 pr_warning("da850_evm_init: can not open GPIO %d\n",
630 DA850_MMCSD_WP_PIN);
631 gpio_direction_input(DA850_MMCSD_WP_PIN);
633 ret = da8xx_register_mmcsd0(&da850_mmc_config);
634 if (ret)
635 pr_warning("da850_evm_init: mmcsd0 registration failed:"
636 " %d\n", ret);
639 davinci_serial_init(&da850_evm_uart_config);
641 i2c_register_board_info(1, da850_evm_i2c_devices,
642 ARRAY_SIZE(da850_evm_i2c_devices));
645 * shut down uart 0 and 1; they are not used on the board and
646 * accessing them causes endless "too much work in irq53" messages
647 * with arago fs
649 __raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30);
650 __raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30);
652 ret = da8xx_pinmux_setup(da850_mcasp_pins);
653 if (ret)
654 pr_warning("da850_evm_init: mcasp mux setup failed: %d\n",
655 ret);
657 da8xx_register_mcasp(0, &da850_evm_snd_data);
659 ret = da8xx_pinmux_setup(da850_lcdcntl_pins);
660 if (ret)
661 pr_warning("da850_evm_init: lcdcntl mux setup failed: %d\n",
662 ret);
664 /* Handle board specific muxing for LCD here */
665 ret = da8xx_pinmux_setup(da850_evm_lcdc_pins);
666 if (ret)
667 pr_warning("da850_evm_init: evm specific lcd mux setup "
668 "failed: %d\n", ret);
670 ret = da850_lcd_hw_init();
671 if (ret)
672 pr_warning("da850_evm_init: lcd initialization failed: %d\n",
673 ret);
675 ret = da8xx_register_lcdc(&sharp_lk043t1dg01_pdata);
676 if (ret)
677 pr_warning("da850_evm_init: lcdc registration failed: %d\n",
678 ret);
680 ret = da8xx_register_rtc();
681 if (ret)
682 pr_warning("da850_evm_init: rtc setup failed: %d\n", ret);
684 ret = da850_register_cpufreq();
685 if (ret)
686 pr_warning("da850_evm_init: cpufreq registration failed: %d\n",
687 ret);
690 #ifdef CONFIG_SERIAL_8250_CONSOLE
691 static int __init da850_evm_console_init(void)
693 return add_preferred_console("ttyS", 2, "115200");
695 console_initcall(da850_evm_console_init);
696 #endif
698 static __init void da850_evm_irq_init(void)
700 struct davinci_soc_info *soc_info = &davinci_soc_info;
702 cp_intc_init((void __iomem *)DA8XX_CP_INTC_VIRT, DA850_N_CP_INTC_IRQ,
703 soc_info->intc_irq_prios);
706 static void __init da850_evm_map_io(void)
708 da850_init();
711 MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138 EVM")
712 .phys_io = IO_PHYS,
713 .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
714 .boot_params = (DA8XX_DDR_BASE + 0x100),
715 .map_io = da850_evm_map_io,
716 .init_irq = da850_evm_irq_init,
717 .timer = &davinci_timer,
718 .init_machine = da850_evm_init,
719 MACHINE_END