mm-only debug patch...
[mmotm.git] / arch / s390 / include / asm / smp.h
bloba868b272c25791bbfe80621a1294b2aeb394d31b
1 /*
2 * include/asm-s390/smp.h
4 * S390 version
5 * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
7 * Martin Schwidefsky (schwidefsky@de.ibm.com)
8 * Heiko Carstens (heiko.carstens@de.ibm.com)
9 */
10 #ifndef __ASM_SMP_H
11 #define __ASM_SMP_H
13 #include <linux/threads.h>
14 #include <linux/cpumask.h>
15 #include <linux/bitops.h>
17 #if defined(__KERNEL__) && defined(CONFIG_SMP) && !defined(__ASSEMBLY__)
19 #include <asm/lowcore.h>
20 #include <asm/sigp.h>
21 #include <asm/ptrace.h>
22 #include <asm/system.h>
25 s390 specific smp.c headers
27 typedef struct
29 int intresting;
30 sigp_ccode ccode;
31 __u32 status;
32 __u16 cpu;
33 } sigp_info;
35 extern void machine_restart_smp(char *);
36 extern void machine_halt_smp(void);
37 extern void machine_power_off_smp(void);
39 #define NO_PROC_ID 0xFF /* No processor magic marker */
42 * This magic constant controls our willingness to transfer
43 * a process across CPUs. Such a transfer incurs misses on the L1
44 * cache, and on a P6 or P5 with multiple L2 caches L2 hits. My
45 * gut feeling is this will vary by board in value. For a board
46 * with separate L2 cache it probably depends also on the RSS, and
47 * for a board with shared L2 cache it ought to decay fast as other
48 * processes are run.
51 #define PROC_CHANGE_PENALTY 20 /* Schedule penalty */
53 #define raw_smp_processor_id() (S390_lowcore.cpu_nr)
54 #define cpu_logical_map(cpu) (cpu)
56 extern int __cpu_disable (void);
57 extern void __cpu_die (unsigned int cpu);
58 extern void cpu_die (void) __attribute__ ((noreturn));
59 extern int __cpu_up (unsigned int cpu);
61 extern struct mutex smp_cpu_state_mutex;
62 extern int smp_cpu_polarization[];
64 extern void arch_send_call_function_single_ipi(int cpu);
65 extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
67 #endif
69 #ifdef CONFIG_HOTPLUG_CPU
70 extern int smp_rescan_cpus(void);
71 #else
72 static inline int smp_rescan_cpus(void) { return 0; }
73 #endif
75 extern union save_area *zfcpdump_save_areas[NR_CPUS + 1];
76 #endif