mm-only debug patch...
[mmotm.git] / arch / sh / boards / mach-ecovec24 / setup.c
blob3b1ceb46fa543dbcaaa3033e0e5d63507cac81eb
1 /*
2 * Copyright (C) 2009 Renesas Solutions Corp.
4 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
11 #include <linux/init.h>
12 #include <linux/device.h>
13 #include <linux/platform_device.h>
14 #include <linux/mtd/physmap.h>
15 #include <linux/gpio.h>
16 #include <linux/interrupt.h>
17 #include <linux/io.h>
18 #include <linux/delay.h>
19 #include <linux/usb/r8a66597.h>
20 #include <linux/i2c.h>
21 #include <linux/i2c/tsc2007.h>
22 #include <linux/input.h>
23 #include <video/sh_mobile_lcdc.h>
24 #include <media/sh_mobile_ceu.h>
25 #include <asm/heartbeat.h>
26 #include <asm/sh_eth.h>
27 #include <asm/sh_keysc.h>
28 #include <asm/clock.h>
29 #include <cpu/sh7724.h>
32 * Address Interface BusWidth
33 *-----------------------------------------
34 * 0x0000_0000 uboot 16bit
35 * 0x0004_0000 Linux romImage 16bit
36 * 0x0014_0000 MTD for Linux 16bit
37 * 0x0400_0000 Internal I/O 16/32bit
38 * 0x0800_0000 DRAM 32bit
39 * 0x1800_0000 MFI 16bit
42 /* SWITCH
43 *------------------------------
44 * DS2[1] = FlashROM write protect ON : write protect
45 * OFF : No write protect
46 * DS2[2] = RMII / TS, SCIF ON : RMII
47 * OFF : TS, SCIF3
48 * DS2[3] = Camera / Video ON : Camera
49 * OFF : NTSC/PAL (IN)
50 * DS2[5] = NTSC_OUT Clock ON : On board OSC
51 * OFF : SH7724 DV_CLK
52 * DS2[6-7] = MMC / SD ON-OFF : SD
53 * OFF-ON : MMC
56 /* Heartbeat */
57 static unsigned char led_pos[] = { 0, 1, 2, 3 };
58 static struct heartbeat_data heartbeat_data = {
59 .regsize = 8,
60 .nr_bits = 4,
61 .bit_pos = led_pos,
64 static struct resource heartbeat_resources[] = {
65 [0] = {
66 .start = 0xA405012C, /* PTG */
67 .end = 0xA405012E - 1,
68 .flags = IORESOURCE_MEM,
72 static struct platform_device heartbeat_device = {
73 .name = "heartbeat",
74 .id = -1,
75 .dev = {
76 .platform_data = &heartbeat_data,
78 .num_resources = ARRAY_SIZE(heartbeat_resources),
79 .resource = heartbeat_resources,
82 /* MTD */
83 static struct mtd_partition nor_flash_partitions[] = {
85 .name = "boot loader",
86 .offset = 0,
87 .size = (5 * 1024 * 1024),
88 .mask_flags = MTD_WRITEABLE, /* force read-only */
89 }, {
90 .name = "free-area",
91 .offset = MTDPART_OFS_APPEND,
92 .size = MTDPART_SIZ_FULL,
96 static struct physmap_flash_data nor_flash_data = {
97 .width = 2,
98 .parts = nor_flash_partitions,
99 .nr_parts = ARRAY_SIZE(nor_flash_partitions),
102 static struct resource nor_flash_resources[] = {
103 [0] = {
104 .name = "NOR Flash",
105 .start = 0x00000000,
106 .end = 0x03ffffff,
107 .flags = IORESOURCE_MEM,
111 static struct platform_device nor_flash_device = {
112 .name = "physmap-flash",
113 .resource = nor_flash_resources,
114 .num_resources = ARRAY_SIZE(nor_flash_resources),
115 .dev = {
116 .platform_data = &nor_flash_data,
120 /* SH Eth */
121 #define SH_ETH_ADDR (0xA4600000)
122 #define SH_ETH_MAHR (SH_ETH_ADDR + 0x1C0)
123 #define SH_ETH_MALR (SH_ETH_ADDR + 0x1C8)
124 static struct resource sh_eth_resources[] = {
125 [0] = {
126 .start = SH_ETH_ADDR,
127 .end = SH_ETH_ADDR + 0x1FC,
128 .flags = IORESOURCE_MEM,
130 [1] = {
131 .start = 91,
132 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
136 struct sh_eth_plat_data sh_eth_plat = {
137 .phy = 0x1f, /* SMSC LAN8700 */
138 .edmac_endian = EDMAC_LITTLE_ENDIAN,
139 .ether_link_active_low = 1
142 static struct platform_device sh_eth_device = {
143 .name = "sh-eth",
144 .id = 0,
145 .dev = {
146 .platform_data = &sh_eth_plat,
148 .num_resources = ARRAY_SIZE(sh_eth_resources),
149 .resource = sh_eth_resources,
152 /* USB0 host */
153 void usb0_port_power(int port, int power)
155 gpio_set_value(GPIO_PTB4, power);
158 static struct r8a66597_platdata usb0_host_data = {
159 .on_chip = 1,
160 .port_power = usb0_port_power,
163 static struct resource usb0_host_resources[] = {
164 [0] = {
165 .start = 0xa4d80000,
166 .end = 0xa4d80124 - 1,
167 .flags = IORESOURCE_MEM,
169 [1] = {
170 .start = 65,
171 .end = 65,
172 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
176 static struct platform_device usb0_host_device = {
177 .name = "r8a66597_hcd",
178 .id = 0,
179 .dev = {
180 .dma_mask = NULL, /* not use dma */
181 .coherent_dma_mask = 0xffffffff,
182 .platform_data = &usb0_host_data,
184 .num_resources = ARRAY_SIZE(usb0_host_resources),
185 .resource = usb0_host_resources,
189 * USB1
191 * CN5 can use both host/function,
192 * and we can determine it by checking PTB[3]
194 * This time only USB1 host is supported.
196 void usb1_port_power(int port, int power)
198 if (!gpio_get_value(GPIO_PTB3)) {
199 printk(KERN_ERR "USB1 function is not supported\n");
200 return;
203 gpio_set_value(GPIO_PTB5, power);
206 static struct r8a66597_platdata usb1_host_data = {
207 .on_chip = 1,
208 .port_power = usb1_port_power,
211 static struct resource usb1_host_resources[] = {
212 [0] = {
213 .start = 0xa4d90000,
214 .end = 0xa4d90124 - 1,
215 .flags = IORESOURCE_MEM,
217 [1] = {
218 .start = 66,
219 .end = 66,
220 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
224 static struct platform_device usb1_host_device = {
225 .name = "r8a66597_hcd",
226 .id = 1,
227 .dev = {
228 .dma_mask = NULL, /* not use dma */
229 .coherent_dma_mask = 0xffffffff,
230 .platform_data = &usb1_host_data,
232 .num_resources = ARRAY_SIZE(usb1_host_resources),
233 .resource = usb1_host_resources,
236 /* LCDC */
237 static struct sh_mobile_lcdc_info lcdc_info = {
238 .ch[0] = {
239 .interface_type = RGB18,
240 .chan = LCDC_CHAN_MAINLCD,
241 .bpp = 16,
242 .lcd_cfg = {
243 .sync = 0, /* hsync and vsync are active low */
245 .lcd_size_cfg = { /* 7.0 inch */
246 .width = 152,
247 .height = 91,
249 .board_cfg = {
254 static struct resource lcdc_resources[] = {
255 [0] = {
256 .name = "LCDC",
257 .start = 0xfe940000,
258 .end = 0xfe942fff,
259 .flags = IORESOURCE_MEM,
261 [1] = {
262 .start = 106,
263 .flags = IORESOURCE_IRQ,
267 static struct platform_device lcdc_device = {
268 .name = "sh_mobile_lcdc_fb",
269 .num_resources = ARRAY_SIZE(lcdc_resources),
270 .resource = lcdc_resources,
271 .dev = {
272 .platform_data = &lcdc_info,
274 .archdata = {
275 .hwblk_id = HWBLK_LCDC,
279 /* CEU0 */
280 static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
281 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
284 static struct resource ceu0_resources[] = {
285 [0] = {
286 .name = "CEU0",
287 .start = 0xfe910000,
288 .end = 0xfe91009f,
289 .flags = IORESOURCE_MEM,
291 [1] = {
292 .start = 52,
293 .flags = IORESOURCE_IRQ,
295 [2] = {
296 /* place holder for contiguous memory */
300 static struct platform_device ceu0_device = {
301 .name = "sh_mobile_ceu",
302 .id = 0, /* "ceu0" clock */
303 .num_resources = ARRAY_SIZE(ceu0_resources),
304 .resource = ceu0_resources,
305 .dev = {
306 .platform_data = &sh_mobile_ceu0_info,
308 .archdata = {
309 .hwblk_id = HWBLK_CEU0,
313 /* CEU1 */
314 static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
315 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
318 static struct resource ceu1_resources[] = {
319 [0] = {
320 .name = "CEU1",
321 .start = 0xfe914000,
322 .end = 0xfe91409f,
323 .flags = IORESOURCE_MEM,
325 [1] = {
326 .start = 63,
327 .flags = IORESOURCE_IRQ,
329 [2] = {
330 /* place holder for contiguous memory */
334 static struct platform_device ceu1_device = {
335 .name = "sh_mobile_ceu",
336 .id = 1, /* "ceu1" clock */
337 .num_resources = ARRAY_SIZE(ceu1_resources),
338 .resource = ceu1_resources,
339 .dev = {
340 .platform_data = &sh_mobile_ceu1_info,
342 .archdata = {
343 .hwblk_id = HWBLK_CEU1,
347 /* I2C device */
348 static struct i2c_board_info i2c1_devices[] = {
350 I2C_BOARD_INFO("r2025sd", 0x32),
354 /* KEYSC */
355 static struct sh_keysc_info keysc_info = {
356 .mode = SH_KEYSC_MODE_1,
357 .scan_timing = 3,
358 .delay = 50,
359 .kycr2_delay = 100,
360 .keycodes = { KEY_1, 0, 0, 0, 0,
361 KEY_2, 0, 0, 0, 0,
362 KEY_3, 0, 0, 0, 0,
363 KEY_4, 0, 0, 0, 0,
364 KEY_5, 0, 0, 0, 0,
365 KEY_6, 0, 0, 0, 0, },
368 static struct resource keysc_resources[] = {
369 [0] = {
370 .name = "KEYSC",
371 .start = 0x044b0000,
372 .end = 0x044b000f,
373 .flags = IORESOURCE_MEM,
375 [1] = {
376 .start = 79,
377 .flags = IORESOURCE_IRQ,
381 static struct platform_device keysc_device = {
382 .name = "sh_keysc",
383 .id = 0, /* keysc0 clock */
384 .num_resources = ARRAY_SIZE(keysc_resources),
385 .resource = keysc_resources,
386 .dev = {
387 .platform_data = &keysc_info,
389 .archdata = {
390 .hwblk_id = HWBLK_KEYSC,
394 /* TouchScreen */
395 #define IRQ0 32
396 static int ts_get_pendown_state(void)
398 int val = 0;
399 gpio_free(GPIO_FN_INTC_IRQ0);
400 gpio_request(GPIO_PTZ0, NULL);
401 gpio_direction_input(GPIO_PTZ0);
403 val = gpio_get_value(GPIO_PTZ0);
405 gpio_free(GPIO_PTZ0);
406 gpio_request(GPIO_FN_INTC_IRQ0, NULL);
408 return val ? 0 : 1;
411 static int ts_init(void)
413 gpio_request(GPIO_FN_INTC_IRQ0, NULL);
414 return 0;
417 struct tsc2007_platform_data tsc2007_info = {
418 .model = 2007,
419 .x_plate_ohms = 180,
420 .get_pendown_state = ts_get_pendown_state,
421 .init_platform_hw = ts_init,
424 static struct i2c_board_info ts_i2c_clients = {
425 I2C_BOARD_INFO("tsc2007", 0x48),
426 .type = "tsc2007",
427 .platform_data = &tsc2007_info,
428 .irq = IRQ0,
431 static struct platform_device *ecovec_devices[] __initdata = {
432 &heartbeat_device,
433 &nor_flash_device,
434 &sh_eth_device,
435 &usb0_host_device,
436 &usb1_host_device, /* USB1 host support */
437 &lcdc_device,
438 &ceu0_device,
439 &ceu1_device,
440 &keysc_device,
443 #define EEPROM_ADDR 0x50
444 static u8 mac_read(struct i2c_adapter *a, u8 command)
446 struct i2c_msg msg[2];
447 u8 buf;
448 int ret;
450 msg[0].addr = EEPROM_ADDR;
451 msg[0].flags = 0;
452 msg[0].len = 1;
453 msg[0].buf = &command;
455 msg[1].addr = EEPROM_ADDR;
456 msg[1].flags = I2C_M_RD;
457 msg[1].len = 1;
458 msg[1].buf = &buf;
460 ret = i2c_transfer(a, msg, 2);
461 if (ret < 0) {
462 printk(KERN_ERR "error %d\n", ret);
463 buf = 0xff;
466 return buf;
469 #define MAC_LEN 6
470 static void __init sh_eth_init(void)
472 struct i2c_adapter *a = i2c_get_adapter(1);
473 struct clk *eth_clk;
474 u8 mac[MAC_LEN];
475 int i;
477 if (!a) {
478 pr_err("can not get I2C 1\n");
479 return;
482 eth_clk = clk_get(NULL, "eth0");
483 if (!eth_clk) {
484 pr_err("can not get eth0 clk\n");
485 return;
488 /* read MAC address frome EEPROM */
489 for (i = 0; i < MAC_LEN; i++) {
490 mac[i] = mac_read(a, 0x10 + i);
491 msleep(10);
494 /* clock enable */
495 clk_enable(eth_clk);
497 /* reset sh-eth */
498 ctrl_outl(0x1, SH_ETH_ADDR + 0x0);
500 /* set MAC addr */
501 ctrl_outl((mac[0] << 24) |
502 (mac[1] << 16) |
503 (mac[2] << 8) |
504 (mac[3] << 0), SH_ETH_MAHR);
505 ctrl_outl((mac[4] << 8) |
506 (mac[5] << 0), SH_ETH_MALR);
508 clk_put(eth_clk);
511 #define PORT_HIZA 0xA4050158
512 #define IODRIVEA 0xA405018A
513 static int __init arch_setup(void)
515 /* enable STATUS0, STATUS2 and PDSTATUS */
516 gpio_request(GPIO_FN_STATUS0, NULL);
517 gpio_request(GPIO_FN_STATUS2, NULL);
518 gpio_request(GPIO_FN_PDSTATUS, NULL);
520 /* enable SCIFA0 */
521 gpio_request(GPIO_FN_SCIF0_TXD, NULL);
522 gpio_request(GPIO_FN_SCIF0_RXD, NULL);
524 /* enable debug LED */
525 gpio_request(GPIO_PTG0, NULL);
526 gpio_request(GPIO_PTG1, NULL);
527 gpio_request(GPIO_PTG2, NULL);
528 gpio_request(GPIO_PTG3, NULL);
529 gpio_direction_output(GPIO_PTG0, 0);
530 gpio_direction_output(GPIO_PTG1, 0);
531 gpio_direction_output(GPIO_PTG2, 0);
532 gpio_direction_output(GPIO_PTG3, 0);
533 ctrl_outw((ctrl_inw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA);
535 /* enable SH-Eth */
536 gpio_request(GPIO_PTA1, NULL);
537 gpio_direction_output(GPIO_PTA1, 1);
538 mdelay(20);
540 gpio_request(GPIO_FN_RMII_RXD0, NULL);
541 gpio_request(GPIO_FN_RMII_RXD1, NULL);
542 gpio_request(GPIO_FN_RMII_TXD0, NULL);
543 gpio_request(GPIO_FN_RMII_TXD1, NULL);
544 gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
545 gpio_request(GPIO_FN_RMII_TX_EN, NULL);
546 gpio_request(GPIO_FN_RMII_RX_ER, NULL);
547 gpio_request(GPIO_FN_RMII_CRS_DV, NULL);
548 gpio_request(GPIO_FN_MDIO, NULL);
549 gpio_request(GPIO_FN_MDC, NULL);
550 gpio_request(GPIO_FN_LNKSTA, NULL);
552 /* enable USB */
553 ctrl_outw(0x0000, 0xA4D80000);
554 ctrl_outw(0x0000, 0xA4D90000);
555 gpio_request(GPIO_PTB3, NULL);
556 gpio_request(GPIO_PTB4, NULL);
557 gpio_request(GPIO_PTB5, NULL);
558 gpio_direction_input(GPIO_PTB3);
559 gpio_direction_output(GPIO_PTB4, 0);
560 gpio_direction_output(GPIO_PTB5, 0);
561 ctrl_outw(0x0600, 0xa40501d4);
562 ctrl_outw(0x0600, 0xa4050192);
564 /* enable LCDC */
565 gpio_request(GPIO_FN_LCDD23, NULL);
566 gpio_request(GPIO_FN_LCDD22, NULL);
567 gpio_request(GPIO_FN_LCDD21, NULL);
568 gpio_request(GPIO_FN_LCDD20, NULL);
569 gpio_request(GPIO_FN_LCDD19, NULL);
570 gpio_request(GPIO_FN_LCDD18, NULL);
571 gpio_request(GPIO_FN_LCDD17, NULL);
572 gpio_request(GPIO_FN_LCDD16, NULL);
573 gpio_request(GPIO_FN_LCDD15, NULL);
574 gpio_request(GPIO_FN_LCDD14, NULL);
575 gpio_request(GPIO_FN_LCDD13, NULL);
576 gpio_request(GPIO_FN_LCDD12, NULL);
577 gpio_request(GPIO_FN_LCDD11, NULL);
578 gpio_request(GPIO_FN_LCDD10, NULL);
579 gpio_request(GPIO_FN_LCDD9, NULL);
580 gpio_request(GPIO_FN_LCDD8, NULL);
581 gpio_request(GPIO_FN_LCDD7, NULL);
582 gpio_request(GPIO_FN_LCDD6, NULL);
583 gpio_request(GPIO_FN_LCDD5, NULL);
584 gpio_request(GPIO_FN_LCDD4, NULL);
585 gpio_request(GPIO_FN_LCDD3, NULL);
586 gpio_request(GPIO_FN_LCDD2, NULL);
587 gpio_request(GPIO_FN_LCDD1, NULL);
588 gpio_request(GPIO_FN_LCDD0, NULL);
589 gpio_request(GPIO_FN_LCDDISP, NULL);
590 gpio_request(GPIO_FN_LCDHSYN, NULL);
591 gpio_request(GPIO_FN_LCDDCK, NULL);
592 gpio_request(GPIO_FN_LCDVSYN, NULL);
593 gpio_request(GPIO_FN_LCDDON, NULL);
594 gpio_request(GPIO_FN_LCDLCLK, NULL);
595 ctrl_outw((ctrl_inw(PORT_HIZA) & ~0x0001), PORT_HIZA);
597 gpio_request(GPIO_PTE6, NULL);
598 gpio_request(GPIO_PTU1, NULL);
599 gpio_request(GPIO_PTR1, NULL);
600 gpio_request(GPIO_PTA2, NULL);
601 gpio_direction_input(GPIO_PTE6);
602 gpio_direction_output(GPIO_PTU1, 0);
603 gpio_direction_output(GPIO_PTR1, 0);
604 gpio_direction_output(GPIO_PTA2, 0);
606 /* I/O buffer drive ability is low */
607 ctrl_outw((ctrl_inw(IODRIVEA) & ~0x00c0) | 0x0040 , IODRIVEA);
609 if (gpio_get_value(GPIO_PTE6)) {
610 /* DVI */
611 lcdc_info.clock_source = LCDC_CLK_EXTERNAL;
612 lcdc_info.ch[0].clock_divider = 1,
613 lcdc_info.ch[0].lcd_cfg.name = "DVI";
614 lcdc_info.ch[0].lcd_cfg.xres = 1280;
615 lcdc_info.ch[0].lcd_cfg.yres = 720;
616 lcdc_info.ch[0].lcd_cfg.left_margin = 220;
617 lcdc_info.ch[0].lcd_cfg.right_margin = 110;
618 lcdc_info.ch[0].lcd_cfg.hsync_len = 40;
619 lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
620 lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
621 lcdc_info.ch[0].lcd_cfg.vsync_len = 5;
623 gpio_set_value(GPIO_PTA2, 1);
624 gpio_set_value(GPIO_PTU1, 1);
625 } else {
626 /* Panel */
628 lcdc_info.clock_source = LCDC_CLK_PERIPHERAL;
629 lcdc_info.ch[0].clock_divider = 2,
630 lcdc_info.ch[0].lcd_cfg.name = "Panel";
631 lcdc_info.ch[0].lcd_cfg.xres = 800;
632 lcdc_info.ch[0].lcd_cfg.yres = 480;
633 lcdc_info.ch[0].lcd_cfg.left_margin = 220;
634 lcdc_info.ch[0].lcd_cfg.right_margin = 110;
635 lcdc_info.ch[0].lcd_cfg.hsync_len = 70;
636 lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
637 lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
638 lcdc_info.ch[0].lcd_cfg.vsync_len = 5;
640 gpio_set_value(GPIO_PTR1, 1);
642 /* FIXME
644 * LCDDON control is needed for Panel,
645 * but current sh_mobile_lcdc driver doesn't control it.
646 * It is temporary correspondence
648 gpio_request(GPIO_PTF4, NULL);
649 gpio_direction_output(GPIO_PTF4, 1);
651 /* enable TouchScreen */
652 i2c_register_board_info(0, &ts_i2c_clients, 1);
653 set_irq_type(IRQ0, IRQ_TYPE_LEVEL_LOW);
656 /* enable CEU0 */
657 gpio_request(GPIO_FN_VIO0_D15, NULL);
658 gpio_request(GPIO_FN_VIO0_D14, NULL);
659 gpio_request(GPIO_FN_VIO0_D13, NULL);
660 gpio_request(GPIO_FN_VIO0_D12, NULL);
661 gpio_request(GPIO_FN_VIO0_D11, NULL);
662 gpio_request(GPIO_FN_VIO0_D10, NULL);
663 gpio_request(GPIO_FN_VIO0_D9, NULL);
664 gpio_request(GPIO_FN_VIO0_D8, NULL);
665 gpio_request(GPIO_FN_VIO0_D7, NULL);
666 gpio_request(GPIO_FN_VIO0_D6, NULL);
667 gpio_request(GPIO_FN_VIO0_D5, NULL);
668 gpio_request(GPIO_FN_VIO0_D4, NULL);
669 gpio_request(GPIO_FN_VIO0_D3, NULL);
670 gpio_request(GPIO_FN_VIO0_D2, NULL);
671 gpio_request(GPIO_FN_VIO0_D1, NULL);
672 gpio_request(GPIO_FN_VIO0_D0, NULL);
673 gpio_request(GPIO_FN_VIO0_VD, NULL);
674 gpio_request(GPIO_FN_VIO0_CLK, NULL);
675 gpio_request(GPIO_FN_VIO0_FLD, NULL);
676 gpio_request(GPIO_FN_VIO0_HD, NULL);
677 platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);
679 /* enable CEU1 */
680 gpio_request(GPIO_FN_VIO1_D7, NULL);
681 gpio_request(GPIO_FN_VIO1_D6, NULL);
682 gpio_request(GPIO_FN_VIO1_D5, NULL);
683 gpio_request(GPIO_FN_VIO1_D4, NULL);
684 gpio_request(GPIO_FN_VIO1_D3, NULL);
685 gpio_request(GPIO_FN_VIO1_D2, NULL);
686 gpio_request(GPIO_FN_VIO1_D1, NULL);
687 gpio_request(GPIO_FN_VIO1_D0, NULL);
688 gpio_request(GPIO_FN_VIO1_FLD, NULL);
689 gpio_request(GPIO_FN_VIO1_HD, NULL);
690 gpio_request(GPIO_FN_VIO1_VD, NULL);
691 gpio_request(GPIO_FN_VIO1_CLK, NULL);
692 platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);
694 /* enable KEYSC */
695 gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
696 gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
697 gpio_request(GPIO_FN_KEYOUT3, NULL);
698 gpio_request(GPIO_FN_KEYOUT2, NULL);
699 gpio_request(GPIO_FN_KEYOUT1, NULL);
700 gpio_request(GPIO_FN_KEYOUT0, NULL);
701 gpio_request(GPIO_FN_KEYIN0, NULL);
703 /* enable user debug switch */
704 gpio_request(GPIO_PTR0, NULL);
705 gpio_request(GPIO_PTR4, NULL);
706 gpio_request(GPIO_PTR5, NULL);
707 gpio_request(GPIO_PTR6, NULL);
708 gpio_direction_input(GPIO_PTR0);
709 gpio_direction_input(GPIO_PTR4);
710 gpio_direction_input(GPIO_PTR5);
711 gpio_direction_input(GPIO_PTR6);
713 /* enable I2C device */
714 i2c_register_board_info(1, i2c1_devices,
715 ARRAY_SIZE(i2c1_devices));
717 return platform_add_devices(ecovec_devices,
718 ARRAY_SIZE(ecovec_devices));
720 arch_initcall(arch_setup);
722 static int __init devices_setup(void)
724 sh_eth_init();
725 return 0;
727 device_initcall(devices_setup);
730 static struct sh_machine_vector mv_ecovec __initmv = {
731 .mv_name = "R0P7724 (EcoVec)",