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mm-only debug patch...
[mmotm.git] / arch / sh / boards / mach-se / 7724 / setup.c
blobe78c3be8ad2f9d4e1180622ab09a1a92ac3c1861
1 /*
2 * linux/arch/sh/boards/se/7724/setup.c
3 *
4 * Copyright (C) 2009 Renesas Solutions Corp.
5 *
6 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12
13 #include <linux/init.h>
14 #include <linux/device.h>
15 #include <linux/interrupt.h>
16 #include <linux/platform_device.h>
17 #include <linux/mtd/physmap.h>
18 #include <linux/delay.h>
19 #include <linux/smc91x.h>
20 #include <linux/gpio.h>
21 #include <linux/input.h>
22 #include <linux/usb/r8a66597.h>
23 #include <video/sh_mobile_lcdc.h>
24 #include <media/sh_mobile_ceu.h>
25 #include <sound/sh_fsi.h>
26 #include <asm/io.h>
27 #include <asm/heartbeat.h>
28 #include <asm/sh_eth.h>
29 #include <asm/clock.h>
30 #include <asm/sh_keysc.h>
31 #include <cpu/sh7724.h>
32 #include <mach-se/mach/se7724.h>
33
34 /*
35 * SWx 1234 5678
36 * ------------------------------------
37 * SW31 : 1001 1100 : default
38 * SW32 : 0111 1111 : use on board flash
39 *
40 * SW41 : abxx xxxx -> a = 0 : Analog monitor
41 * 1 : Digital monitor
42 * b = 0 : VGA
43 * 1 : 720p
44 */
45
46 /*
47 * about 720p
48 *
49 * When you use 1280 x 720 lcdc output,
50 * you should change OSC6 lcdc clock from 25.175MHz to 74.25MHz,
51 * and change SW41 to use 720p
52 */
53
54 /* Heartbeat */
55 static struct heartbeat_data heartbeat_data = {
56 .regsize = 16,
57 };
58
59 static struct resource heartbeat_resources[] = {
60 [0] = {
61 .start = PA_LED,
62 .end = PA_LED,
63 .flags = IORESOURCE_MEM,
64 },
65 };
66
67 static struct platform_device heartbeat_device = {
68 .name = "heartbeat",
69 .id = -1,
70 .dev = {
71 .platform_data = &heartbeat_data,
72 },
73 .num_resources = ARRAY_SIZE(heartbeat_resources),
74 .resource = heartbeat_resources,
75 };
76
77 /* LAN91C111 */
78 static struct smc91x_platdata smc91x_info = {
79 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
80 };
81
82 static struct resource smc91x_eth_resources[] = {
83 [0] = {
84 .name = "SMC91C111" ,
85 .start = 0x1a300300,
86 .end = 0x1a30030f,
87 .flags = IORESOURCE_MEM,
88 },
89 [1] = {
90 .start = IRQ0_SMC,
91 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
92 },
93 };
94
95 static struct platform_device smc91x_eth_device = {
96 .name = "smc91x",
97 .num_resources = ARRAY_SIZE(smc91x_eth_resources),
98 .resource = smc91x_eth_resources,
99 .dev = {
100 .platform_data = &smc91x_info,
101 },
102 };
103
104 /* MTD */
105 static struct mtd_partition nor_flash_partitions[] = {
106 {
107 .name = "uboot",
108 .offset = 0,
109 .size = (1 * 1024 * 1024),
110 .mask_flags = MTD_WRITEABLE, /* Read-only */
111 }, {
112 .name = "kernel",
113 .offset = MTDPART_OFS_APPEND,
114 .size = (2 * 1024 * 1024),
115 }, {
116 .name = "free-area",
117 .offset = MTDPART_OFS_APPEND,
118 .size = MTDPART_SIZ_FULL,
119 },
120 };
121
122 static struct physmap_flash_data nor_flash_data = {
123 .width = 2,
124 .parts = nor_flash_partitions,
125 .nr_parts = ARRAY_SIZE(nor_flash_partitions),
126 };
127
128 static struct resource nor_flash_resources[] = {
129 [0] = {
130 .name = "NOR Flash",
131 .start = 0x00000000,
132 .end = 0x01ffffff,
133 .flags = IORESOURCE_MEM,
134 }
135 };
136
137 static struct platform_device nor_flash_device = {
138 .name = "physmap-flash",
139 .resource = nor_flash_resources,
140 .num_resources = ARRAY_SIZE(nor_flash_resources),
141 .dev = {
142 .platform_data = &nor_flash_data,
143 },
144 };
145
146 /* LCDC */
147 static struct sh_mobile_lcdc_info lcdc_info = {
148 .clock_source = LCDC_CLK_EXTERNAL,
149 .ch[0] = {
150 .chan = LCDC_CHAN_MAINLCD,
151 .bpp = 16,
152 .clock_divider = 1,
153 .lcd_cfg = {
154 .name = "LB070WV1",
155 .sync = 0, /* hsync and vsync are active low */
156 },
157 .lcd_size_cfg = { /* 7.0 inch */
158 .width = 152,
159 .height = 91,
160 },
161 .board_cfg = {
162 },
163 }
164 };
165
166 static struct resource lcdc_resources[] = {
167 [0] = {
168 .name = "LCDC",
169 .start = 0xfe940000,
170 .end = 0xfe942fff,
171 .flags = IORESOURCE_MEM,
172 },
173 [1] = {
174 .start = 106,
175 .flags = IORESOURCE_IRQ,
176 },
177 };
178
179 static struct platform_device lcdc_device = {
180 .name = "sh_mobile_lcdc_fb",
181 .num_resources = ARRAY_SIZE(lcdc_resources),
182 .resource = lcdc_resources,
183 .dev = {
184 .platform_data = &lcdc_info,
185 },
186 .archdata = {
187 .hwblk_id = HWBLK_LCDC,
188 },
189 };
190
191 /* CEU0 */
192 static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
193 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
194 };
195
196 static struct resource ceu0_resources[] = {
197 [0] = {
198 .name = "CEU0",
199 .start = 0xfe910000,
200 .end = 0xfe91009f,
201 .flags = IORESOURCE_MEM,
202 },
203 [1] = {
204 .start = 52,
205 .flags = IORESOURCE_IRQ,
206 },
207 [2] = {
208 /* place holder for contiguous memory */
209 },
210 };
211
212 static struct platform_device ceu0_device = {
213 .name = "sh_mobile_ceu",
214 .id = 0, /* "ceu0" clock */
215 .num_resources = ARRAY_SIZE(ceu0_resources),
216 .resource = ceu0_resources,
217 .dev = {
218 .platform_data = &sh_mobile_ceu0_info,
219 },
220 .archdata = {
221 .hwblk_id = HWBLK_CEU0,
222 },
223 };
224
225 /* CEU1 */
226 static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
227 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
228 };
229
230 static struct resource ceu1_resources[] = {
231 [0] = {
232 .name = "CEU1",
233 .start = 0xfe914000,
234 .end = 0xfe91409f,
235 .flags = IORESOURCE_MEM,
236 },
237 [1] = {
238 .start = 63,
239 .flags = IORESOURCE_IRQ,
240 },
241 [2] = {
242 /* place holder for contiguous memory */
243 },
244 };
245
246 static struct platform_device ceu1_device = {
247 .name = "sh_mobile_ceu",
248 .id = 1, /* "ceu1" clock */
249 .num_resources = ARRAY_SIZE(ceu1_resources),
250 .resource = ceu1_resources,
251 .dev = {
252 .platform_data = &sh_mobile_ceu1_info,
253 },
254 .archdata = {
255 .hwblk_id = HWBLK_CEU1,
256 },
257 };
258
259 /* FSI */
260 /*
261 * FSI-A use external clock which came from ak464x.
262 * So, we should change parent of fsi
263 */
264 #define FCLKACR 0xa4150008
265 static void fsimck_init(struct clk *clk)
266 {
267 u32 status = ctrl_inl(clk->enable_reg);
268
269 /* use external clock */
270 status &= ~0x000000ff;
271 status |= 0x00000080;
272 ctrl_outl(status, clk->enable_reg);
273 }
274
275 static struct clk_ops fsimck_clk_ops = {
276 .init = fsimck_init,
277 };
278
279 static struct clk fsimcka_clk = {
280 .name = "fsimcka_clk",
281 .id = -1,
282 .ops = &fsimck_clk_ops,
283 .enable_reg = (void __iomem *)FCLKACR,
284 .rate = 0, /* unknown */
285 };
286
287 struct sh_fsi_platform_info fsi_info = {
288 .porta_flags = SH_FSI_BRS_INV |
289 SH_FSI_OUT_SLAVE_MODE |
290 SH_FSI_IN_SLAVE_MODE |
291 SH_FSI_OFMT(PCM) |
292 SH_FSI_IFMT(PCM),
293 };
294
295 static struct resource fsi_resources[] = {
296 [0] = {
297 .name = "FSI",
298 .start = 0xFE3C0000,
299 .end = 0xFE3C021d,
300 .flags = IORESOURCE_MEM,
301 },
302 [1] = {
303 .start = 108,
304 .flags = IORESOURCE_IRQ,
305 },
306 };
307
308 static struct platform_device fsi_device = {
309 .name = "sh_fsi",
310 .id = 0,
311 .num_resources = ARRAY_SIZE(fsi_resources),
312 .resource = fsi_resources,
313 .dev = {
314 .platform_data = &fsi_info,
315 },
316 };
317
318 /* KEYSC in SoC (Needs SW33-2 set to ON) */
319 static struct sh_keysc_info keysc_info = {
320 .mode = SH_KEYSC_MODE_1,
321 .scan_timing = 10,
322 .delay = 50,
323 .keycodes = {
324 KEY_1, KEY_2, KEY_3, KEY_4, KEY_5,
325 KEY_6, KEY_7, KEY_8, KEY_9, KEY_A,
326 KEY_B, KEY_C, KEY_D, KEY_E, KEY_F,
327 KEY_G, KEY_H, KEY_I, KEY_K, KEY_L,
328 KEY_M, KEY_N, KEY_O, KEY_P, KEY_Q,
329 KEY_R, KEY_S, KEY_T, KEY_U, KEY_V,
330 },
331 };
332
333 static struct resource keysc_resources[] = {
334 [0] = {
335 .name = "KEYSC",
336 .start = 0x044b0000,
337 .end = 0x044b000f,
338 .flags = IORESOURCE_MEM,
339 },
340 [1] = {
341 .start = 79,
342 .flags = IORESOURCE_IRQ,
343 },
344 };
345
346 static struct platform_device keysc_device = {
347 .name = "sh_keysc",
348 .id = 0, /* "keysc0" clock */
349 .num_resources = ARRAY_SIZE(keysc_resources),
350 .resource = keysc_resources,
351 .dev = {
352 .platform_data = &keysc_info,
353 },
354 .archdata = {
355 .hwblk_id = HWBLK_KEYSC,
356 },
357 };
358
359 /* SH Eth */
360 static struct resource sh_eth_resources[] = {
361 [0] = {
362 .start = SH_ETH_ADDR,
363 .end = SH_ETH_ADDR + 0x1FC,
364 .flags = IORESOURCE_MEM,
365 },
366 [1] = {
367 .start = 91,
368 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
369 },
370 };
371
372 struct sh_eth_plat_data sh_eth_plat = {
373 .phy = 0x1f, /* SMSC LAN8187 */
374 .edmac_endian = EDMAC_LITTLE_ENDIAN,
375 };
376
377 static struct platform_device sh_eth_device = {
378 .name = "sh-eth",
379 .id = 0,
380 .dev = {
381 .platform_data = &sh_eth_plat,
382 },
383 .num_resources = ARRAY_SIZE(sh_eth_resources),
384 .resource = sh_eth_resources,
385 .archdata = {
386 .hwblk_id = HWBLK_ETHER,
387 },
388 };
389
390 static struct r8a66597_platdata sh7724_usb0_host_data = {
391 .on_chip = 1,
392 };
393
394 static struct resource sh7724_usb0_host_resources[] = {
395 [0] = {
396 .start = 0xa4d80000,
397 .end = 0xa4d80124 - 1,
398 .flags = IORESOURCE_MEM,
399 },
400 [1] = {
401 .start = 65,
402 .end = 65,
403 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
404 },
405 };
406
407 static struct platform_device sh7724_usb0_host_device = {
408 .name = "r8a66597_hcd",
409 .id = 0,
410 .dev = {
411 .dma_mask = NULL, /* not use dma */
412 .coherent_dma_mask = 0xffffffff,
413 .platform_data = &sh7724_usb0_host_data,
414 },
415 .num_resources = ARRAY_SIZE(sh7724_usb0_host_resources),
416 .resource = sh7724_usb0_host_resources,
417 .archdata = {
418 .hwblk_id = HWBLK_USB0,
419 },
420 };
421
422 static struct r8a66597_platdata sh7724_usb1_gadget_data = {
423 .on_chip = 1,
424 };
425
426 static struct resource sh7724_usb1_gadget_resources[] = {
427 [0] = {
428 .start = 0xa4d90000,
429 .end = 0xa4d90123,
430 .flags = IORESOURCE_MEM,
431 },
432 [1] = {
433 .start = 66,
434 .end = 66,
435 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
436 },
437 };
438
439 static struct platform_device sh7724_usb1_gadget_device = {
440 .name = "r8a66597_udc",
441 .id = 1, /* USB1 */
442 .dev = {
443 .dma_mask = NULL, /* not use dma */
444 .coherent_dma_mask = 0xffffffff,
445 .platform_data = &sh7724_usb1_gadget_data,
446 },
447 .num_resources = ARRAY_SIZE(sh7724_usb1_gadget_resources),
448 .resource = sh7724_usb1_gadget_resources,
449 };
450
451 static struct platform_device *ms7724se_devices[] __initdata = {
452 &heartbeat_device,
453 &smc91x_eth_device,
454 &lcdc_device,
455 &nor_flash_device,
456 &ceu0_device,
457 &ceu1_device,
458 &keysc_device,
459 &sh_eth_device,
460 &sh7724_usb0_host_device,
461 &sh7724_usb1_gadget_device,
462 &fsi_device,
463 };
464
465 #define EEPROM_OP 0xBA206000
466 #define EEPROM_ADR 0xBA206004
467 #define EEPROM_DATA 0xBA20600C
468 #define EEPROM_STAT 0xBA206010
469 #define EEPROM_STRT 0xBA206014
470 static int __init sh_eth_is_eeprom_ready(void)
471 {
472 int t = 10000;
473
474 while (t--) {
475 if (!ctrl_inw(EEPROM_STAT))
476 return 1;
477 cpu_relax();
478 }
479
480 printk(KERN_ERR "ms7724se can not access to eeprom\n");
481 return 0;
482 }
483
484 static void __init sh_eth_init(void)
485 {
486 int i;
487 u16 mac[3];
488
489 /* check EEPROM status */
490 if (!sh_eth_is_eeprom_ready())
491 return;
492
493 /* read MAC addr from EEPROM */
494 for (i = 0 ; i < 3 ; i++) {
495 ctrl_outw(0x0, EEPROM_OP); /* read */
496 ctrl_outw(i*2, EEPROM_ADR);
497 ctrl_outw(0x1, EEPROM_STRT);
498 if (!sh_eth_is_eeprom_ready())
499 return;
500
501 mac[i] = ctrl_inw(EEPROM_DATA);
502 mac[i] = ((mac[i] & 0xFF) << 8) | (mac[i] >> 8); /* swap */
503 }
504
505 /* reset sh-eth */
506 ctrl_outl(0x1, SH_ETH_ADDR + 0x0);
507
508 /* set MAC addr */
509 ctrl_outl(((mac[0] << 16) | (mac[1])), SH_ETH_MAHR);
510 ctrl_outl((mac[2]), SH_ETH_MALR);
511 }
512
513 #define SW4140 0xBA201000
514 #define FPGA_OUT 0xBA200400
515 #define PORT_HIZA 0xA4050158
516 #define PORT_MSELCRB 0xA4050182
517
518 #define SW41_A 0x0100
519 #define SW41_B 0x0200
520 #define SW41_C 0x0400
521 #define SW41_D 0x0800
522 #define SW41_E 0x1000
523 #define SW41_F 0x2000
524 #define SW41_G 0x4000
525 #define SW41_H 0x8000
526
527 static int __init devices_setup(void)
528 {
529 u16 sw = ctrl_inw(SW4140); /* select camera, monitor */
530 struct clk *fsia_clk;
531
532 /* Reset Release */
533 ctrl_outw(ctrl_inw(FPGA_OUT) &
534 ~((1 << 1) | /* LAN */
535 (1 << 6) | /* VIDEO DAC */
536 (1 << 7) | /* AK4643 */
537 (1 << 12) | /* USB0 */
538 (1 << 14)), /* RMII */
539 FPGA_OUT);
540
541 /* turn on USB clocks, use external clock */
542 ctrl_outw((ctrl_inw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB);
543
544 #ifdef CONFIG_PM
545 /* Let LED9 show STATUS2 */
546 gpio_request(GPIO_FN_STATUS2, NULL);
547
548 /* Lit LED10 show STATUS0 */
549 gpio_request(GPIO_FN_STATUS0, NULL);
550
551 /* Lit LED11 show PDSTATUS */
552 gpio_request(GPIO_FN_PDSTATUS, NULL);
553 #else
554 /* Lit LED9 */
555 gpio_request(GPIO_PTJ6, NULL);
556 gpio_direction_output(GPIO_PTJ6, 1);
557 gpio_export(GPIO_PTJ6, 0);
558
559 /* Lit LED10 */
560 gpio_request(GPIO_PTJ5, NULL);
561 gpio_direction_output(GPIO_PTJ5, 1);
562 gpio_export(GPIO_PTJ5, 0);
563
564 /* Lit LED11 */
565 gpio_request(GPIO_PTJ7, NULL);
566 gpio_direction_output(GPIO_PTJ7, 1);
567 gpio_export(GPIO_PTJ7, 0);
568 #endif
569
570 /* enable USB0 port */
571 ctrl_outw(0x0600, 0xa40501d4);
572
573 /* enable USB1 port */
574 ctrl_outw(0x0600, 0xa4050192);
575
576 /* enable IRQ 0,1,2 */
577 gpio_request(GPIO_FN_INTC_IRQ0, NULL);
578 gpio_request(GPIO_FN_INTC_IRQ1, NULL);
579 gpio_request(GPIO_FN_INTC_IRQ2, NULL);
580
581 /* enable SCIFA3 */
582 gpio_request(GPIO_FN_SCIF3_I_SCK, NULL);
583 gpio_request(GPIO_FN_SCIF3_I_RXD, NULL);
584 gpio_request(GPIO_FN_SCIF3_I_TXD, NULL);
585 gpio_request(GPIO_FN_SCIF3_I_CTS, NULL);
586 gpio_request(GPIO_FN_SCIF3_I_RTS, NULL);
587
588 /* enable LCDC */
589 gpio_request(GPIO_FN_LCDD23, NULL);
590 gpio_request(GPIO_FN_LCDD22, NULL);
591 gpio_request(GPIO_FN_LCDD21, NULL);
592 gpio_request(GPIO_FN_LCDD20, NULL);
593 gpio_request(GPIO_FN_LCDD19, NULL);
594 gpio_request(GPIO_FN_LCDD18, NULL);
595 gpio_request(GPIO_FN_LCDD17, NULL);
596 gpio_request(GPIO_FN_LCDD16, NULL);
597 gpio_request(GPIO_FN_LCDD15, NULL);
598 gpio_request(GPIO_FN_LCDD14, NULL);
599 gpio_request(GPIO_FN_LCDD13, NULL);
600 gpio_request(GPIO_FN_LCDD12, NULL);
601 gpio_request(GPIO_FN_LCDD11, NULL);
602 gpio_request(GPIO_FN_LCDD10, NULL);
603 gpio_request(GPIO_FN_LCDD9, NULL);
604 gpio_request(GPIO_FN_LCDD8, NULL);
605 gpio_request(GPIO_FN_LCDD7, NULL);
606 gpio_request(GPIO_FN_LCDD6, NULL);
607 gpio_request(GPIO_FN_LCDD5, NULL);
608 gpio_request(GPIO_FN_LCDD4, NULL);
609 gpio_request(GPIO_FN_LCDD3, NULL);
610 gpio_request(GPIO_FN_LCDD2, NULL);
611 gpio_request(GPIO_FN_LCDD1, NULL);
612 gpio_request(GPIO_FN_LCDD0, NULL);
613 gpio_request(GPIO_FN_LCDDISP, NULL);
614 gpio_request(GPIO_FN_LCDHSYN, NULL);
615 gpio_request(GPIO_FN_LCDDCK, NULL);
616 gpio_request(GPIO_FN_LCDVSYN, NULL);
617 gpio_request(GPIO_FN_LCDDON, NULL);
618 gpio_request(GPIO_FN_LCDVEPWC, NULL);
619 gpio_request(GPIO_FN_LCDVCPWC, NULL);
620 gpio_request(GPIO_FN_LCDRD, NULL);
621 gpio_request(GPIO_FN_LCDLCLK, NULL);
622 ctrl_outw((ctrl_inw(PORT_HIZA) & ~0x0001), PORT_HIZA);
623
624 /* enable CEU0 */
625 gpio_request(GPIO_FN_VIO0_D15, NULL);
626 gpio_request(GPIO_FN_VIO0_D14, NULL);
627 gpio_request(GPIO_FN_VIO0_D13, NULL);
628 gpio_request(GPIO_FN_VIO0_D12, NULL);
629 gpio_request(GPIO_FN_VIO0_D11, NULL);
630 gpio_request(GPIO_FN_VIO0_D10, NULL);
631 gpio_request(GPIO_FN_VIO0_D9, NULL);
632 gpio_request(GPIO_FN_VIO0_D8, NULL);
633 gpio_request(GPIO_FN_VIO0_D7, NULL);
634 gpio_request(GPIO_FN_VIO0_D6, NULL);
635 gpio_request(GPIO_FN_VIO0_D5, NULL);
636 gpio_request(GPIO_FN_VIO0_D4, NULL);
637 gpio_request(GPIO_FN_VIO0_D3, NULL);
638 gpio_request(GPIO_FN_VIO0_D2, NULL);
639 gpio_request(GPIO_FN_VIO0_D1, NULL);
640 gpio_request(GPIO_FN_VIO0_D0, NULL);
641 gpio_request(GPIO_FN_VIO0_VD, NULL);
642 gpio_request(GPIO_FN_VIO0_CLK, NULL);
643 gpio_request(GPIO_FN_VIO0_FLD, NULL);
644 gpio_request(GPIO_FN_VIO0_HD, NULL);
645 platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);
646
647 /* enable CEU1 */
648 gpio_request(GPIO_FN_VIO1_D7, NULL);
649 gpio_request(GPIO_FN_VIO1_D6, NULL);
650 gpio_request(GPIO_FN_VIO1_D5, NULL);
651 gpio_request(GPIO_FN_VIO1_D4, NULL);
652 gpio_request(GPIO_FN_VIO1_D3, NULL);
653 gpio_request(GPIO_FN_VIO1_D2, NULL);
654 gpio_request(GPIO_FN_VIO1_D1, NULL);
655 gpio_request(GPIO_FN_VIO1_D0, NULL);
656 gpio_request(GPIO_FN_VIO1_FLD, NULL);
657 gpio_request(GPIO_FN_VIO1_HD, NULL);
658 gpio_request(GPIO_FN_VIO1_VD, NULL);
659 gpio_request(GPIO_FN_VIO1_CLK, NULL);
660 platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);
661
662 /* KEYSC */
663 gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
664 gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
665 gpio_request(GPIO_FN_KEYIN4, NULL);
666 gpio_request(GPIO_FN_KEYIN3, NULL);
667 gpio_request(GPIO_FN_KEYIN2, NULL);
668 gpio_request(GPIO_FN_KEYIN1, NULL);
669 gpio_request(GPIO_FN_KEYIN0, NULL);
670 gpio_request(GPIO_FN_KEYOUT3, NULL);
671 gpio_request(GPIO_FN_KEYOUT2, NULL);
672 gpio_request(GPIO_FN_KEYOUT1, NULL);
673 gpio_request(GPIO_FN_KEYOUT0, NULL);
674
675 /* enable FSI */
676 gpio_request(GPIO_FN_FSIMCKB, NULL);
677 gpio_request(GPIO_FN_FSIMCKA, NULL);
678 gpio_request(GPIO_FN_FSIOASD, NULL);
679 gpio_request(GPIO_FN_FSIIABCK, NULL);
680 gpio_request(GPIO_FN_FSIIALRCK, NULL);
681 gpio_request(GPIO_FN_FSIOABCK, NULL);
682 gpio_request(GPIO_FN_FSIOALRCK, NULL);
683 gpio_request(GPIO_FN_CLKAUDIOAO, NULL);
684 gpio_request(GPIO_FN_FSIIBSD, NULL);
685 gpio_request(GPIO_FN_FSIOBSD, NULL);
686 gpio_request(GPIO_FN_FSIIBBCK, NULL);
687 gpio_request(GPIO_FN_FSIIBLRCK, NULL);
688 gpio_request(GPIO_FN_FSIOBBCK, NULL);
689 gpio_request(GPIO_FN_FSIOBLRCK, NULL);
690 gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
691 gpio_request(GPIO_FN_FSIIASD, NULL);
692
693 /* change parent of FSI A */
694 fsia_clk = clk_get(NULL, "fsia_clk");
695 clk_register(&fsimcka_clk);
696 clk_set_parent(fsia_clk, &fsimcka_clk);
697 clk_set_rate(fsia_clk, 11000);
698 clk_set_rate(&fsimcka_clk, 11000);
699 clk_put(fsia_clk);
700
701 /*
702 * enable SH-Eth
703 *
704 * please remove J33 pin from your board !!
705 *
706 * ms7724 board should not use GPIO_FN_LNKSTA pin
707 * So, This time PTX5 is set to input pin
708 */
709 gpio_request(GPIO_FN_RMII_RXD0, NULL);
710 gpio_request(GPIO_FN_RMII_RXD1, NULL);
711 gpio_request(GPIO_FN_RMII_TXD0, NULL);
712 gpio_request(GPIO_FN_RMII_TXD1, NULL);
713 gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
714 gpio_request(GPIO_FN_RMII_TX_EN, NULL);
715 gpio_request(GPIO_FN_RMII_RX_ER, NULL);
716 gpio_request(GPIO_FN_RMII_CRS_DV, NULL);
717 gpio_request(GPIO_FN_MDIO, NULL);
718 gpio_request(GPIO_FN_MDC, NULL);
719 gpio_request(GPIO_PTX5, NULL);
720 gpio_direction_input(GPIO_PTX5);
721 sh_eth_init();
722
723 if (sw & SW41_B) {
724 /* 720p */
725 lcdc_info.ch[0].lcd_cfg.xres = 1280;
726 lcdc_info.ch[0].lcd_cfg.yres = 720;
727 lcdc_info.ch[0].lcd_cfg.left_margin = 220;
728 lcdc_info.ch[0].lcd_cfg.right_margin = 110;
729 lcdc_info.ch[0].lcd_cfg.hsync_len = 40;
730 lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
731 lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
732 lcdc_info.ch[0].lcd_cfg.vsync_len = 5;
733 } else {
734 /* VGA */
735 lcdc_info.ch[0].lcd_cfg.xres = 640;
736 lcdc_info.ch[0].lcd_cfg.yres = 480;
737 lcdc_info.ch[0].lcd_cfg.left_margin = 105;
738 lcdc_info.ch[0].lcd_cfg.right_margin = 50;
739 lcdc_info.ch[0].lcd_cfg.hsync_len = 96;
740 lcdc_info.ch[0].lcd_cfg.upper_margin = 33;
741 lcdc_info.ch[0].lcd_cfg.lower_margin = 10;
742 lcdc_info.ch[0].lcd_cfg.vsync_len = 2;
743 }
744
745 if (sw & SW41_A) {
746 /* Digital monitor */
747 lcdc_info.ch[0].interface_type = RGB18;
748 lcdc_info.ch[0].flags = 0;
749 } else {
750 /* Analog monitor */
751 lcdc_info.ch[0].interface_type = RGB24;
752 lcdc_info.ch[0].flags = LCDC_FLAGS_DWPOL;
753 }
754
755 return platform_add_devices(ms7724se_devices,
756 ARRAY_SIZE(ms7724se_devices));
757 }
758 device_initcall(devices_setup);
759
760 static struct sh_machine_vector mv_ms7724se __initmv = {
761 .mv_name = "ms7724se",
762 .mv_init_irq = init_se7724_IRQ,
763 .mv_nr_irqs = SE7724_FPGA_IRQ_BASE + SE7724_FPGA_IRQ_NR,
764 };
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