arch/sh/drivers/pci/fixups-sdk7780.c

   1 /*
   2  * arch/sh/drivers/pci/fixups-sdk7780.c
   3  *
   4  * PCI fixups for the SDK7780SE03
   5  *
   6  * Copyright (C) 2003  Lineo uSolutions, Inc.
   7  * Copyright (C) 2004 - 2006  Paul Mundt
   8  * Copyright (C) 2006  Nobuhiro Iwamatsu
   9  *
  10  * This file is subject to the terms and conditions of the GNU General Public
  11  * License.  See the file "COPYING" in the main directory of this archive
  12  * for more details.
  13  */
  14 #include <linux/pci.h>
  15 #include <linux/io.h>
  16 #include "pci-sh4.h"
  17
  18 /* IDSEL [16][17][18][19][20][21][22][23][24][25][26][27][28][29][30][31] */
  19 static char sdk7780_irq_tab[4][16] __initdata = {
  20         /* INTA */
  21         { 65, 68, 67, 68, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },
  22         /* INTB */
  23         { 66, 65, -1, 65, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },
  24         /* INTC */
  25         { 67, 66, -1, 66, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },
  26         /* INTD */
  27         { 68, 67, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },
  28 };
  29
  30 int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
  31 {
  32        return sdk7780_irq_tab[pin-1][slot];
  33 }
  34 int pci_fixup_pcic(struct pci_channel *chan)
  35 {
  36         /* Enable all interrupts, so we know what to fix */
  37         pci_write_reg(chan, 0x0000C3FF, SH7780_PCIIMR);
  38
  39         /* Set up standard PCI config registers */
  40         pci_write_reg(chan, 0x08000000, SH7780_PCIMBAR0);       /* PCI */
  41         pci_write_reg(chan, 0x08000000, SH4_PCILAR0);   /* SHwy */
  42         pci_write_reg(chan, 0x07F00001, SH4_PCILSR0);   /* size 128M w/ MBAR */
  43
  44         pci_write_reg(chan, 0x00000000, SH7780_PCIMBAR1);
  45         pci_write_reg(chan, 0x00000000, SH4_PCILAR1);
  46         pci_write_reg(chan, 0x00000000, SH4_PCILSR1);
  47
  48         pci_write_reg(chan, 0xAB000801, SH7780_PCIIBAR);
  49         pci_write_reg(chan, 0xA5000C01, SH4_PCICR);
  50
  51         return 0;
  52 }