1 #ifndef _ASM_SPARC64_TOPOLOGY_H
2 #define _ASM_SPARC64_TOPOLOGY_H
6 #include <asm/mmzone.h>
8 static inline int cpu_to_node(int cpu
)
10 return numa_cpu_lookup_table
[cpu
];
13 #define parent_node(node) (node)
15 #define cpumask_of_node(node) (&numa_cpumask_lookup_table[node])
19 extern int pcibus_to_node(struct pci_bus
*pbus
);
21 static inline int pcibus_to_node(struct pci_bus
*pbus
)
27 #define cpumask_of_pcibus(bus) \
28 (pcibus_to_node(bus) == -1 ? \
30 cpumask_of_node(pcibus_to_node(bus)))
32 #define SD_NODE_INIT (struct sched_domain) { \
36 .imbalance_pct = 125, \
37 .cache_nice_tries = 2, \
43 .flags = SD_LOAD_BALANCE \
47 .last_balance = jiffies, \
48 .balance_interval = 1, \
51 #else /* CONFIG_NUMA */
53 #include <asm-generic/topology.h>
55 #endif /* !(CONFIG_NUMA) */
58 #define topology_physical_package_id(cpu) (cpu_data(cpu).proc_id)
59 #define topology_core_id(cpu) (cpu_data(cpu).core_id)
60 #define topology_core_cpumask(cpu) (&cpu_core_map[cpu])
61 #define topology_thread_cpumask(cpu) (&per_cpu(cpu_sibling_map, cpu))
62 #define mc_capable() (sparc64_multi_core)
63 #define smt_capable() (sparc64_multi_core)
64 #endif /* CONFIG_SMP */
66 #define cpu_coregroup_mask(cpu) (&cpu_core_map[cpu])
68 #endif /* _ASM_SPARC64_TOPOLOGY_H */