mm-only debug patch...
[mmotm.git] / drivers / bluetooth / btmrvl_sdio.h
blob27329f107e5a26520aafd15d6f2fc7f5d2be3736
1 /**
2 * Marvell BT-over-SDIO driver: SDIO interface related definitions
4 * Copyright (C) 2009, Marvell International Ltd.
6 * This software file (the "File") is distributed by Marvell International
7 * Ltd. under the terms of the GNU General Public License Version 2, June 1991
8 * (the "License"). You may use, redistribute and/or modify this File in
9 * accordance with the terms and conditions of the License, a copy of which
10 * is available by writing to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
12 * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
15 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
17 * ARE EXPRESSLY DISCLAIMED. The License provides additional details about
18 * this warranty disclaimer.
20 **/
22 #define SDIO_HEADER_LEN 4
24 /* SD block size can not bigger than 64 due to buf size limit in firmware */
25 /* define SD block size for data Tx/Rx */
26 #define SDIO_BLOCK_SIZE 64
28 /* Number of blocks for firmware transfer */
29 #define FIRMWARE_TRANSFER_NBLOCK 2
31 /* This is for firmware specific length */
32 #define FW_EXTRA_LEN 36
34 #define MRVDRV_SIZE_OF_CMD_BUFFER (2 * 1024)
36 #define MRVDRV_BT_RX_PACKET_BUFFER_SIZE \
37 (HCI_MAX_FRAME_SIZE + FW_EXTRA_LEN)
39 #define ALLOC_BUF_SIZE (((max_t (int, MRVDRV_BT_RX_PACKET_BUFFER_SIZE, \
40 MRVDRV_SIZE_OF_CMD_BUFFER) + SDIO_HEADER_LEN \
41 + SDIO_BLOCK_SIZE - 1) / SDIO_BLOCK_SIZE) \
42 * SDIO_BLOCK_SIZE)
44 /* The number of times to try when polling for status */
45 #define MAX_POLL_TRIES 100
47 /* Max retry number of CMD53 write */
48 #define MAX_WRITE_IOMEM_RETRY 2
50 /* Host Control Registers */
51 #define IO_PORT_0_REG 0x00
52 #define IO_PORT_1_REG 0x01
53 #define IO_PORT_2_REG 0x02
55 #define CONFIG_REG 0x03
56 #define HOST_POWER_UP BIT(1)
57 #define HOST_CMD53_FIN BIT(2)
59 #define HOST_INT_MASK_REG 0x04
60 #define HIM_DISABLE 0xff
61 #define HIM_ENABLE (BIT(0) | BIT(1))
63 #define HOST_INTSTATUS_REG 0x05
64 #define UP_LD_HOST_INT_STATUS BIT(0)
65 #define DN_LD_HOST_INT_STATUS BIT(1)
67 /* Card Control Registers */
68 #define SQ_READ_BASE_ADDRESS_A0_REG 0x10
69 #define SQ_READ_BASE_ADDRESS_A1_REG 0x11
71 #define CARD_STATUS_REG 0x20
72 #define DN_LD_CARD_RDY BIT(0)
73 #define CARD_IO_READY BIT(3)
75 #define CARD_FW_STATUS0_REG 0x40
76 #define CARD_FW_STATUS1_REG 0x41
77 #define FIRMWARE_READY 0xfedc
79 #define CARD_RX_LEN_REG 0x42
80 #define CARD_RX_UNIT_REG 0x43
83 struct btmrvl_sdio_card {
84 struct sdio_func *func;
85 u32 ioport;
86 const char *helper;
87 const char *firmware;
88 u8 rx_unit;
89 struct btmrvl_private *priv;
92 struct btmrvl_sdio_device {
93 const char *helper;
94 const char *firmware;
98 /* Platform specific DMA alignment */
99 #define BTSDIO_DMA_ALIGN 8
101 /* Macros for Data Alignment : size */
102 #define ALIGN_SZ(p, a) \
103 (((p) + ((a) - 1)) & ~((a) - 1))
105 /* Macros for Data Alignment : address */
106 #define ALIGN_ADDR(p, a) \
107 ((((unsigned long)(p)) + (((unsigned long)(a)) - 1)) & \
108 ~(((unsigned long)(a)) - 1))