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mm-only debug patch...
[mmotm.git] / drivers / char / mxser.c
blob859ffb343cb9609e4238516a5875818e221336ca
1 /*
2 * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
3 *
4 * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com).
5 * Copyright (C) 2006-2008 Jiri Slaby <jirislaby@gmail.com>
6 *
7 * This code is loosely based on the 1.8 moxa driver which is based on
8 * Linux serial driver, written by Linus Torvalds, Theodore T'so and
9 * others.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
17 * <alan@lxorguk.ukuu.org.uk>. The original 1.8 code is available on
18 * www.moxa.com.
19 * - Fixed x86_64 cleanness
20 */
21
22 #include <linux/module.h>
23 #include <linux/errno.h>
24 #include <linux/signal.h>
25 #include <linux/sched.h>
26 #include <linux/smp_lock.h>
27 #include <linux/timer.h>
28 #include <linux/interrupt.h>
29 #include <linux/tty.h>
30 #include <linux/tty_flip.h>
31 #include <linux/serial.h>
32 #include <linux/serial_reg.h>
33 #include <linux/major.h>
34 #include <linux/string.h>
35 #include <linux/fcntl.h>
36 #include <linux/ptrace.h>
37 #include <linux/gfp.h>
38 #include <linux/ioport.h>
39 #include <linux/mm.h>
40 #include <linux/delay.h>
41 #include <linux/pci.h>
42 #include <linux/bitops.h>
43
44 #include <asm/system.h>
45 #include <asm/io.h>
46 #include <asm/irq.h>
47 #include <asm/uaccess.h>
48
49 #include "mxser.h"
50
51 #define MXSER_VERSION "2.0.5" /* 1.14 */
52 #define MXSERMAJOR 174
53
54 #define MXSER_BOARDS 4 /* Max. boards */
55 #define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
56 #define MXSER_PORTS (MXSER_BOARDS * MXSER_PORTS_PER_BOARD)
57 #define MXSER_ISR_PASS_LIMIT 100
58
59 /*CheckIsMoxaMust return value*/
60 #define MOXA_OTHER_UART 0x00
61 #define MOXA_MUST_MU150_HWID 0x01
62 #define MOXA_MUST_MU860_HWID 0x02
63
64 #define WAKEUP_CHARS 256
65
66 #define UART_MCR_AFE 0x20
67 #define UART_LSR_SPECIAL 0x1E
68
69 #define PCI_DEVICE_ID_POS104UL 0x1044
70 #define PCI_DEVICE_ID_CB108 0x1080
71 #define PCI_DEVICE_ID_CP102UF 0x1023
72 #define PCI_DEVICE_ID_CP112UL 0x1120
73 #define PCI_DEVICE_ID_CB114 0x1142
74 #define PCI_DEVICE_ID_CP114UL 0x1143
75 #define PCI_DEVICE_ID_CB134I 0x1341
76 #define PCI_DEVICE_ID_CP138U 0x1380
77
78
79 #define C168_ASIC_ID 1
80 #define C104_ASIC_ID 2
81 #define C102_ASIC_ID 0xB
82 #define CI132_ASIC_ID 4
83 #define CI134_ASIC_ID 3
84 #define CI104J_ASIC_ID 5
85
86 #define MXSER_HIGHBAUD 1
87 #define MXSER_HAS2 2
88
89 /* This is only for PCI */
90 static const struct {
91 int type;
92 int tx_fifo;
93 int rx_fifo;
94 int xmit_fifo_size;
95 int rx_high_water;
96 int rx_trigger;
97 int rx_low_water;
98 long max_baud;
99 } Gpci_uart_info[] = {
100 {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
101 {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
102 {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
103 };
104 #define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info)
105
106 struct mxser_cardinfo {
107 char *name;
108 unsigned int nports;
109 unsigned int flags;
110 };
111
112 static const struct mxser_cardinfo mxser_cards[] = {
113 /* 0*/ { "C168 series", 8, },
114 { "C104 series", 4, },
115 { "CI-104J series", 4, },
116 { "C168H/PCI series", 8, },
117 { "C104H/PCI series", 4, },
118 /* 5*/ { "C102 series", 4, MXSER_HAS2 }, /* C102-ISA */
119 { "CI-132 series", 4, MXSER_HAS2 },
120 { "CI-134 series", 4, },
121 { "CP-132 series", 2, },
122 { "CP-114 series", 4, },
123 /*10*/ { "CT-114 series", 4, },
124 { "CP-102 series", 2, MXSER_HIGHBAUD },
125 { "CP-104U series", 4, },
126 { "CP-168U series", 8, },
127 { "CP-132U series", 2, },
128 /*15*/ { "CP-134U series", 4, },
129 { "CP-104JU series", 4, },
130 { "Moxa UC7000 Serial", 8, }, /* RC7000 */
131 { "CP-118U series", 8, },
132 { "CP-102UL series", 2, },
133 /*20*/ { "CP-102U series", 2, },
134 { "CP-118EL series", 8, },
135 { "CP-168EL series", 8, },
136 { "CP-104EL series", 4, },
137 { "CB-108 series", 8, },
138 /*25*/ { "CB-114 series", 4, },
139 { "CB-134I series", 4, },
140 { "CP-138U series", 8, },
141 { "POS-104UL series", 4, },
142 { "CP-114UL series", 4, },
143 /*30*/ { "CP-102UF series", 2, },
144 { "CP-112UL series", 2, },
145 };
146
147 /* driver_data correspond to the lines in the structure above
148 see also ISA probe function before you change something */
149 static struct pci_device_id mxser_pcibrds[] = {
150 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C168), .driver_data = 3 },
151 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C104), .driver_data = 4 },
152 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132), .driver_data = 8 },
153 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114), .driver_data = 9 },
154 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CT114), .driver_data = 10 },
155 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102), .driver_data = 11 },
156 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104U), .driver_data = 12 },
157 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168U), .driver_data = 13 },
158 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132U), .driver_data = 14 },
159 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134U), .driver_data = 15 },
160 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104JU),.driver_data = 16 },
161 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_RC7000), .driver_data = 17 },
162 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118U), .driver_data = 18 },
163 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102UL),.driver_data = 19 },
164 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102U), .driver_data = 20 },
165 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL),.driver_data = 21 },
166 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL),.driver_data = 22 },
167 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL),.driver_data = 23 },
168 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB108), .driver_data = 24 },
169 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB114), .driver_data = 25 },
170 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB134I), .driver_data = 26 },
171 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP138U), .driver_data = 27 },
172 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 28 },
173 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP114UL), .driver_data = 29 },
174 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP102UF), .driver_data = 30 },
175 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP112UL), .driver_data = 31 },
176 { }
177 };
178 MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
179
180 static unsigned long ioaddr[MXSER_BOARDS];
181 static int ttymajor = MXSERMAJOR;
182
183 /* Variables for insmod */
184
185 MODULE_AUTHOR("Casper Yang");
186 MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
187 module_param_array(ioaddr, ulong, NULL, 0);
188 MODULE_PARM_DESC(ioaddr, "ISA io addresses to look for a moxa board");
189 module_param(ttymajor, int, 0);
190 MODULE_LICENSE("GPL");
191
192 struct mxser_log {
193 int tick;
194 unsigned long rxcnt[MXSER_PORTS];
195 unsigned long txcnt[MXSER_PORTS];
196 };
197
198 struct mxser_mon {
199 unsigned long rxcnt;
200 unsigned long txcnt;
201 unsigned long up_rxcnt;
202 unsigned long up_txcnt;
203 int modem_status;
204 unsigned char hold_reason;
205 };
206
207 struct mxser_mon_ext {
208 unsigned long rx_cnt[32];
209 unsigned long tx_cnt[32];
210 unsigned long up_rxcnt[32];
211 unsigned long up_txcnt[32];
212 int modem_status[32];
213
214 long baudrate[32];
215 int databits[32];
216 int stopbits[32];
217 int parity[32];
218 int flowctrl[32];
219 int fifo[32];
220 int iftype[32];
221 };
222
223 struct mxser_board;
224
225 struct mxser_port {
226 struct tty_port port;
227 struct mxser_board *board;
228
229 unsigned long ioaddr;
230 unsigned long opmode_ioaddr;
231 int max_baud;
232
233 int rx_high_water;
234 int rx_trigger; /* Rx fifo trigger level */
235 int rx_low_water;
236 int baud_base; /* max. speed */
237 int type; /* UART type */
238
239 int x_char; /* xon/xoff character */
240 int IER; /* Interrupt Enable Register */
241 int MCR; /* Modem control register */
242
243 unsigned char stop_rx;
244 unsigned char ldisc_stop_rx;
245
246 int custom_divisor;
247 unsigned char err_shadow;
248
249 struct async_icount icount; /* kernel counters for 4 input interrupts */
250 int timeout;
251
252 int read_status_mask;
253 int ignore_status_mask;
254 int xmit_fifo_size;
255 int xmit_head;
256 int xmit_tail;
257 int xmit_cnt;
258
259 struct ktermios normal_termios;
260
261 struct mxser_mon mon_data;
262
263 spinlock_t slock;
264 };
265
266 struct mxser_board {
267 unsigned int idx;
268 int irq;
269 const struct mxser_cardinfo *info;
270 unsigned long vector;
271 unsigned long vector_mask;
272
273 int chip_flag;
274 int uart_type;
275
276 struct mxser_port ports[MXSER_PORTS_PER_BOARD];
277 };
278
279 struct mxser_mstatus {
280 tcflag_t cflag;
281 int cts;
282 int dsr;
283 int ri;
284 int dcd;
285 };
286
287 static struct mxser_board mxser_boards[MXSER_BOARDS];
288 static struct tty_driver *mxvar_sdriver;
289 static struct mxser_log mxvar_log;
290 static int mxser_set_baud_method[MXSER_PORTS + 1];
291
292 static void mxser_enable_must_enchance_mode(unsigned long baseio)
293 {
294 u8 oldlcr;
295 u8 efr;
296
297 oldlcr = inb(baseio + UART_LCR);
298 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
299
300 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
301 efr |= MOXA_MUST_EFR_EFRB_ENABLE;
302
303 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
304 outb(oldlcr, baseio + UART_LCR);
305 }
306
307 static void mxser_disable_must_enchance_mode(unsigned long baseio)
308 {
309 u8 oldlcr;
310 u8 efr;
311
312 oldlcr = inb(baseio + UART_LCR);
313 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
314
315 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
316 efr &= ~MOXA_MUST_EFR_EFRB_ENABLE;
317
318 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
319 outb(oldlcr, baseio + UART_LCR);
320 }
321
322 static void mxser_set_must_xon1_value(unsigned long baseio, u8 value)
323 {
324 u8 oldlcr;
325 u8 efr;
326
327 oldlcr = inb(baseio + UART_LCR);
328 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
329
330 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
331 efr &= ~MOXA_MUST_EFR_BANK_MASK;
332 efr |= MOXA_MUST_EFR_BANK0;
333
334 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
335 outb(value, baseio + MOXA_MUST_XON1_REGISTER);
336 outb(oldlcr, baseio + UART_LCR);
337 }
338
339 static void mxser_set_must_xoff1_value(unsigned long baseio, u8 value)
340 {
341 u8 oldlcr;
342 u8 efr;
343
344 oldlcr = inb(baseio + UART_LCR);
345 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
346
347 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
348 efr &= ~MOXA_MUST_EFR_BANK_MASK;
349 efr |= MOXA_MUST_EFR_BANK0;
350
351 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
352 outb(value, baseio + MOXA_MUST_XOFF1_REGISTER);
353 outb(oldlcr, baseio + UART_LCR);
354 }
355
356 static void mxser_set_must_fifo_value(struct mxser_port *info)
357 {
358 u8 oldlcr;
359 u8 efr;
360
361 oldlcr = inb(info->ioaddr + UART_LCR);
362 outb(MOXA_MUST_ENTER_ENCHANCE, info->ioaddr + UART_LCR);
363
364 efr = inb(info->ioaddr + MOXA_MUST_EFR_REGISTER);
365 efr &= ~MOXA_MUST_EFR_BANK_MASK;
366 efr |= MOXA_MUST_EFR_BANK1;
367
368 outb(efr, info->ioaddr + MOXA_MUST_EFR_REGISTER);
369 outb((u8)info->rx_high_water, info->ioaddr + MOXA_MUST_RBRTH_REGISTER);
370 outb((u8)info->rx_trigger, info->ioaddr + MOXA_MUST_RBRTI_REGISTER);
371 outb((u8)info->rx_low_water, info->ioaddr + MOXA_MUST_RBRTL_REGISTER);
372 outb(oldlcr, info->ioaddr + UART_LCR);
373 }
374
375 static void mxser_set_must_enum_value(unsigned long baseio, u8 value)
376 {
377 u8 oldlcr;
378 u8 efr;
379
380 oldlcr = inb(baseio + UART_LCR);
381 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
382
383 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
384 efr &= ~MOXA_MUST_EFR_BANK_MASK;
385 efr |= MOXA_MUST_EFR_BANK2;
386
387 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
388 outb(value, baseio + MOXA_MUST_ENUM_REGISTER);
389 outb(oldlcr, baseio + UART_LCR);
390 }
391
392 static void mxser_get_must_hardware_id(unsigned long baseio, u8 *pId)
393 {
394 u8 oldlcr;
395 u8 efr;
396
397 oldlcr = inb(baseio + UART_LCR);
398 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
399
400 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
401 efr &= ~MOXA_MUST_EFR_BANK_MASK;
402 efr |= MOXA_MUST_EFR_BANK2;
403
404 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
405 *pId = inb(baseio + MOXA_MUST_HWID_REGISTER);
406 outb(oldlcr, baseio + UART_LCR);
407 }
408
409 static void SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(unsigned long baseio)
410 {
411 u8 oldlcr;
412 u8 efr;
413
414 oldlcr = inb(baseio + UART_LCR);
415 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
416
417 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
418 efr &= ~MOXA_MUST_EFR_SF_MASK;
419
420 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
421 outb(oldlcr, baseio + UART_LCR);
422 }
423
424 static void mxser_enable_must_tx_software_flow_control(unsigned long baseio)
425 {
426 u8 oldlcr;
427 u8 efr;
428
429 oldlcr = inb(baseio + UART_LCR);
430 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
431
432 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
433 efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
434 efr |= MOXA_MUST_EFR_SF_TX1;
435
436 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
437 outb(oldlcr, baseio + UART_LCR);
438 }
439
440 static void mxser_disable_must_tx_software_flow_control(unsigned long baseio)
441 {
442 u8 oldlcr;
443 u8 efr;
444
445 oldlcr = inb(baseio + UART_LCR);
446 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
447
448 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
449 efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
450
451 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
452 outb(oldlcr, baseio + UART_LCR);
453 }
454
455 static void mxser_enable_must_rx_software_flow_control(unsigned long baseio)
456 {
457 u8 oldlcr;
458 u8 efr;
459
460 oldlcr = inb(baseio + UART_LCR);
461 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
462
463 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
464 efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
465 efr |= MOXA_MUST_EFR_SF_RX1;
466
467 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
468 outb(oldlcr, baseio + UART_LCR);
469 }
470
471 static void mxser_disable_must_rx_software_flow_control(unsigned long baseio)
472 {
473 u8 oldlcr;
474 u8 efr;
475
476 oldlcr = inb(baseio + UART_LCR);
477 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
478
479 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
480 efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
481
482 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
483 outb(oldlcr, baseio + UART_LCR);
484 }
485
486 #ifdef CONFIG_PCI
487 static int __devinit CheckIsMoxaMust(unsigned long io)
488 {
489 u8 oldmcr, hwid;
490 int i;
491
492 outb(0, io + UART_LCR);
493 mxser_disable_must_enchance_mode(io);
494 oldmcr = inb(io + UART_MCR);
495 outb(0, io + UART_MCR);
496 mxser_set_must_xon1_value(io, 0x11);
497 if ((hwid = inb(io + UART_MCR)) != 0) {
498 outb(oldmcr, io + UART_MCR);
499 return MOXA_OTHER_UART;
500 }
501
502 mxser_get_must_hardware_id(io, &hwid);
503 for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */
504 if (hwid == Gpci_uart_info[i].type)
505 return (int)hwid;
506 }
507 return MOXA_OTHER_UART;
508 }
509 #endif
510
511 static void process_txrx_fifo(struct mxser_port *info)
512 {
513 int i;
514
515 if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
516 info->rx_trigger = 1;
517 info->rx_high_water = 1;
518 info->rx_low_water = 1;
519 info->xmit_fifo_size = 1;
520 } else
521 for (i = 0; i < UART_INFO_NUM; i++)
522 if (info->board->chip_flag == Gpci_uart_info[i].type) {
523 info->rx_trigger = Gpci_uart_info[i].rx_trigger;
524 info->rx_low_water = Gpci_uart_info[i].rx_low_water;
525 info->rx_high_water = Gpci_uart_info[i].rx_high_water;
526 info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
527 break;
528 }
529 }
530
531 static unsigned char mxser_get_msr(int baseaddr, int mode, int port)
532 {
533 static unsigned char mxser_msr[MXSER_PORTS + 1];
534 unsigned char status = 0;
535
536 status = inb(baseaddr + UART_MSR);
537
538 mxser_msr[port] &= 0x0F;
539 mxser_msr[port] |= status;
540 status = mxser_msr[port];
541 if (mode)
542 mxser_msr[port] = 0;
543
544 return status;
545 }
546
547 static int mxser_carrier_raised(struct tty_port *port)
548 {
549 struct mxser_port *mp = container_of(port, struct mxser_port, port);
550 return (inb(mp->ioaddr + UART_MSR) & UART_MSR_DCD)?1:0;
551 }
552
553 static void mxser_dtr_rts(struct tty_port *port, int on)
554 {
555 struct mxser_port *mp = container_of(port, struct mxser_port, port);
556 unsigned long flags;
557
558 spin_lock_irqsave(&mp->slock, flags);
559 if (on)
560 outb(inb(mp->ioaddr + UART_MCR) |
561 UART_MCR_DTR | UART_MCR_RTS, mp->ioaddr + UART_MCR);
562 else
563 outb(inb(mp->ioaddr + UART_MCR)&~(UART_MCR_DTR | UART_MCR_RTS),
564 mp->ioaddr + UART_MCR);
565 spin_unlock_irqrestore(&mp->slock, flags);
566 }
567
568 static int mxser_set_baud(struct tty_struct *tty, long newspd)
569 {
570 struct mxser_port *info = tty->driver_data;
571 int quot = 0, baud;
572 unsigned char cval;
573
574 if (!info->ioaddr)
575 return -1;
576
577 if (newspd > info->max_baud)
578 return -1;
579
580 if (newspd == 134) {
581 quot = 2 * info->baud_base / 269;
582 tty_encode_baud_rate(tty, 134, 134);
583 } else if (newspd) {
584 quot = info->baud_base / newspd;
585 if (quot == 0)
586 quot = 1;
587 baud = info->baud_base/quot;
588 tty_encode_baud_rate(tty, baud, baud);
589 } else {
590 quot = 0;
591 }
592
593 info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base);
594 info->timeout += HZ / 50; /* Add .02 seconds of slop */
595
596 if (quot) {
597 info->MCR |= UART_MCR_DTR;
598 outb(info->MCR, info->ioaddr + UART_MCR);
599 } else {
600 info->MCR &= ~UART_MCR_DTR;
601 outb(info->MCR, info->ioaddr + UART_MCR);
602 return 0;
603 }
604
605 cval = inb(info->ioaddr + UART_LCR);
606
607 outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */
608
609 outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */
610 outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */
611 outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */
612
613 #ifdef BOTHER
614 if (C_BAUD(tty) == BOTHER) {
615 quot = info->baud_base % newspd;
616 quot *= 8;
617 if (quot % newspd > newspd / 2) {
618 quot /= newspd;
619 quot++;
620 } else
621 quot /= newspd;
622
623 mxser_set_must_enum_value(info->ioaddr, quot);
624 } else
625 #endif
626 mxser_set_must_enum_value(info->ioaddr, 0);
627
628 return 0;
629 }
630
631 /*
632 * This routine is called to set the UART divisor registers to match
633 * the specified baud rate for a serial port.
634 */
635 static int mxser_change_speed(struct tty_struct *tty,
636 struct ktermios *old_termios)
637 {
638 struct mxser_port *info = tty->driver_data;
639 unsigned cflag, cval, fcr;
640 int ret = 0;
641 unsigned char status;
642
643 cflag = tty->termios->c_cflag;
644 if (!info->ioaddr)
645 return ret;
646
647 if (mxser_set_baud_method[tty->index] == 0)
648 mxser_set_baud(tty, tty_get_baud_rate(tty));
649
650 /* byte size and parity */
651 switch (cflag & CSIZE) {
652 case CS5:
653 cval = 0x00;
654 break;
655 case CS6:
656 cval = 0x01;
657 break;
658 case CS7:
659 cval = 0x02;
660 break;
661 case CS8:
662 cval = 0x03;
663 break;
664 default:
665 cval = 0x00;
666 break; /* too keep GCC shut... */
667 }
668 if (cflag & CSTOPB)
669 cval |= 0x04;
670 if (cflag & PARENB)
671 cval |= UART_LCR_PARITY;
672 if (!(cflag & PARODD))
673 cval |= UART_LCR_EPAR;
674 if (cflag & CMSPAR)
675 cval |= UART_LCR_SPAR;
676
677 if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
678 if (info->board->chip_flag) {
679 fcr = UART_FCR_ENABLE_FIFO;
680 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
681 mxser_set_must_fifo_value(info);
682 } else
683 fcr = 0;
684 } else {
685 fcr = UART_FCR_ENABLE_FIFO;
686 if (info->board->chip_flag) {
687 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
688 mxser_set_must_fifo_value(info);
689 } else {
690 switch (info->rx_trigger) {
691 case 1:
692 fcr |= UART_FCR_TRIGGER_1;
693 break;
694 case 4:
695 fcr |= UART_FCR_TRIGGER_4;
696 break;
697 case 8:
698 fcr |= UART_FCR_TRIGGER_8;
699 break;
700 default:
701 fcr |= UART_FCR_TRIGGER_14;
702 break;
703 }
704 }
705 }
706
707 /* CTS flow control flag and modem status interrupts */
708 info->IER &= ~UART_IER_MSI;
709 info->MCR &= ~UART_MCR_AFE;
710 if (cflag & CRTSCTS) {
711 info->port.flags |= ASYNC_CTS_FLOW;
712 info->IER |= UART_IER_MSI;
713 if ((info->type == PORT_16550A) || (info->board->chip_flag)) {
714 info->MCR |= UART_MCR_AFE;
715 } else {
716 status = inb(info->ioaddr + UART_MSR);
717 if (tty->hw_stopped) {
718 if (status & UART_MSR_CTS) {
719 tty->hw_stopped = 0;
720 if (info->type != PORT_16550A &&
721 !info->board->chip_flag) {
722 outb(info->IER & ~UART_IER_THRI,
723 info->ioaddr +
724 UART_IER);
725 info->IER |= UART_IER_THRI;
726 outb(info->IER, info->ioaddr +
727 UART_IER);
728 }
729 tty_wakeup(tty);
730 }
731 } else {
732 if (!(status & UART_MSR_CTS)) {
733 tty->hw_stopped = 1;
734 if ((info->type != PORT_16550A) &&
735 (!info->board->chip_flag)) {
736 info->IER &= ~UART_IER_THRI;
737 outb(info->IER, info->ioaddr +
738 UART_IER);
739 }
740 }
741 }
742 }
743 } else {
744 info->port.flags &= ~ASYNC_CTS_FLOW;
745 }
746 outb(info->MCR, info->ioaddr + UART_MCR);
747 if (cflag & CLOCAL) {
748 info->port.flags &= ~ASYNC_CHECK_CD;
749 } else {
750 info->port.flags |= ASYNC_CHECK_CD;
751 info->IER |= UART_IER_MSI;
752 }
753 outb(info->IER, info->ioaddr + UART_IER);
754
755 /*
756 * Set up parity check flag
757 */
758 info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
759 if (I_INPCK(tty))
760 info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
761 if (I_BRKINT(tty) || I_PARMRK(tty))
762 info->read_status_mask |= UART_LSR_BI;
763
764 info->ignore_status_mask = 0;
765
766 if (I_IGNBRK(tty)) {
767 info->ignore_status_mask |= UART_LSR_BI;
768 info->read_status_mask |= UART_LSR_BI;
769 /*
770 * If we're ignore parity and break indicators, ignore
771 * overruns too. (For real raw support).
772 */
773 if (I_IGNPAR(tty)) {
774 info->ignore_status_mask |=
775 UART_LSR_OE |
776 UART_LSR_PE |
777 UART_LSR_FE;
778 info->read_status_mask |=
779 UART_LSR_OE |
780 UART_LSR_PE |
781 UART_LSR_FE;
782 }
783 }
784 if (info->board->chip_flag) {
785 mxser_set_must_xon1_value(info->ioaddr, START_CHAR(tty));
786 mxser_set_must_xoff1_value(info->ioaddr, STOP_CHAR(tty));
787 if (I_IXON(tty)) {
788 mxser_enable_must_rx_software_flow_control(
789 info->ioaddr);
790 } else {
791 mxser_disable_must_rx_software_flow_control(
792 info->ioaddr);
793 }
794 if (I_IXOFF(tty)) {
795 mxser_enable_must_tx_software_flow_control(
796 info->ioaddr);
797 } else {
798 mxser_disable_must_tx_software_flow_control(
799 info->ioaddr);
800 }
801 }
802
803
804 outb(fcr, info->ioaddr + UART_FCR); /* set fcr */
805 outb(cval, info->ioaddr + UART_LCR);
806
807 return ret;
808 }
809
810 static void mxser_check_modem_status(struct tty_struct *tty,
811 struct mxser_port *port, int status)
812 {
813 /* update input line counters */
814 if (status & UART_MSR_TERI)
815 port->icount.rng++;
816 if (status & UART_MSR_DDSR)
817 port->icount.dsr++;
818 if (status & UART_MSR_DDCD)
819 port->icount.dcd++;
820 if (status & UART_MSR_DCTS)
821 port->icount.cts++;
822 port->mon_data.modem_status = status;
823 wake_up_interruptible(&port->port.delta_msr_wait);
824
825 if ((port->port.flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
826 if (status & UART_MSR_DCD)
827 wake_up_interruptible(&port->port.open_wait);
828 }
829
830 if (port->port.flags & ASYNC_CTS_FLOW) {
831 if (tty->hw_stopped) {
832 if (status & UART_MSR_CTS) {
833 tty->hw_stopped = 0;
834
835 if ((port->type != PORT_16550A) &&
836 (!port->board->chip_flag)) {
837 outb(port->IER & ~UART_IER_THRI,
838 port->ioaddr + UART_IER);
839 port->IER |= UART_IER_THRI;
840 outb(port->IER, port->ioaddr +
841 UART_IER);
842 }
843 tty_wakeup(tty);
844 }
845 } else {
846 if (!(status & UART_MSR_CTS)) {
847 tty->hw_stopped = 1;
848 if (port->type != PORT_16550A &&
849 !port->board->chip_flag) {
850 port->IER &= ~UART_IER_THRI;
851 outb(port->IER, port->ioaddr +
852 UART_IER);
853 }
854 }
855 }
856 }
857 }
858
859 static int mxser_startup(struct tty_struct *tty)
860 {
861 struct mxser_port *info = tty->driver_data;
862 unsigned long page;
863 unsigned long flags;
864
865 page = __get_free_page(GFP_KERNEL);
866 if (!page)
867 return -ENOMEM;
868
869 spin_lock_irqsave(&info->slock, flags);
870
871 if (info->port.flags & ASYNC_INITIALIZED) {
872 free_page(page);
873 spin_unlock_irqrestore(&info->slock, flags);
874 return 0;
875 }
876
877 if (!info->ioaddr || !info->type) {
878 set_bit(TTY_IO_ERROR, &tty->flags);
879 free_page(page);
880 spin_unlock_irqrestore(&info->slock, flags);
881 return 0;
882 }
883 if (info->port.xmit_buf)
884 free_page(page);
885 else
886 info->port.xmit_buf = (unsigned char *) page;
887
888 /*
889 * Clear the FIFO buffers and disable them
890 * (they will be reenabled in mxser_change_speed())
891 */
892 if (info->board->chip_flag)
893 outb((UART_FCR_CLEAR_RCVR |
894 UART_FCR_CLEAR_XMIT |
895 MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR);
896 else
897 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
898 info->ioaddr + UART_FCR);
899
900 /*
901 * At this point there's no way the LSR could still be 0xFF;
902 * if it is, then bail out, because there's likely no UART
903 * here.
904 */
905 if (inb(info->ioaddr + UART_LSR) == 0xff) {
906 spin_unlock_irqrestore(&info->slock, flags);
907 if (capable(CAP_SYS_ADMIN)) {
908 set_bit(TTY_IO_ERROR, &tty->flags);
909 return 0;
910 } else
911 return -ENODEV;
912 }
913
914 /*
915 * Clear the interrupt registers.
916 */
917 (void) inb(info->ioaddr + UART_LSR);
918 (void) inb(info->ioaddr + UART_RX);
919 (void) inb(info->ioaddr + UART_IIR);
920 (void) inb(info->ioaddr + UART_MSR);
921
922 /*
923 * Now, initialize the UART
924 */
925 outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */
926 info->MCR = UART_MCR_DTR | UART_MCR_RTS;
927 outb(info->MCR, info->ioaddr + UART_MCR);
928
929 /*
930 * Finally, enable interrupts
931 */
932 info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
933
934 if (info->board->chip_flag)
935 info->IER |= MOXA_MUST_IER_EGDAI;
936 outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */
937
938 /*
939 * And clear the interrupt registers again for luck.
940 */
941 (void) inb(info->ioaddr + UART_LSR);
942 (void) inb(info->ioaddr + UART_RX);
943 (void) inb(info->ioaddr + UART_IIR);
944 (void) inb(info->ioaddr + UART_MSR);
945
946 clear_bit(TTY_IO_ERROR, &tty->flags);
947 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
948
949 /*
950 * and set the speed of the serial port
951 */
952 mxser_change_speed(tty, NULL);
953 info->port.flags |= ASYNC_INITIALIZED;
954 spin_unlock_irqrestore(&info->slock, flags);
955
956 return 0;
957 }
958
959 /*
960 * This routine will shutdown a serial port; interrupts maybe disabled, and
961 * DTR is dropped if the hangup on close termio flag is on.
962 */
963 static void mxser_shutdown(struct tty_struct *tty)
964 {
965 struct mxser_port *info = tty->driver_data;
966 unsigned long flags;
967
968 if (!(info->port.flags & ASYNC_INITIALIZED))
969 return;
970
971 spin_lock_irqsave(&info->slock, flags);
972
973 /*
974 * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
975 * here so the queue might never be waken up
976 */
977 wake_up_interruptible(&info->port.delta_msr_wait);
978
979 /*
980 * Free the IRQ, if necessary
981 */
982 if (info->port.xmit_buf) {
983 free_page((unsigned long) info->port.xmit_buf);
984 info->port.xmit_buf = NULL;
985 }
986
987 info->IER = 0;
988 outb(0x00, info->ioaddr + UART_IER);
989
990 if (tty->termios->c_cflag & HUPCL)
991 info->MCR &= ~(UART_MCR_DTR | UART_MCR_RTS);
992 outb(info->MCR, info->ioaddr + UART_MCR);
993
994 /* clear Rx/Tx FIFO's */
995 if (info->board->chip_flag)
996 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT |
997 MOXA_MUST_FCR_GDA_MODE_ENABLE,
998 info->ioaddr + UART_FCR);
999 else
1000 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
1001 info->ioaddr + UART_FCR);
1002
1003 /* read data port to reset things */
1004 (void) inb(info->ioaddr + UART_RX);
1005
1006 set_bit(TTY_IO_ERROR, &tty->flags);
1007
1008 info->port.flags &= ~ASYNC_INITIALIZED;
1009
1010 if (info->board->chip_flag)
1011 SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr);
1012
1013 spin_unlock_irqrestore(&info->slock, flags);
1014 }
1015
1016 /*
1017 * This routine is called whenever a serial port is opened. It
1018 * enables interrupts for a serial port, linking in its async structure into
1019 * the IRQ chain. It also performs the serial-specific
1020 * initialization for the tty structure.
1021 */
1022 static int mxser_open(struct tty_struct *tty, struct file *filp)
1023 {
1024 struct mxser_port *info;
1025 unsigned long flags;
1026 int retval, line;
1027
1028 line = tty->index;
1029 if (line == MXSER_PORTS)
1030 return 0;
1031 if (line < 0 || line > MXSER_PORTS)
1032 return -ENODEV;
1033 info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD];
1034 if (!info->ioaddr)
1035 return -ENODEV;
1036
1037 tty->driver_data = info;
1038 tty_port_tty_set(&info->port, tty);
1039 /*
1040 * Start up serial port
1041 */
1042 spin_lock_irqsave(&info->port.lock, flags);
1043 info->port.count++;
1044 spin_unlock_irqrestore(&info->port.lock, flags);
1045 retval = mxser_startup(tty);
1046 if (retval)
1047 return retval;
1048
1049 retval = tty_port_block_til_ready(&info->port, tty, filp);
1050 if (retval)
1051 return retval;
1052
1053 return 0;
1054 }
1055
1056 static void mxser_flush_buffer(struct tty_struct *tty)
1057 {
1058 struct mxser_port *info = tty->driver_data;
1059 char fcr;
1060 unsigned long flags;
1061
1062
1063 spin_lock_irqsave(&info->slock, flags);
1064 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
1065
1066 fcr = inb(info->ioaddr + UART_FCR);
1067 outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
1068 info->ioaddr + UART_FCR);
1069 outb(fcr, info->ioaddr + UART_FCR);
1070
1071 spin_unlock_irqrestore(&info->slock, flags);
1072
1073 tty_wakeup(tty);
1074 }
1075
1076
1077 static void mxser_close_port(struct tty_struct *tty, struct tty_port *port)
1078 {
1079 struct mxser_port *info = container_of(port, struct mxser_port, port);
1080 unsigned long timeout;
1081 /*
1082 * Save the termios structure, since this port may have
1083 * separate termios for callout and dialin.
1084 *
1085 * FIXME: Can this go ?
1086 */
1087 if (port->flags & ASYNC_NORMAL_ACTIVE)
1088 info->normal_termios = *tty->termios;
1089 /*
1090 * At this point we stop accepting input. To do this, we
1091 * disable the receive line status interrupts, and tell the
1092 * interrupt driver to stop checking the data ready bit in the
1093 * line status register.
1094 */
1095 info->IER &= ~UART_IER_RLSI;
1096 if (info->board->chip_flag)
1097 info->IER &= ~MOXA_MUST_RECV_ISR;
1098
1099 if (port->flags & ASYNC_INITIALIZED) {
1100 outb(info->IER, info->ioaddr + UART_IER);
1101 /*
1102 * Before we drop DTR, make sure the UART transmitter
1103 * has completely drained; this is especially
1104 * important if there is a transmit FIFO!
1105 */
1106 timeout = jiffies + HZ;
1107 while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) {
1108 schedule_timeout_interruptible(5);
1109 if (time_after(jiffies, timeout))
1110 break;
1111 }
1112 }
1113 mxser_shutdown(tty);
1114
1115 }
1116
1117 /*
1118 * This routine is called when the serial port gets closed. First, we
1119 * wait for the last remaining data to be sent. Then, we unlink its
1120 * async structure from the interrupt chain if necessary, and we free
1121 * that IRQ if nothing is left in the chain.
1122 */
1123 static void mxser_close(struct tty_struct *tty, struct file *filp)
1124 {
1125 struct mxser_port *info = tty->driver_data;
1126 struct tty_port *port = &info->port;
1127
1128 if (tty->index == MXSER_PORTS)
1129 return;
1130 if (tty_port_close_start(port, tty, filp) == 0)
1131 return;
1132 mxser_close_port(tty, port);
1133 mxser_flush_buffer(tty);
1134 /* Right now the tty_port set is done outside of the close_end helper
1135 as we don't yet have everyone using refcounts */
1136 tty_port_close_end(port, tty);
1137 tty_port_tty_set(port, NULL);
1138 }
1139
1140 static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
1141 {
1142 int c, total = 0;
1143 struct mxser_port *info = tty->driver_data;
1144 unsigned long flags;
1145
1146 if (!info->port.xmit_buf)
1147 return 0;
1148
1149 while (1) {
1150 c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
1151 SERIAL_XMIT_SIZE - info->xmit_head));
1152 if (c <= 0)
1153 break;
1154
1155 memcpy(info->port.xmit_buf + info->xmit_head, buf, c);
1156 spin_lock_irqsave(&info->slock, flags);
1157 info->xmit_head = (info->xmit_head + c) &
1158 (SERIAL_XMIT_SIZE - 1);
1159 info->xmit_cnt += c;
1160 spin_unlock_irqrestore(&info->slock, flags);
1161
1162 buf += c;
1163 count -= c;
1164 total += c;
1165 }
1166
1167 if (info->xmit_cnt && !tty->stopped) {
1168 if (!tty->hw_stopped ||
1169 (info->type == PORT_16550A) ||
1170 (info->board->chip_flag)) {
1171 spin_lock_irqsave(&info->slock, flags);
1172 outb(info->IER & ~UART_IER_THRI, info->ioaddr +
1173 UART_IER);
1174 info->IER |= UART_IER_THRI;
1175 outb(info->IER, info->ioaddr + UART_IER);
1176 spin_unlock_irqrestore(&info->slock, flags);
1177 }
1178 }
1179 return total;
1180 }
1181
1182 static int mxser_put_char(struct tty_struct *tty, unsigned char ch)
1183 {
1184 struct mxser_port *info = tty->driver_data;
1185 unsigned long flags;
1186
1187 if (!info->port.xmit_buf)
1188 return 0;
1189
1190 if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
1191 return 0;
1192
1193 spin_lock_irqsave(&info->slock, flags);
1194 info->port.xmit_buf[info->xmit_head++] = ch;
1195 info->xmit_head &= SERIAL_XMIT_SIZE - 1;
1196 info->xmit_cnt++;
1197 spin_unlock_irqrestore(&info->slock, flags);
1198 if (!tty->stopped) {
1199 if (!tty->hw_stopped ||
1200 (info->type == PORT_16550A) ||
1201 info->board->chip_flag) {
1202 spin_lock_irqsave(&info->slock, flags);
1203 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1204 info->IER |= UART_IER_THRI;
1205 outb(info->IER, info->ioaddr + UART_IER);
1206 spin_unlock_irqrestore(&info->slock, flags);
1207 }
1208 }
1209 return 1;
1210 }
1211
1212
1213 static void mxser_flush_chars(struct tty_struct *tty)
1214 {
1215 struct mxser_port *info = tty->driver_data;
1216 unsigned long flags;
1217
1218 if (info->xmit_cnt <= 0 || tty->stopped || !info->port.xmit_buf ||
1219 (tty->hw_stopped && info->type != PORT_16550A &&
1220 !info->board->chip_flag))
1221 return;
1222
1223 spin_lock_irqsave(&info->slock, flags);
1224
1225 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1226 info->IER |= UART_IER_THRI;
1227 outb(info->IER, info->ioaddr + UART_IER);
1228
1229 spin_unlock_irqrestore(&info->slock, flags);
1230 }
1231
1232 static int mxser_write_room(struct tty_struct *tty)
1233 {
1234 struct mxser_port *info = tty->driver_data;
1235 int ret;
1236
1237 ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
1238 return ret < 0 ? 0 : ret;
1239 }
1240
1241 static int mxser_chars_in_buffer(struct tty_struct *tty)
1242 {
1243 struct mxser_port *info = tty->driver_data;
1244 return info->xmit_cnt;
1245 }
1246
1247 /*
1248 * ------------------------------------------------------------
1249 * friends of mxser_ioctl()
1250 * ------------------------------------------------------------
1251 */
1252 static int mxser_get_serial_info(struct tty_struct *tty,
1253 struct serial_struct __user *retinfo)
1254 {
1255 struct mxser_port *info = tty->driver_data;
1256 struct serial_struct tmp = {
1257 .type = info->type,
1258 .line = tty->index,
1259 .port = info->ioaddr,
1260 .irq = info->board->irq,
1261 .flags = info->port.flags,
1262 .baud_base = info->baud_base,
1263 .close_delay = info->port.close_delay,
1264 .closing_wait = info->port.closing_wait,
1265 .custom_divisor = info->custom_divisor,
1266 .hub6 = 0
1267 };
1268 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
1269 return -EFAULT;
1270 return 0;
1271 }
1272
1273 static int mxser_set_serial_info(struct tty_struct *tty,
1274 struct serial_struct __user *new_info)
1275 {
1276 struct mxser_port *info = tty->driver_data;
1277 struct serial_struct new_serial;
1278 speed_t baud;
1279 unsigned long sl_flags;
1280 unsigned int flags;
1281 int retval = 0;
1282
1283 if (!new_info || !info->ioaddr)
1284 return -ENODEV;
1285 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
1286 return -EFAULT;
1287
1288 if (new_serial.irq != info->board->irq ||
1289 new_serial.port != info->ioaddr)
1290 return -EINVAL;
1291
1292 flags = info->port.flags & ASYNC_SPD_MASK;
1293
1294 if (!capable(CAP_SYS_ADMIN)) {
1295 if ((new_serial.baud_base != info->baud_base) ||
1296 (new_serial.close_delay != info->port.close_delay) ||
1297 ((new_serial.flags & ~ASYNC_USR_MASK) != (info->port.flags & ~ASYNC_USR_MASK)))
1298 return -EPERM;
1299 info->port.flags = ((info->port.flags & ~ASYNC_USR_MASK) |
1300 (new_serial.flags & ASYNC_USR_MASK));
1301 } else {
1302 /*
1303 * OK, past this point, all the error checking has been done.
1304 * At this point, we start making changes.....
1305 */
1306 info->port.flags = ((info->port.flags & ~ASYNC_FLAGS) |
1307 (new_serial.flags & ASYNC_FLAGS));
1308 info->port.close_delay = new_serial.close_delay * HZ / 100;
1309 info->port.closing_wait = new_serial.closing_wait * HZ / 100;
1310 tty->low_latency = (info->port.flags & ASYNC_LOW_LATENCY)
1311 ? 1 : 0;
1312 if ((info->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST &&
1313 (new_serial.baud_base != info->baud_base ||
1314 new_serial.custom_divisor !=
1315 info->custom_divisor)) {
1316 baud = new_serial.baud_base / new_serial.custom_divisor;
1317 tty_encode_baud_rate(tty, baud, baud);
1318 }
1319 }
1320
1321 info->type = new_serial.type;
1322
1323 process_txrx_fifo(info);
1324
1325 if (info->port.flags & ASYNC_INITIALIZED) {
1326 if (flags != (info->port.flags & ASYNC_SPD_MASK)) {
1327 spin_lock_irqsave(&info->slock, sl_flags);
1328 mxser_change_speed(tty, NULL);
1329 spin_unlock_irqrestore(&info->slock, sl_flags);
1330 }
1331 } else
1332 retval = mxser_startup(tty);
1333
1334 return retval;
1335 }
1336
1337 /*
1338 * mxser_get_lsr_info - get line status register info
1339 *
1340 * Purpose: Let user call ioctl() to get info when the UART physically
1341 * is emptied. On bus types like RS485, the transmitter must
1342 * release the bus after transmitting. This must be done when
1343 * the transmit shift register is empty, not be done when the
1344 * transmit holding register is empty. This functionality
1345 * allows an RS485 driver to be written in user space.
1346 */
1347 static int mxser_get_lsr_info(struct mxser_port *info,
1348 unsigned int __user *value)
1349 {
1350 unsigned char status;
1351 unsigned int result;
1352 unsigned long flags;
1353
1354 spin_lock_irqsave(&info->slock, flags);
1355 status = inb(info->ioaddr + UART_LSR);
1356 spin_unlock_irqrestore(&info->slock, flags);
1357 result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
1358 return put_user(result, value);
1359 }
1360
1361 static int mxser_tiocmget(struct tty_struct *tty, struct file *file)
1362 {
1363 struct mxser_port *info = tty->driver_data;
1364 unsigned char control, status;
1365 unsigned long flags;
1366
1367
1368 if (tty->index == MXSER_PORTS)
1369 return -ENOIOCTLCMD;
1370 if (test_bit(TTY_IO_ERROR, &tty->flags))
1371 return -EIO;
1372
1373 control = info->MCR;
1374
1375 spin_lock_irqsave(&info->slock, flags);
1376 status = inb(info->ioaddr + UART_MSR);
1377 if (status & UART_MSR_ANY_DELTA)
1378 mxser_check_modem_status(tty, info, status);
1379 spin_unlock_irqrestore(&info->slock, flags);
1380 return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
1381 ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
1382 ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
1383 ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
1384 ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
1385 ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
1386 }
1387
1388 static int mxser_tiocmset(struct tty_struct *tty, struct file *file,
1389 unsigned int set, unsigned int clear)
1390 {
1391 struct mxser_port *info = tty->driver_data;
1392 unsigned long flags;
1393
1394
1395 if (tty->index == MXSER_PORTS)
1396 return -ENOIOCTLCMD;
1397 if (test_bit(TTY_IO_ERROR, &tty->flags))
1398 return -EIO;
1399
1400 spin_lock_irqsave(&info->slock, flags);
1401
1402 if (set & TIOCM_RTS)
1403 info->MCR |= UART_MCR_RTS;
1404 if (set & TIOCM_DTR)
1405 info->MCR |= UART_MCR_DTR;
1406
1407 if (clear & TIOCM_RTS)
1408 info->MCR &= ~UART_MCR_RTS;
1409 if (clear & TIOCM_DTR)
1410 info->MCR &= ~UART_MCR_DTR;
1411
1412 outb(info->MCR, info->ioaddr + UART_MCR);
1413 spin_unlock_irqrestore(&info->slock, flags);
1414 return 0;
1415 }
1416
1417 static int __init mxser_program_mode(int port)
1418 {
1419 int id, i, j, n;
1420
1421 outb(0, port);
1422 outb(0, port);
1423 outb(0, port);
1424 (void)inb(port);
1425 (void)inb(port);
1426 outb(0, port);
1427 (void)inb(port);
1428
1429 id = inb(port + 1) & 0x1F;
1430 if ((id != C168_ASIC_ID) &&
1431 (id != C104_ASIC_ID) &&
1432 (id != C102_ASIC_ID) &&
1433 (id != CI132_ASIC_ID) &&
1434 (id != CI134_ASIC_ID) &&
1435 (id != CI104J_ASIC_ID))
1436 return -1;
1437 for (i = 0, j = 0; i < 4; i++) {
1438 n = inb(port + 2);
1439 if (n == 'M') {
1440 j = 1;
1441 } else if ((j == 1) && (n == 1)) {
1442 j = 2;
1443 break;
1444 } else
1445 j = 0;
1446 }
1447 if (j != 2)
1448 id = -2;
1449 return id;
1450 }
1451
1452 static void __init mxser_normal_mode(int port)
1453 {
1454 int i, n;
1455
1456 outb(0xA5, port + 1);
1457 outb(0x80, port + 3);
1458 outb(12, port + 0); /* 9600 bps */
1459 outb(0, port + 1);
1460 outb(0x03, port + 3); /* 8 data bits */
1461 outb(0x13, port + 4); /* loop back mode */
1462 for (i = 0; i < 16; i++) {
1463 n = inb(port + 5);
1464 if ((n & 0x61) == 0x60)
1465 break;
1466 if ((n & 1) == 1)
1467 (void)inb(port);
1468 }
1469 outb(0x00, port + 4);
1470 }
1471
1472 #define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
1473 #define CHIP_DO 0x02 /* Serial Data Output in Eprom */
1474 #define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
1475 #define CHIP_DI 0x08 /* Serial Data Input in Eprom */
1476 #define EN_CCMD 0x000 /* Chip's command register */
1477 #define EN0_RSARLO 0x008 /* Remote start address reg 0 */
1478 #define EN0_RSARHI 0x009 /* Remote start address reg 1 */
1479 #define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
1480 #define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
1481 #define EN0_DCFG 0x00E /* Data configuration reg WR */
1482 #define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
1483 #define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
1484 #define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
1485 static int __init mxser_read_register(int port, unsigned short *regs)
1486 {
1487 int i, k, value, id;
1488 unsigned int j;
1489
1490 id = mxser_program_mode(port);
1491 if (id < 0)
1492 return id;
1493 for (i = 0; i < 14; i++) {
1494 k = (i & 0x3F) | 0x180;
1495 for (j = 0x100; j > 0; j >>= 1) {
1496 outb(CHIP_CS, port);
1497 if (k & j) {
1498 outb(CHIP_CS | CHIP_DO, port);
1499 outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
1500 } else {
1501 outb(CHIP_CS, port);
1502 outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
1503 }
1504 }
1505 (void)inb(port);
1506 value = 0;
1507 for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
1508 outb(CHIP_CS, port);
1509 outb(CHIP_CS | CHIP_SK, port);
1510 if (inb(port) & CHIP_DI)
1511 value |= j;
1512 }
1513 regs[i] = value;
1514 outb(0, port);
1515 }
1516 mxser_normal_mode(port);
1517 return id;
1518 }
1519
1520 static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
1521 {
1522 struct mxser_port *port;
1523 struct tty_struct *tty;
1524 int result, status;
1525 unsigned int i, j;
1526 int ret = 0;
1527
1528 switch (cmd) {
1529 case MOXA_GET_MAJOR:
1530 if (printk_ratelimit())
1531 printk(KERN_WARNING "mxser: '%s' uses deprecated ioctl "
1532 "%x (GET_MAJOR), fix your userspace\n",
1533 current->comm, cmd);
1534 return put_user(ttymajor, (int __user *)argp);
1535
1536 case MOXA_CHKPORTENABLE:
1537 result = 0;
1538 lock_kernel();
1539 for (i = 0; i < MXSER_BOARDS; i++)
1540 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++)
1541 if (mxser_boards[i].ports[j].ioaddr)
1542 result |= (1 << i);
1543 unlock_kernel();
1544 return put_user(result, (unsigned long __user *)argp);
1545 case MOXA_GETDATACOUNT:
1546 lock_kernel();
1547 if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
1548 ret = -EFAULT;
1549 unlock_kernel();
1550 return ret;
1551 case MOXA_GETMSTATUS: {
1552 struct mxser_mstatus ms, __user *msu = argp;
1553 lock_kernel();
1554 for (i = 0; i < MXSER_BOARDS; i++)
1555 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
1556 port = &mxser_boards[i].ports[j];
1557 memset(&ms, 0, sizeof(ms));
1558
1559 if (!port->ioaddr)
1560 goto copy;
1561
1562 tty = tty_port_tty_get(&port->port);
1563
1564 if (!tty || !tty->termios)
1565 ms.cflag = port->normal_termios.c_cflag;
1566 else
1567 ms.cflag = tty->termios->c_cflag;
1568 tty_kref_put(tty);
1569 status = inb(port->ioaddr + UART_MSR);
1570 if (status & UART_MSR_DCD)
1571 ms.dcd = 1;
1572 if (status & UART_MSR_DSR)
1573 ms.dsr = 1;
1574 if (status & UART_MSR_CTS)
1575 ms.cts = 1;
1576 copy:
1577 if (copy_to_user(msu, &ms, sizeof(ms))) {
1578 unlock_kernel();
1579 return -EFAULT;
1580 }
1581 msu++;
1582 }
1583 unlock_kernel();
1584 return 0;
1585 }
1586 case MOXA_ASPP_MON_EXT: {
1587 struct mxser_mon_ext *me; /* it's 2k, stack unfriendly */
1588 unsigned int cflag, iflag, p;
1589 u8 opmode;
1590
1591 me = kzalloc(sizeof(*me), GFP_KERNEL);
1592 if (!me)
1593 return -ENOMEM;
1594
1595 lock_kernel();
1596 for (i = 0, p = 0; i < MXSER_BOARDS; i++) {
1597 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++, p++) {
1598 if (p >= ARRAY_SIZE(me->rx_cnt)) {
1599 i = MXSER_BOARDS;
1600 break;
1601 }
1602 port = &mxser_boards[i].ports[j];
1603 if (!port->ioaddr)
1604 continue;
1605
1606 status = mxser_get_msr(port->ioaddr, 0, p);
1607
1608 if (status & UART_MSR_TERI)
1609 port->icount.rng++;
1610 if (status & UART_MSR_DDSR)
1611 port->icount.dsr++;
1612 if (status & UART_MSR_DDCD)
1613 port->icount.dcd++;
1614 if (status & UART_MSR_DCTS)
1615 port->icount.cts++;
1616
1617 port->mon_data.modem_status = status;
1618 me->rx_cnt[p] = port->mon_data.rxcnt;
1619 me->tx_cnt[p] = port->mon_data.txcnt;
1620 me->up_rxcnt[p] = port->mon_data.up_rxcnt;
1621 me->up_txcnt[p] = port->mon_data.up_txcnt;
1622 me->modem_status[p] =
1623 port->mon_data.modem_status;
1624 tty = tty_port_tty_get(&port->port);
1625
1626 if (!tty || !tty->termios) {
1627 cflag = port->normal_termios.c_cflag;
1628 iflag = port->normal_termios.c_iflag;
1629 me->baudrate[p] = tty_termios_baud_rate(&port->normal_termios);
1630 } else {
1631 cflag = tty->termios->c_cflag;
1632 iflag = tty->termios->c_iflag;
1633 me->baudrate[p] = tty_get_baud_rate(tty);
1634 }
1635 tty_kref_put(tty);
1636
1637 me->databits[p] = cflag & CSIZE;
1638 me->stopbits[p] = cflag & CSTOPB;
1639 me->parity[p] = cflag & (PARENB | PARODD |
1640 CMSPAR);
1641
1642 if (cflag & CRTSCTS)
1643 me->flowctrl[p] |= 0x03;
1644
1645 if (iflag & (IXON | IXOFF))
1646 me->flowctrl[p] |= 0x0C;
1647
1648 if (port->type == PORT_16550A)
1649 me->fifo[p] = 1;
1650
1651 opmode = inb(port->opmode_ioaddr) >>
1652 ((p % 4) * 2);
1653 opmode &= OP_MODE_MASK;
1654 me->iftype[p] = opmode;
1655 }
1656 }
1657 unlock_kernel();
1658 if (copy_to_user(argp, me, sizeof(*me)))
1659 ret = -EFAULT;
1660 kfree(me);
1661 return ret;
1662 }
1663 default:
1664 return -ENOIOCTLCMD;
1665 }
1666 return 0;
1667 }
1668
1669 static int mxser_cflags_changed(struct mxser_port *info, unsigned long arg,
1670 struct async_icount *cprev)
1671 {
1672 struct async_icount cnow;
1673 unsigned long flags;
1674 int ret;
1675
1676 spin_lock_irqsave(&info->slock, flags);
1677 cnow = info->icount; /* atomic copy */
1678 spin_unlock_irqrestore(&info->slock, flags);
1679
1680 ret = ((arg & TIOCM_RNG) && (cnow.rng != cprev->rng)) ||
1681 ((arg & TIOCM_DSR) && (cnow.dsr != cprev->dsr)) ||
1682 ((arg & TIOCM_CD) && (cnow.dcd != cprev->dcd)) ||
1683 ((arg & TIOCM_CTS) && (cnow.cts != cprev->cts));
1684
1685 *cprev = cnow;
1686
1687 return ret;
1688 }
1689
1690 static int mxser_ioctl(struct tty_struct *tty, struct file *file,
1691 unsigned int cmd, unsigned long arg)
1692 {
1693 struct mxser_port *info = tty->driver_data;
1694 struct async_icount cnow;
1695 unsigned long flags;
1696 void __user *argp = (void __user *)arg;
1697 int retval;
1698
1699 if (tty->index == MXSER_PORTS)
1700 return mxser_ioctl_special(cmd, argp);
1701
1702 if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
1703 int p;
1704 unsigned long opmode;
1705 static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
1706 int shiftbit;
1707 unsigned char val, mask;
1708
1709 p = tty->index % 4;
1710 if (cmd == MOXA_SET_OP_MODE) {
1711 if (get_user(opmode, (int __user *) argp))
1712 return -EFAULT;
1713 if (opmode != RS232_MODE &&
1714 opmode != RS485_2WIRE_MODE &&
1715 opmode != RS422_MODE &&
1716 opmode != RS485_4WIRE_MODE)
1717 return -EFAULT;
1718 lock_kernel();
1719 mask = ModeMask[p];
1720 shiftbit = p * 2;
1721 val = inb(info->opmode_ioaddr);
1722 val &= mask;
1723 val |= (opmode << shiftbit);
1724 outb(val, info->opmode_ioaddr);
1725 unlock_kernel();
1726 } else {
1727 lock_kernel();
1728 shiftbit = p * 2;
1729 opmode = inb(info->opmode_ioaddr) >> shiftbit;
1730 opmode &= OP_MODE_MASK;
1731 unlock_kernel();
1732 if (put_user(opmode, (int __user *)argp))
1733 return -EFAULT;
1734 }
1735 return 0;
1736 }
1737
1738 if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT && cmd != TIOCGICOUNT &&
1739 test_bit(TTY_IO_ERROR, &tty->flags))
1740 return -EIO;
1741
1742 switch (cmd) {
1743 case TIOCGSERIAL:
1744 lock_kernel();
1745 retval = mxser_get_serial_info(tty, argp);
1746 unlock_kernel();
1747 return retval;
1748 case TIOCSSERIAL:
1749 lock_kernel();
1750 retval = mxser_set_serial_info(tty, argp);
1751 unlock_kernel();
1752 return retval;
1753 case TIOCSERGETLSR: /* Get line status register */
1754 return mxser_get_lsr_info(info, argp);
1755 /*
1756 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
1757 * - mask passed in arg for lines of interest
1758 * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
1759 * Caller should use TIOCGICOUNT to see which one it was
1760 */
1761 case TIOCMIWAIT:
1762 spin_lock_irqsave(&info->slock, flags);
1763 cnow = info->icount; /* note the counters on entry */
1764 spin_unlock_irqrestore(&info->slock, flags);
1765
1766 return wait_event_interruptible(info->port.delta_msr_wait,
1767 mxser_cflags_changed(info, arg, &cnow));
1768 /*
1769 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
1770 * Return: write counters to the user passed counter struct
1771 * NB: both 1->0 and 0->1 transitions are counted except for
1772 * RI where only 0->1 is counted.
1773 */
1774 case TIOCGICOUNT: {
1775 struct serial_icounter_struct icnt = { 0 };
1776 spin_lock_irqsave(&info->slock, flags);
1777 cnow = info->icount;
1778 spin_unlock_irqrestore(&info->slock, flags);
1779
1780 icnt.frame = cnow.frame;
1781 icnt.brk = cnow.brk;
1782 icnt.overrun = cnow.overrun;
1783 icnt.buf_overrun = cnow.buf_overrun;
1784 icnt.parity = cnow.parity;
1785 icnt.rx = cnow.rx;
1786 icnt.tx = cnow.tx;
1787 icnt.cts = cnow.cts;
1788 icnt.dsr = cnow.dsr;
1789 icnt.rng = cnow.rng;
1790 icnt.dcd = cnow.dcd;
1791
1792 return copy_to_user(argp, &icnt, sizeof(icnt)) ? -EFAULT : 0;
1793 }
1794 case MOXA_HighSpeedOn:
1795 return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
1796 case MOXA_SDS_RSTICOUNTER:
1797 lock_kernel();
1798 info->mon_data.rxcnt = 0;
1799 info->mon_data.txcnt = 0;
1800 unlock_kernel();
1801 return 0;
1802
1803 case MOXA_ASPP_OQUEUE:{
1804 int len, lsr;
1805
1806 lock_kernel();
1807 len = mxser_chars_in_buffer(tty);
1808 lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_THRE;
1809 len += (lsr ? 0 : 1);
1810 unlock_kernel();
1811
1812 return put_user(len, (int __user *)argp);
1813 }
1814 case MOXA_ASPP_MON: {
1815 int mcr, status;
1816
1817 lock_kernel();
1818 status = mxser_get_msr(info->ioaddr, 1, tty->index);
1819 mxser_check_modem_status(tty, info, status);
1820
1821 mcr = inb(info->ioaddr + UART_MCR);
1822 if (mcr & MOXA_MUST_MCR_XON_FLAG)
1823 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
1824 else
1825 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
1826
1827 if (mcr & MOXA_MUST_MCR_TX_XON)
1828 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
1829 else
1830 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
1831
1832 if (tty->hw_stopped)
1833 info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
1834 else
1835 info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
1836 unlock_kernel();
1837 if (copy_to_user(argp, &info->mon_data,
1838 sizeof(struct mxser_mon)))
1839 return -EFAULT;
1840
1841 return 0;
1842 }
1843 case MOXA_ASPP_LSTATUS: {
1844 if (put_user(info->err_shadow, (unsigned char __user *)argp))
1845 return -EFAULT;
1846
1847 info->err_shadow = 0;
1848 return 0;
1849 }
1850 case MOXA_SET_BAUD_METHOD: {
1851 int method;
1852
1853 if (get_user(method, (int __user *)argp))
1854 return -EFAULT;
1855 mxser_set_baud_method[tty->index] = method;
1856 return put_user(method, (int __user *)argp);
1857 }
1858 default:
1859 return -ENOIOCTLCMD;
1860 }
1861 return 0;
1862 }
1863
1864 static void mxser_stoprx(struct tty_struct *tty)
1865 {
1866 struct mxser_port *info = tty->driver_data;
1867
1868 info->ldisc_stop_rx = 1;
1869 if (I_IXOFF(tty)) {
1870 if (info->board->chip_flag) {
1871 info->IER &= ~MOXA_MUST_RECV_ISR;
1872 outb(info->IER, info->ioaddr + UART_IER);
1873 } else {
1874 info->x_char = STOP_CHAR(tty);
1875 outb(0, info->ioaddr + UART_IER);
1876 info->IER |= UART_IER_THRI;
1877 outb(info->IER, info->ioaddr + UART_IER);
1878 }
1879 }
1880
1881 if (tty->termios->c_cflag & CRTSCTS) {
1882 info->MCR &= ~UART_MCR_RTS;
1883 outb(info->MCR, info->ioaddr + UART_MCR);
1884 }
1885 }
1886
1887 /*
1888 * This routine is called by the upper-layer tty layer to signal that
1889 * incoming characters should be throttled.
1890 */
1891 static void mxser_throttle(struct tty_struct *tty)
1892 {
1893 mxser_stoprx(tty);
1894 }
1895
1896 static void mxser_unthrottle(struct tty_struct *tty)
1897 {
1898 struct mxser_port *info = tty->driver_data;
1899
1900 /* startrx */
1901 info->ldisc_stop_rx = 0;
1902 if (I_IXOFF(tty)) {
1903 if (info->x_char)
1904 info->x_char = 0;
1905 else {
1906 if (info->board->chip_flag) {
1907 info->IER |= MOXA_MUST_RECV_ISR;
1908 outb(info->IER, info->ioaddr + UART_IER);
1909 } else {
1910 info->x_char = START_CHAR(tty);
1911 outb(0, info->ioaddr + UART_IER);
1912 info->IER |= UART_IER_THRI;
1913 outb(info->IER, info->ioaddr + UART_IER);
1914 }
1915 }
1916 }
1917
1918 if (tty->termios->c_cflag & CRTSCTS) {
1919 info->MCR |= UART_MCR_RTS;
1920 outb(info->MCR, info->ioaddr + UART_MCR);
1921 }
1922 }
1923
1924 /*
1925 * mxser_stop() and mxser_start()
1926 *
1927 * This routines are called before setting or resetting tty->stopped.
1928 * They enable or disable transmitter interrupts, as necessary.
1929 */
1930 static void mxser_stop(struct tty_struct *tty)
1931 {
1932 struct mxser_port *info = tty->driver_data;
1933 unsigned long flags;
1934
1935 spin_lock_irqsave(&info->slock, flags);
1936 if (info->IER & UART_IER_THRI) {
1937 info->IER &= ~UART_IER_THRI;
1938 outb(info->IER, info->ioaddr + UART_IER);
1939 }
1940 spin_unlock_irqrestore(&info->slock, flags);
1941 }
1942
1943 static void mxser_start(struct tty_struct *tty)
1944 {
1945 struct mxser_port *info = tty->driver_data;
1946 unsigned long flags;
1947
1948 spin_lock_irqsave(&info->slock, flags);
1949 if (info->xmit_cnt && info->port.xmit_buf) {
1950 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1951 info->IER |= UART_IER_THRI;
1952 outb(info->IER, info->ioaddr + UART_IER);
1953 }
1954 spin_unlock_irqrestore(&info->slock, flags);
1955 }
1956
1957 static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
1958 {
1959 struct mxser_port *info = tty->driver_data;
1960 unsigned long flags;
1961
1962 spin_lock_irqsave(&info->slock, flags);
1963 mxser_change_speed(tty, old_termios);
1964 spin_unlock_irqrestore(&info->slock, flags);
1965
1966 if ((old_termios->c_cflag & CRTSCTS) &&
1967 !(tty->termios->c_cflag & CRTSCTS)) {
1968 tty->hw_stopped = 0;
1969 mxser_start(tty);
1970 }
1971
1972 /* Handle sw stopped */
1973 if ((old_termios->c_iflag & IXON) &&
1974 !(tty->termios->c_iflag & IXON)) {
1975 tty->stopped = 0;
1976
1977 if (info->board->chip_flag) {
1978 spin_lock_irqsave(&info->slock, flags);
1979 mxser_disable_must_rx_software_flow_control(
1980 info->ioaddr);
1981 spin_unlock_irqrestore(&info->slock, flags);
1982 }
1983
1984 mxser_start(tty);
1985 }
1986 }
1987
1988 /*
1989 * mxser_wait_until_sent() --- wait until the transmitter is empty
1990 */
1991 static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
1992 {
1993 struct mxser_port *info = tty->driver_data;
1994 unsigned long orig_jiffies, char_time;
1995 int lsr;
1996
1997 if (info->type == PORT_UNKNOWN)
1998 return;
1999
2000 if (info->xmit_fifo_size == 0)
2001 return; /* Just in case.... */
2002
2003 orig_jiffies = jiffies;
2004 /*
2005 * Set the check interval to be 1/5 of the estimated time to
2006 * send a single character, and make it at least 1. The check
2007 * interval should also be less than the timeout.
2008 *
2009 * Note: we have to use pretty tight timings here to satisfy
2010 * the NIST-PCTS.
2011 */
2012 char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
2013 char_time = char_time / 5;
2014 if (char_time == 0)
2015 char_time = 1;
2016 if (timeout && timeout < char_time)
2017 char_time = timeout;
2018 /*
2019 * If the transmitter hasn't cleared in twice the approximate
2020 * amount of time to send the entire FIFO, it probably won't
2021 * ever clear. This assumes the UART isn't doing flow
2022 * control, which is currently the case. Hence, if it ever
2023 * takes longer than info->timeout, this is probably due to a
2024 * UART bug of some kind. So, we clamp the timeout parameter at
2025 * 2*info->timeout.
2026 */
2027 if (!timeout || timeout > 2 * info->timeout)
2028 timeout = 2 * info->timeout;
2029 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2030 printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...",
2031 timeout, char_time);
2032 printk("jiff=%lu...", jiffies);
2033 #endif
2034 lock_kernel();
2035 while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) {
2036 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2037 printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
2038 #endif
2039 schedule_timeout_interruptible(char_time);
2040 if (signal_pending(current))
2041 break;
2042 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2043 break;
2044 }
2045 set_current_state(TASK_RUNNING);
2046 unlock_kernel();
2047
2048 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2049 printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
2050 #endif
2051 }
2052
2053 /*
2054 * This routine is called by tty_hangup() when a hangup is signaled.
2055 */
2056 static void mxser_hangup(struct tty_struct *tty)
2057 {
2058 struct mxser_port *info = tty->driver_data;
2059
2060 mxser_flush_buffer(tty);
2061 mxser_shutdown(tty);
2062 tty_port_hangup(&info->port);
2063 }
2064
2065 /*
2066 * mxser_rs_break() --- routine which turns the break handling on or off
2067 */
2068 static int mxser_rs_break(struct tty_struct *tty, int break_state)
2069 {
2070 struct mxser_port *info = tty->driver_data;
2071 unsigned long flags;
2072
2073 spin_lock_irqsave(&info->slock, flags);
2074 if (break_state == -1)
2075 outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,
2076 info->ioaddr + UART_LCR);
2077 else
2078 outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,
2079 info->ioaddr + UART_LCR);
2080 spin_unlock_irqrestore(&info->slock, flags);
2081 return 0;
2082 }
2083
2084 static void mxser_receive_chars(struct tty_struct *tty,
2085 struct mxser_port *port, int *status)
2086 {
2087 unsigned char ch, gdl;
2088 int ignored = 0;
2089 int cnt = 0;
2090 int recv_room;
2091 int max = 256;
2092
2093 recv_room = tty->receive_room;
2094 if (recv_room == 0 && !port->ldisc_stop_rx)
2095 mxser_stoprx(tty);
2096 if (port->board->chip_flag != MOXA_OTHER_UART) {
2097
2098 if (*status & UART_LSR_SPECIAL)
2099 goto intr_old;
2100 if (port->board->chip_flag == MOXA_MUST_MU860_HWID &&
2101 (*status & MOXA_MUST_LSR_RERR))
2102 goto intr_old;
2103 if (*status & MOXA_MUST_LSR_RERR)
2104 goto intr_old;
2105
2106 gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER);
2107
2108 if (port->board->chip_flag == MOXA_MUST_MU150_HWID)
2109 gdl &= MOXA_MUST_GDL_MASK;
2110 if (gdl >= recv_room) {
2111 if (!port->ldisc_stop_rx)
2112 mxser_stoprx(tty);
2113 }
2114 while (gdl--) {
2115 ch = inb(port->ioaddr + UART_RX);
2116 tty_insert_flip_char(tty, ch, 0);
2117 cnt++;
2118 }
2119 goto end_intr;
2120 }
2121 intr_old:
2122
2123 do {
2124 if (max-- < 0)
2125 break;
2126
2127 ch = inb(port->ioaddr + UART_RX);
2128 if (port->board->chip_flag && (*status & UART_LSR_OE))
2129 outb(0x23, port->ioaddr + UART_FCR);
2130 *status &= port->read_status_mask;
2131 if (*status & port->ignore_status_mask) {
2132 if (++ignored > 100)
2133 break;
2134 } else {
2135 char flag = 0;
2136 if (*status & UART_LSR_SPECIAL) {
2137 if (*status & UART_LSR_BI) {
2138 flag = TTY_BREAK;
2139 port->icount.brk++;
2140
2141 if (port->port.flags & ASYNC_SAK)
2142 do_SAK(tty);
2143 } else if (*status & UART_LSR_PE) {
2144 flag = TTY_PARITY;
2145 port->icount.parity++;
2146 } else if (*status & UART_LSR_FE) {
2147 flag = TTY_FRAME;
2148 port->icount.frame++;
2149 } else if (*status & UART_LSR_OE) {
2150 flag = TTY_OVERRUN;
2151 port->icount.overrun++;
2152 } else
2153 flag = TTY_BREAK;
2154 }
2155 tty_insert_flip_char(tty, ch, flag);
2156 cnt++;
2157 if (cnt >= recv_room) {
2158 if (!port->ldisc_stop_rx)
2159 mxser_stoprx(tty);
2160 break;
2161 }
2162
2163 }
2164
2165 if (port->board->chip_flag)
2166 break;
2167
2168 *status = inb(port->ioaddr + UART_LSR);
2169 } while (*status & UART_LSR_DR);
2170
2171 end_intr:
2172 mxvar_log.rxcnt[tty->index] += cnt;
2173 port->mon_data.rxcnt += cnt;
2174 port->mon_data.up_rxcnt += cnt;
2175
2176 /*
2177 * We are called from an interrupt context with &port->slock
2178 * being held. Drop it temporarily in order to prevent
2179 * recursive locking.
2180 */
2181 spin_unlock(&port->slock);
2182 tty_flip_buffer_push(tty);
2183 spin_lock(&port->slock);
2184 }
2185
2186 static void mxser_transmit_chars(struct tty_struct *tty, struct mxser_port *port)
2187 {
2188 int count, cnt;
2189
2190 if (port->x_char) {
2191 outb(port->x_char, port->ioaddr + UART_TX);
2192 port->x_char = 0;
2193 mxvar_log.txcnt[tty->index]++;
2194 port->mon_data.txcnt++;
2195 port->mon_data.up_txcnt++;
2196 port->icount.tx++;
2197 return;
2198 }
2199
2200 if (port->port.xmit_buf == NULL)
2201 return;
2202
2203 if (port->xmit_cnt <= 0 || tty->stopped ||
2204 (tty->hw_stopped &&
2205 (port->type != PORT_16550A) &&
2206 (!port->board->chip_flag))) {
2207 port->IER &= ~UART_IER_THRI;
2208 outb(port->IER, port->ioaddr + UART_IER);
2209 return;
2210 }
2211
2212 cnt = port->xmit_cnt;
2213 count = port->xmit_fifo_size;
2214 do {
2215 outb(port->port.xmit_buf[port->xmit_tail++],
2216 port->ioaddr + UART_TX);
2217 port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1);
2218 if (--port->xmit_cnt <= 0)
2219 break;
2220 } while (--count > 0);
2221 mxvar_log.txcnt[tty->index] += (cnt - port->xmit_cnt);
2222
2223 port->mon_data.txcnt += (cnt - port->xmit_cnt);
2224 port->mon_data.up_txcnt += (cnt - port->xmit_cnt);
2225 port->icount.tx += (cnt - port->xmit_cnt);
2226
2227 if (port->xmit_cnt < WAKEUP_CHARS && tty)
2228 tty_wakeup(tty);
2229
2230 if (port->xmit_cnt <= 0) {
2231 port->IER &= ~UART_IER_THRI;
2232 outb(port->IER, port->ioaddr + UART_IER);
2233 }
2234 }
2235
2236 /*
2237 * This is the serial driver's generic interrupt routine
2238 */
2239 static irqreturn_t mxser_interrupt(int irq, void *dev_id)
2240 {
2241 int status, iir, i;
2242 struct mxser_board *brd = NULL;
2243 struct mxser_port *port;
2244 int max, irqbits, bits, msr;
2245 unsigned int int_cnt, pass_counter = 0;
2246 int handled = IRQ_NONE;
2247 struct tty_struct *tty;
2248
2249 for (i = 0; i < MXSER_BOARDS; i++)
2250 if (dev_id == &mxser_boards[i]) {
2251 brd = dev_id;
2252 break;
2253 }
2254
2255 if (i == MXSER_BOARDS)
2256 goto irq_stop;
2257 if (brd == NULL)
2258 goto irq_stop;
2259 max = brd->info->nports;
2260 while (pass_counter++ < MXSER_ISR_PASS_LIMIT) {
2261 irqbits = inb(brd->vector) & brd->vector_mask;
2262 if (irqbits == brd->vector_mask)
2263 break;
2264
2265 handled = IRQ_HANDLED;
2266 for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
2267 if (irqbits == brd->vector_mask)
2268 break;
2269 if (bits & irqbits)
2270 continue;
2271 port = &brd->ports[i];
2272
2273 int_cnt = 0;
2274 spin_lock(&port->slock);
2275 do {
2276 iir = inb(port->ioaddr + UART_IIR);
2277 if (iir & UART_IIR_NO_INT)
2278 break;
2279 iir &= MOXA_MUST_IIR_MASK;
2280 tty = tty_port_tty_get(&port->port);
2281 if (!tty ||
2282 (port->port.flags & ASYNC_CLOSING) ||
2283 !(port->port.flags &
2284 ASYNC_INITIALIZED)) {
2285 status = inb(port->ioaddr + UART_LSR);
2286 outb(0x27, port->ioaddr + UART_FCR);
2287 inb(port->ioaddr + UART_MSR);
2288 tty_kref_put(tty);
2289 break;
2290 }
2291
2292 status = inb(port->ioaddr + UART_LSR);
2293
2294 if (status & UART_LSR_PE)
2295 port->err_shadow |= NPPI_NOTIFY_PARITY;
2296 if (status & UART_LSR_FE)
2297 port->err_shadow |= NPPI_NOTIFY_FRAMING;
2298 if (status & UART_LSR_OE)
2299 port->err_shadow |=
2300 NPPI_NOTIFY_HW_OVERRUN;
2301 if (status & UART_LSR_BI)
2302 port->err_shadow |= NPPI_NOTIFY_BREAK;
2303
2304 if (port->board->chip_flag) {
2305 if (iir == MOXA_MUST_IIR_GDA ||
2306 iir == MOXA_MUST_IIR_RDA ||
2307 iir == MOXA_MUST_IIR_RTO ||
2308 iir == MOXA_MUST_IIR_LSR)
2309 mxser_receive_chars(tty, port,
2310 &status);
2311
2312 } else {
2313 status &= port->read_status_mask;
2314 if (status & UART_LSR_DR)
2315 mxser_receive_chars(tty, port,
2316 &status);
2317 }
2318 msr = inb(port->ioaddr + UART_MSR);
2319 if (msr & UART_MSR_ANY_DELTA)
2320 mxser_check_modem_status(tty, port, msr);
2321
2322 if (port->board->chip_flag) {
2323 if (iir == 0x02 && (status &
2324 UART_LSR_THRE))
2325 mxser_transmit_chars(tty, port);
2326 } else {
2327 if (status & UART_LSR_THRE)
2328 mxser_transmit_chars(tty, port);
2329 }
2330 tty_kref_put(tty);
2331 } while (int_cnt++ < MXSER_ISR_PASS_LIMIT);
2332 spin_unlock(&port->slock);
2333 }
2334 }
2335
2336 irq_stop:
2337 return handled;
2338 }
2339
2340 static const struct tty_operations mxser_ops = {
2341 .open = mxser_open,
2342 .close = mxser_close,
2343 .write = mxser_write,
2344 .put_char = mxser_put_char,
2345 .flush_chars = mxser_flush_chars,
2346 .write_room = mxser_write_room,
2347 .chars_in_buffer = mxser_chars_in_buffer,
2348 .flush_buffer = mxser_flush_buffer,
2349 .ioctl = mxser_ioctl,
2350 .throttle = mxser_throttle,
2351 .unthrottle = mxser_unthrottle,
2352 .set_termios = mxser_set_termios,
2353 .stop = mxser_stop,
2354 .start = mxser_start,
2355 .hangup = mxser_hangup,
2356 .break_ctl = mxser_rs_break,
2357 .wait_until_sent = mxser_wait_until_sent,
2358 .tiocmget = mxser_tiocmget,
2359 .tiocmset = mxser_tiocmset,
2360 };
2361
2362 struct tty_port_operations mxser_port_ops = {
2363 .carrier_raised = mxser_carrier_raised,
2364 .dtr_rts = mxser_dtr_rts,
2365 };
2366
2367 /*
2368 * The MOXA Smartio/Industio serial driver boot-time initialization code!
2369 */
2370
2371 static void mxser_release_res(struct mxser_board *brd, struct pci_dev *pdev,
2372 unsigned int irq)
2373 {
2374 if (irq)
2375 free_irq(brd->irq, brd);
2376 if (pdev != NULL) { /* PCI */
2377 #ifdef CONFIG_PCI
2378 pci_release_region(pdev, 2);
2379 pci_release_region(pdev, 3);
2380 #endif
2381 } else {
2382 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
2383 release_region(brd->vector, 1);
2384 }
2385 }
2386
2387 static int __devinit mxser_initbrd(struct mxser_board *brd,
2388 struct pci_dev *pdev)
2389 {
2390 struct mxser_port *info;
2391 unsigned int i;
2392 int retval;
2393
2394 printk(KERN_INFO "mxser: max. baud rate = %d bps\n",
2395 brd->ports[0].max_baud);
2396
2397 for (i = 0; i < brd->info->nports; i++) {
2398 info = &brd->ports[i];
2399 tty_port_init(&info->port);
2400 info->port.ops = &mxser_port_ops;
2401 info->board = brd;
2402 info->stop_rx = 0;
2403 info->ldisc_stop_rx = 0;
2404
2405 /* Enhance mode enabled here */
2406 if (brd->chip_flag != MOXA_OTHER_UART)
2407 mxser_enable_must_enchance_mode(info->ioaddr);
2408
2409 info->port.flags = ASYNC_SHARE_IRQ;
2410 info->type = brd->uart_type;
2411
2412 process_txrx_fifo(info);
2413
2414 info->custom_divisor = info->baud_base * 16;
2415 info->port.close_delay = 5 * HZ / 10;
2416 info->port.closing_wait = 30 * HZ;
2417 info->normal_termios = mxvar_sdriver->init_termios;
2418 memset(&info->mon_data, 0, sizeof(struct mxser_mon));
2419 info->err_shadow = 0;
2420 spin_lock_init(&info->slock);
2421
2422 /* before set INT ISR, disable all int */
2423 outb(inb(info->ioaddr + UART_IER) & 0xf0,
2424 info->ioaddr + UART_IER);
2425 }
2426
2427 retval = request_irq(brd->irq, mxser_interrupt, IRQF_SHARED, "mxser",
2428 brd);
2429 if (retval) {
2430 printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may "
2431 "conflict with another device.\n",
2432 brd->info->name, brd->irq);
2433 /* We hold resources, we need to release them. */
2434 mxser_release_res(brd, pdev, 0);
2435 }
2436 return retval;
2437 }
2438
2439 static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd)
2440 {
2441 int id, i, bits;
2442 unsigned short regs[16], irq;
2443 unsigned char scratch, scratch2;
2444
2445 brd->chip_flag = MOXA_OTHER_UART;
2446
2447 id = mxser_read_register(cap, regs);
2448 switch (id) {
2449 case C168_ASIC_ID:
2450 brd->info = &mxser_cards[0];
2451 break;
2452 case C104_ASIC_ID:
2453 brd->info = &mxser_cards[1];
2454 break;
2455 case CI104J_ASIC_ID:
2456 brd->info = &mxser_cards[2];
2457 break;
2458 case C102_ASIC_ID:
2459 brd->info = &mxser_cards[5];
2460 break;
2461 case CI132_ASIC_ID:
2462 brd->info = &mxser_cards[6];
2463 break;
2464 case CI134_ASIC_ID:
2465 brd->info = &mxser_cards[7];
2466 break;
2467 default:
2468 return 0;
2469 }
2470
2471 irq = 0;
2472 /* some ISA cards have 2 ports, but we want to see them as 4-port (why?)
2473 Flag-hack checks if configuration should be read as 2-port here. */
2474 if (brd->info->nports == 2 || (brd->info->flags & MXSER_HAS2)) {
2475 irq = regs[9] & 0xF000;
2476 irq = irq | (irq >> 4);
2477 if (irq != (regs[9] & 0xFF00))
2478 goto err_irqconflict;
2479 } else if (brd->info->nports == 4) {
2480 irq = regs[9] & 0xF000;
2481 irq = irq | (irq >> 4);
2482 irq = irq | (irq >> 8);
2483 if (irq != regs[9])
2484 goto err_irqconflict;
2485 } else if (brd->info->nports == 8) {
2486 irq = regs[9] & 0xF000;
2487 irq = irq | (irq >> 4);
2488 irq = irq | (irq >> 8);
2489 if ((irq != regs[9]) || (irq != regs[10]))
2490 goto err_irqconflict;
2491 }
2492
2493 if (!irq) {
2494 printk(KERN_ERR "mxser: interrupt number unset\n");
2495 return -EIO;
2496 }
2497 brd->irq = ((int)(irq & 0xF000) >> 12);
2498 for (i = 0; i < 8; i++)
2499 brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8;
2500 if ((regs[12] & 0x80) == 0) {
2501 printk(KERN_ERR "mxser: invalid interrupt vector\n");
2502 return -EIO;
2503 }
2504 brd->vector = (int)regs[11]; /* interrupt vector */
2505 if (id == 1)
2506 brd->vector_mask = 0x00FF;
2507 else
2508 brd->vector_mask = 0x000F;
2509 for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
2510 if (regs[12] & bits) {
2511 brd->ports[i].baud_base = 921600;
2512 brd->ports[i].max_baud = 921600;
2513 } else {
2514 brd->ports[i].baud_base = 115200;
2515 brd->ports[i].max_baud = 115200;
2516 }
2517 }
2518 scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
2519 outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
2520 outb(0, cap + UART_EFR); /* EFR is the same as FCR */
2521 outb(scratch2, cap + UART_LCR);
2522 outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
2523 scratch = inb(cap + UART_IIR);
2524
2525 if (scratch & 0xC0)
2526 brd->uart_type = PORT_16550A;
2527 else
2528 brd->uart_type = PORT_16450;
2529 if (!request_region(brd->ports[0].ioaddr, 8 * brd->info->nports,
2530 "mxser(IO)")) {
2531 printk(KERN_ERR "mxser: can't request ports I/O region: "
2532 "0x%.8lx-0x%.8lx\n",
2533 brd->ports[0].ioaddr, brd->ports[0].ioaddr +
2534 8 * brd->info->nports - 1);
2535 return -EIO;
2536 }
2537 if (!request_region(brd->vector, 1, "mxser(vector)")) {
2538 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
2539 printk(KERN_ERR "mxser: can't request interrupt vector region: "
2540 "0x%.8lx-0x%.8lx\n",
2541 brd->ports[0].ioaddr, brd->ports[0].ioaddr +
2542 8 * brd->info->nports - 1);
2543 return -EIO;
2544 }
2545 return brd->info->nports;
2546
2547 err_irqconflict:
2548 printk(KERN_ERR "mxser: invalid interrupt number\n");
2549 return -EIO;
2550 }
2551
2552 static int __devinit mxser_probe(struct pci_dev *pdev,
2553 const struct pci_device_id *ent)
2554 {
2555 #ifdef CONFIG_PCI
2556 struct mxser_board *brd;
2557 unsigned int i, j;
2558 unsigned long ioaddress;
2559 int retval = -EINVAL;
2560
2561 for (i = 0; i < MXSER_BOARDS; i++)
2562 if (mxser_boards[i].info == NULL)
2563 break;
2564
2565 if (i >= MXSER_BOARDS) {
2566 dev_err(&pdev->dev, "too many boards found (maximum %d), board "
2567 "not configured\n", MXSER_BOARDS);
2568 goto err;
2569 }
2570
2571 brd = &mxser_boards[i];
2572 brd->idx = i * MXSER_PORTS_PER_BOARD;
2573 dev_info(&pdev->dev, "found MOXA %s board (BusNo=%d, DevNo=%d)\n",
2574 mxser_cards[ent->driver_data].name,
2575 pdev->bus->number, PCI_SLOT(pdev->devfn));
2576
2577 retval = pci_enable_device(pdev);
2578 if (retval) {
2579 dev_err(&pdev->dev, "PCI enable failed\n");
2580 goto err;
2581 }
2582
2583 /* io address */
2584 ioaddress = pci_resource_start(pdev, 2);
2585 retval = pci_request_region(pdev, 2, "mxser(IO)");
2586 if (retval)
2587 goto err;
2588
2589 brd->info = &mxser_cards[ent->driver_data];
2590 for (i = 0; i < brd->info->nports; i++)
2591 brd->ports[i].ioaddr = ioaddress + 8 * i;
2592
2593 /* vector */
2594 ioaddress = pci_resource_start(pdev, 3);
2595 retval = pci_request_region(pdev, 3, "mxser(vector)");
2596 if (retval)
2597 goto err_relio;
2598 brd->vector = ioaddress;
2599
2600 /* irq */
2601 brd->irq = pdev->irq;
2602
2603 brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr);
2604 brd->uart_type = PORT_16550A;
2605 brd->vector_mask = 0;
2606
2607 for (i = 0; i < brd->info->nports; i++) {
2608 for (j = 0; j < UART_INFO_NUM; j++) {
2609 if (Gpci_uart_info[j].type == brd->chip_flag) {
2610 brd->ports[i].max_baud =
2611 Gpci_uart_info[j].max_baud;
2612
2613 /* exception....CP-102 */
2614 if (brd->info->flags & MXSER_HIGHBAUD)
2615 brd->ports[i].max_baud = 921600;
2616 break;
2617 }
2618 }
2619 }
2620
2621 if (brd->chip_flag == MOXA_MUST_MU860_HWID) {
2622 for (i = 0; i < brd->info->nports; i++) {
2623 if (i < 4)
2624 brd->ports[i].opmode_ioaddr = ioaddress + 4;
2625 else
2626 brd->ports[i].opmode_ioaddr = ioaddress + 0x0c;
2627 }
2628 outb(0, ioaddress + 4); /* default set to RS232 mode */
2629 outb(0, ioaddress + 0x0c); /* default set to RS232 mode */
2630 }
2631
2632 for (i = 0; i < brd->info->nports; i++) {
2633 brd->vector_mask |= (1 << i);
2634 brd->ports[i].baud_base = 921600;
2635 }
2636
2637 /* mxser_initbrd will hook ISR. */
2638 retval = mxser_initbrd(brd, pdev);
2639 if (retval)
2640 goto err_null;
2641
2642 for (i = 0; i < brd->info->nports; i++)
2643 tty_register_device(mxvar_sdriver, brd->idx + i, &pdev->dev);
2644
2645 pci_set_drvdata(pdev, brd);
2646
2647 return 0;
2648 err_relio:
2649 pci_release_region(pdev, 2);
2650 err_null:
2651 brd->info = NULL;
2652 err:
2653 return retval;
2654 #else
2655 return -ENODEV;
2656 #endif
2657 }
2658
2659 static void __devexit mxser_remove(struct pci_dev *pdev)
2660 {
2661 struct mxser_board *brd = pci_get_drvdata(pdev);
2662 unsigned int i;
2663
2664 for (i = 0; i < brd->info->nports; i++)
2665 tty_unregister_device(mxvar_sdriver, brd->idx + i);
2666
2667 mxser_release_res(brd, pdev, 1);
2668 brd->info = NULL;
2669 }
2670
2671 static struct pci_driver mxser_driver = {
2672 .name = "mxser",
2673 .id_table = mxser_pcibrds,
2674 .probe = mxser_probe,
2675 .remove = __devexit_p(mxser_remove)
2676 };
2677
2678 static int __init mxser_module_init(void)
2679 {
2680 struct mxser_board *brd;
2681 unsigned int b, i, m;
2682 int retval;
2683
2684 mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
2685 if (!mxvar_sdriver)
2686 return -ENOMEM;
2687
2688 printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n",
2689 MXSER_VERSION);
2690
2691 /* Initialize the tty_driver structure */
2692 mxvar_sdriver->owner = THIS_MODULE;
2693 mxvar_sdriver->magic = TTY_DRIVER_MAGIC;
2694 mxvar_sdriver->name = "ttyMI";
2695 mxvar_sdriver->major = ttymajor;
2696 mxvar_sdriver->minor_start = 0;
2697 mxvar_sdriver->num = MXSER_PORTS + 1;
2698 mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
2699 mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
2700 mxvar_sdriver->init_termios = tty_std_termios;
2701 mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
2702 mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV;
2703 tty_set_operations(mxvar_sdriver, &mxser_ops);
2704
2705 retval = tty_register_driver(mxvar_sdriver);
2706 if (retval) {
2707 printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family "
2708 "tty driver !\n");
2709 goto err_put;
2710 }
2711
2712 /* Start finding ISA boards here */
2713 for (m = 0, b = 0; b < MXSER_BOARDS; b++) {
2714 if (!ioaddr[b])
2715 continue;
2716
2717 brd = &mxser_boards[m];
2718 retval = mxser_get_ISA_conf(ioaddr[b], brd);
2719 if (retval <= 0) {
2720 brd->info = NULL;
2721 continue;
2722 }
2723
2724 printk(KERN_INFO "mxser: found MOXA %s board (CAP=0x%lx)\n",
2725 brd->info->name, ioaddr[b]);
2726
2727 /* mxser_initbrd will hook ISR. */
2728 if (mxser_initbrd(brd, NULL) < 0) {
2729 brd->info = NULL;
2730 continue;
2731 }
2732
2733 brd->idx = m * MXSER_PORTS_PER_BOARD;
2734 for (i = 0; i < brd->info->nports; i++)
2735 tty_register_device(mxvar_sdriver, brd->idx + i, NULL);
2736
2737 m++;
2738 }
2739
2740 retval = pci_register_driver(&mxser_driver);
2741 if (retval) {
2742 printk(KERN_ERR "mxser: can't register pci driver\n");
2743 if (!m) {
2744 retval = -ENODEV;
2745 goto err_unr;
2746 } /* else: we have some ISA cards under control */
2747 }
2748
2749 return 0;
2750 err_unr:
2751 tty_unregister_driver(mxvar_sdriver);
2752 err_put:
2753 put_tty_driver(mxvar_sdriver);
2754 return retval;
2755 }
2756
2757 static void __exit mxser_module_exit(void)
2758 {
2759 unsigned int i, j;
2760
2761 pci_unregister_driver(&mxser_driver);
2762
2763 for (i = 0; i < MXSER_BOARDS; i++) /* ISA remains */
2764 if (mxser_boards[i].info != NULL)
2765 for (j = 0; j < mxser_boards[i].info->nports; j++)
2766 tty_unregister_device(mxvar_sdriver,
2767 mxser_boards[i].idx + j);
2768 tty_unregister_driver(mxvar_sdriver);
2769 put_tty_driver(mxvar_sdriver);
2770
2771 for (i = 0; i < MXSER_BOARDS; i++)
2772 if (mxser_boards[i].info != NULL)
2773 mxser_release_res(&mxser_boards[i], NULL, 1);
2774 }
2775
2776 module_init(mxser_module_init);
2777 module_exit(mxser_module_exit);
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