mm-only debug patch...
[mmotm.git] / drivers / dma / dmaengine.c
blob51d7480d3a92d537abe018d44b830f2318bc5bdf
1 /*
2 * Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the Free
6 * Software Foundation; either version 2 of the License, or (at your option)
7 * any later version.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc., 59
16 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
18 * The full GNU General Public License is included in this distribution in the
19 * file called COPYING.
23 * This code implements the DMA subsystem. It provides a HW-neutral interface
24 * for other kernel code to use asynchronous memory copy capabilities,
25 * if present, and allows different HW DMA drivers to register as providing
26 * this capability.
28 * Due to the fact we are accelerating what is already a relatively fast
29 * operation, the code goes to great lengths to avoid additional overhead,
30 * such as locking.
32 * LOCKING:
34 * The subsystem keeps a global list of dma_device structs it is protected by a
35 * mutex, dma_list_mutex.
37 * A subsystem can get access to a channel by calling dmaengine_get() followed
38 * by dma_find_channel(), or if it has need for an exclusive channel it can call
39 * dma_request_channel(). Once a channel is allocated a reference is taken
40 * against its corresponding driver to disable removal.
42 * Each device has a channels list, which runs unlocked but is never modified
43 * once the device is registered, it's just setup by the driver.
45 * See Documentation/dmaengine.txt for more details
48 #include <linux/init.h>
49 #include <linux/module.h>
50 #include <linux/mm.h>
51 #include <linux/device.h>
52 #include <linux/dmaengine.h>
53 #include <linux/hardirq.h>
54 #include <linux/spinlock.h>
55 #include <linux/percpu.h>
56 #include <linux/rcupdate.h>
57 #include <linux/mutex.h>
58 #include <linux/jiffies.h>
59 #include <linux/rculist.h>
60 #include <linux/idr.h>
62 static DEFINE_MUTEX(dma_list_mutex);
63 static LIST_HEAD(dma_device_list);
64 static long dmaengine_ref_count;
65 static struct idr dma_idr;
67 /* --- sysfs implementation --- */
69 /**
70 * dev_to_dma_chan - convert a device pointer to the its sysfs container object
71 * @dev - device node
73 * Must be called under dma_list_mutex
75 static struct dma_chan *dev_to_dma_chan(struct device *dev)
77 struct dma_chan_dev *chan_dev;
79 chan_dev = container_of(dev, typeof(*chan_dev), device);
80 return chan_dev->chan;
83 static ssize_t show_memcpy_count(struct device *dev, struct device_attribute *attr, char *buf)
85 struct dma_chan *chan;
86 unsigned long count = 0;
87 int i;
88 int err;
90 mutex_lock(&dma_list_mutex);
91 chan = dev_to_dma_chan(dev);
92 if (chan) {
93 for_each_possible_cpu(i)
94 count += per_cpu_ptr(chan->local, i)->memcpy_count;
95 err = sprintf(buf, "%lu\n", count);
96 } else
97 err = -ENODEV;
98 mutex_unlock(&dma_list_mutex);
100 return err;
103 static ssize_t show_bytes_transferred(struct device *dev, struct device_attribute *attr,
104 char *buf)
106 struct dma_chan *chan;
107 unsigned long count = 0;
108 int i;
109 int err;
111 mutex_lock(&dma_list_mutex);
112 chan = dev_to_dma_chan(dev);
113 if (chan) {
114 for_each_possible_cpu(i)
115 count += per_cpu_ptr(chan->local, i)->bytes_transferred;
116 err = sprintf(buf, "%lu\n", count);
117 } else
118 err = -ENODEV;
119 mutex_unlock(&dma_list_mutex);
121 return err;
124 static ssize_t show_in_use(struct device *dev, struct device_attribute *attr, char *buf)
126 struct dma_chan *chan;
127 int err;
129 mutex_lock(&dma_list_mutex);
130 chan = dev_to_dma_chan(dev);
131 if (chan)
132 err = sprintf(buf, "%d\n", chan->client_count);
133 else
134 err = -ENODEV;
135 mutex_unlock(&dma_list_mutex);
137 return err;
140 static struct device_attribute dma_attrs[] = {
141 __ATTR(memcpy_count, S_IRUGO, show_memcpy_count, NULL),
142 __ATTR(bytes_transferred, S_IRUGO, show_bytes_transferred, NULL),
143 __ATTR(in_use, S_IRUGO, show_in_use, NULL),
144 __ATTR_NULL
147 static void chan_dev_release(struct device *dev)
149 struct dma_chan_dev *chan_dev;
151 chan_dev = container_of(dev, typeof(*chan_dev), device);
152 if (atomic_dec_and_test(chan_dev->idr_ref)) {
153 mutex_lock(&dma_list_mutex);
154 idr_remove(&dma_idr, chan_dev->dev_id);
155 mutex_unlock(&dma_list_mutex);
156 kfree(chan_dev->idr_ref);
158 kfree(chan_dev);
161 static struct class dma_devclass = {
162 .name = "dma",
163 .dev_attrs = dma_attrs,
164 .dev_release = chan_dev_release,
167 /* --- client and device registration --- */
169 #define dma_device_satisfies_mask(device, mask) \
170 __dma_device_satisfies_mask((device), &(mask))
171 static int
172 __dma_device_satisfies_mask(struct dma_device *device, dma_cap_mask_t *want)
174 dma_cap_mask_t has;
176 bitmap_and(has.bits, want->bits, device->cap_mask.bits,
177 DMA_TX_TYPE_END);
178 return bitmap_equal(want->bits, has.bits, DMA_TX_TYPE_END);
181 static struct module *dma_chan_to_owner(struct dma_chan *chan)
183 return chan->device->dev->driver->owner;
187 * balance_ref_count - catch up the channel reference count
188 * @chan - channel to balance ->client_count versus dmaengine_ref_count
190 * balance_ref_count must be called under dma_list_mutex
192 static void balance_ref_count(struct dma_chan *chan)
194 struct module *owner = dma_chan_to_owner(chan);
196 while (chan->client_count < dmaengine_ref_count) {
197 __module_get(owner);
198 chan->client_count++;
203 * dma_chan_get - try to grab a dma channel's parent driver module
204 * @chan - channel to grab
206 * Must be called under dma_list_mutex
208 static int dma_chan_get(struct dma_chan *chan)
210 int err = -ENODEV;
211 struct module *owner = dma_chan_to_owner(chan);
213 if (chan->client_count) {
214 __module_get(owner);
215 err = 0;
216 } else if (try_module_get(owner))
217 err = 0;
219 if (err == 0)
220 chan->client_count++;
222 /* allocate upon first client reference */
223 if (chan->client_count == 1 && err == 0) {
224 int desc_cnt = chan->device->device_alloc_chan_resources(chan);
226 if (desc_cnt < 0) {
227 err = desc_cnt;
228 chan->client_count = 0;
229 module_put(owner);
230 } else if (!dma_has_cap(DMA_PRIVATE, chan->device->cap_mask))
231 balance_ref_count(chan);
234 return err;
238 * dma_chan_put - drop a reference to a dma channel's parent driver module
239 * @chan - channel to release
241 * Must be called under dma_list_mutex
243 static void dma_chan_put(struct dma_chan *chan)
245 if (!chan->client_count)
246 return; /* this channel failed alloc_chan_resources */
247 chan->client_count--;
248 module_put(dma_chan_to_owner(chan));
249 if (chan->client_count == 0)
250 chan->device->device_free_chan_resources(chan);
253 enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie)
255 enum dma_status status;
256 unsigned long dma_sync_wait_timeout = jiffies + msecs_to_jiffies(5000);
258 dma_async_issue_pending(chan);
259 do {
260 status = dma_async_is_tx_complete(chan, cookie, NULL, NULL);
261 if (time_after_eq(jiffies, dma_sync_wait_timeout)) {
262 printk(KERN_ERR "dma_sync_wait_timeout!\n");
263 return DMA_ERROR;
265 } while (status == DMA_IN_PROGRESS);
267 return status;
269 EXPORT_SYMBOL(dma_sync_wait);
272 * dma_cap_mask_all - enable iteration over all operation types
274 static dma_cap_mask_t dma_cap_mask_all;
277 * dma_chan_tbl_ent - tracks channel allocations per core/operation
278 * @chan - associated channel for this entry
280 struct dma_chan_tbl_ent {
281 struct dma_chan *chan;
285 * channel_table - percpu lookup table for memory-to-memory offload providers
287 static struct dma_chan_tbl_ent *channel_table[DMA_TX_TYPE_END];
289 static int __init dma_channel_table_init(void)
291 enum dma_transaction_type cap;
292 int err = 0;
294 bitmap_fill(dma_cap_mask_all.bits, DMA_TX_TYPE_END);
296 /* 'interrupt', 'private', and 'slave' are channel capabilities,
297 * but are not associated with an operation so they do not need
298 * an entry in the channel_table
300 clear_bit(DMA_INTERRUPT, dma_cap_mask_all.bits);
301 clear_bit(DMA_PRIVATE, dma_cap_mask_all.bits);
302 clear_bit(DMA_SLAVE, dma_cap_mask_all.bits);
304 for_each_dma_cap_mask(cap, dma_cap_mask_all) {
305 channel_table[cap] = alloc_percpu(struct dma_chan_tbl_ent);
306 if (!channel_table[cap]) {
307 err = -ENOMEM;
308 break;
312 if (err) {
313 pr_err("dmaengine: initialization failure\n");
314 for_each_dma_cap_mask(cap, dma_cap_mask_all)
315 if (channel_table[cap])
316 free_percpu(channel_table[cap]);
319 return err;
321 arch_initcall(dma_channel_table_init);
324 * dma_find_channel - find a channel to carry out the operation
325 * @tx_type: transaction type
327 struct dma_chan *dma_find_channel(enum dma_transaction_type tx_type)
329 return this_cpu_read(channel_table[tx_type]->chan);
331 EXPORT_SYMBOL(dma_find_channel);
334 * dma_issue_pending_all - flush all pending operations across all channels
336 void dma_issue_pending_all(void)
338 struct dma_device *device;
339 struct dma_chan *chan;
341 rcu_read_lock();
342 list_for_each_entry_rcu(device, &dma_device_list, global_node) {
343 if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
344 continue;
345 list_for_each_entry(chan, &device->channels, device_node)
346 if (chan->client_count)
347 device->device_issue_pending(chan);
349 rcu_read_unlock();
351 EXPORT_SYMBOL(dma_issue_pending_all);
354 * nth_chan - returns the nth channel of the given capability
355 * @cap: capability to match
356 * @n: nth channel desired
358 * Defaults to returning the channel with the desired capability and the
359 * lowest reference count when 'n' cannot be satisfied. Must be called
360 * under dma_list_mutex.
362 static struct dma_chan *nth_chan(enum dma_transaction_type cap, int n)
364 struct dma_device *device;
365 struct dma_chan *chan;
366 struct dma_chan *ret = NULL;
367 struct dma_chan *min = NULL;
369 list_for_each_entry(device, &dma_device_list, global_node) {
370 if (!dma_has_cap(cap, device->cap_mask) ||
371 dma_has_cap(DMA_PRIVATE, device->cap_mask))
372 continue;
373 list_for_each_entry(chan, &device->channels, device_node) {
374 if (!chan->client_count)
375 continue;
376 if (!min)
377 min = chan;
378 else if (chan->table_count < min->table_count)
379 min = chan;
381 if (n-- == 0) {
382 ret = chan;
383 break; /* done */
386 if (ret)
387 break; /* done */
390 if (!ret)
391 ret = min;
393 if (ret)
394 ret->table_count++;
396 return ret;
400 * dma_channel_rebalance - redistribute the available channels
402 * Optimize for cpu isolation (each cpu gets a dedicated channel for an
403 * operation type) in the SMP case, and operation isolation (avoid
404 * multi-tasking channels) in the non-SMP case. Must be called under
405 * dma_list_mutex.
407 static void dma_channel_rebalance(void)
409 struct dma_chan *chan;
410 struct dma_device *device;
411 int cpu;
412 int cap;
413 int n;
415 /* undo the last distribution */
416 for_each_dma_cap_mask(cap, dma_cap_mask_all)
417 for_each_possible_cpu(cpu)
418 per_cpu_ptr(channel_table[cap], cpu)->chan = NULL;
420 list_for_each_entry(device, &dma_device_list, global_node) {
421 if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
422 continue;
423 list_for_each_entry(chan, &device->channels, device_node)
424 chan->table_count = 0;
427 /* don't populate the channel_table if no clients are available */
428 if (!dmaengine_ref_count)
429 return;
431 /* redistribute available channels */
432 n = 0;
433 for_each_dma_cap_mask(cap, dma_cap_mask_all)
434 for_each_online_cpu(cpu) {
435 if (num_possible_cpus() > 1)
436 chan = nth_chan(cap, n++);
437 else
438 chan = nth_chan(cap, -1);
440 per_cpu_ptr(channel_table[cap], cpu)->chan = chan;
444 static struct dma_chan *private_candidate(dma_cap_mask_t *mask, struct dma_device *dev,
445 dma_filter_fn fn, void *fn_param)
447 struct dma_chan *chan;
449 if (!__dma_device_satisfies_mask(dev, mask)) {
450 pr_debug("%s: wrong capabilities\n", __func__);
451 return NULL;
453 /* devices with multiple channels need special handling as we need to
454 * ensure that all channels are either private or public.
456 if (dev->chancnt > 1 && !dma_has_cap(DMA_PRIVATE, dev->cap_mask))
457 list_for_each_entry(chan, &dev->channels, device_node) {
458 /* some channels are already publicly allocated */
459 if (chan->client_count)
460 return NULL;
463 list_for_each_entry(chan, &dev->channels, device_node) {
464 if (chan->client_count) {
465 pr_debug("%s: %s busy\n",
466 __func__, dma_chan_name(chan));
467 continue;
469 if (fn && !fn(chan, fn_param)) {
470 pr_debug("%s: %s filter said false\n",
471 __func__, dma_chan_name(chan));
472 continue;
474 return chan;
477 return NULL;
481 * dma_request_channel - try to allocate an exclusive channel
482 * @mask: capabilities that the channel must satisfy
483 * @fn: optional callback to disposition available channels
484 * @fn_param: opaque parameter to pass to dma_filter_fn
486 struct dma_chan *__dma_request_channel(dma_cap_mask_t *mask, dma_filter_fn fn, void *fn_param)
488 struct dma_device *device, *_d;
489 struct dma_chan *chan = NULL;
490 int err;
492 /* Find a channel */
493 mutex_lock(&dma_list_mutex);
494 list_for_each_entry_safe(device, _d, &dma_device_list, global_node) {
495 chan = private_candidate(mask, device, fn, fn_param);
496 if (chan) {
497 /* Found a suitable channel, try to grab, prep, and
498 * return it. We first set DMA_PRIVATE to disable
499 * balance_ref_count as this channel will not be
500 * published in the general-purpose allocator
502 dma_cap_set(DMA_PRIVATE, device->cap_mask);
503 device->privatecnt++;
504 err = dma_chan_get(chan);
506 if (err == -ENODEV) {
507 pr_debug("%s: %s module removed\n", __func__,
508 dma_chan_name(chan));
509 list_del_rcu(&device->global_node);
510 } else if (err)
511 pr_err("dmaengine: failed to get %s: (%d)\n",
512 dma_chan_name(chan), err);
513 else
514 break;
515 if (--device->privatecnt == 0)
516 dma_cap_clear(DMA_PRIVATE, device->cap_mask);
517 chan->private = NULL;
518 chan = NULL;
521 mutex_unlock(&dma_list_mutex);
523 pr_debug("%s: %s (%s)\n", __func__, chan ? "success" : "fail",
524 chan ? dma_chan_name(chan) : NULL);
526 return chan;
528 EXPORT_SYMBOL_GPL(__dma_request_channel);
530 void dma_release_channel(struct dma_chan *chan)
532 mutex_lock(&dma_list_mutex);
533 WARN_ONCE(chan->client_count != 1,
534 "chan reference count %d != 1\n", chan->client_count);
535 dma_chan_put(chan);
536 /* drop PRIVATE cap enabled by __dma_request_channel() */
537 if (--chan->device->privatecnt == 0)
538 dma_cap_clear(DMA_PRIVATE, chan->device->cap_mask);
539 chan->private = NULL;
540 mutex_unlock(&dma_list_mutex);
542 EXPORT_SYMBOL_GPL(dma_release_channel);
545 * dmaengine_get - register interest in dma_channels
547 void dmaengine_get(void)
549 struct dma_device *device, *_d;
550 struct dma_chan *chan;
551 int err;
553 mutex_lock(&dma_list_mutex);
554 dmaengine_ref_count++;
556 /* try to grab channels */
557 list_for_each_entry_safe(device, _d, &dma_device_list, global_node) {
558 if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
559 continue;
560 list_for_each_entry(chan, &device->channels, device_node) {
561 err = dma_chan_get(chan);
562 if (err == -ENODEV) {
563 /* module removed before we could use it */
564 list_del_rcu(&device->global_node);
565 break;
566 } else if (err)
567 pr_err("dmaengine: failed to get %s: (%d)\n",
568 dma_chan_name(chan), err);
572 /* if this is the first reference and there were channels
573 * waiting we need to rebalance to get those channels
574 * incorporated into the channel table
576 if (dmaengine_ref_count == 1)
577 dma_channel_rebalance();
578 mutex_unlock(&dma_list_mutex);
580 EXPORT_SYMBOL(dmaengine_get);
583 * dmaengine_put - let dma drivers be removed when ref_count == 0
585 void dmaengine_put(void)
587 struct dma_device *device;
588 struct dma_chan *chan;
590 mutex_lock(&dma_list_mutex);
591 dmaengine_ref_count--;
592 BUG_ON(dmaengine_ref_count < 0);
593 /* drop channel references */
594 list_for_each_entry(device, &dma_device_list, global_node) {
595 if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
596 continue;
597 list_for_each_entry(chan, &device->channels, device_node)
598 dma_chan_put(chan);
600 mutex_unlock(&dma_list_mutex);
602 EXPORT_SYMBOL(dmaengine_put);
604 static bool device_has_all_tx_types(struct dma_device *device)
606 /* A device that satisfies this test has channels that will never cause
607 * an async_tx channel switch event as all possible operation types can
608 * be handled.
610 #ifdef CONFIG_ASYNC_TX_DMA
611 if (!dma_has_cap(DMA_INTERRUPT, device->cap_mask))
612 return false;
613 #endif
615 #if defined(CONFIG_ASYNC_MEMCPY) || defined(CONFIG_ASYNC_MEMCPY_MODULE)
616 if (!dma_has_cap(DMA_MEMCPY, device->cap_mask))
617 return false;
618 #endif
620 #if defined(CONFIG_ASYNC_MEMSET) || defined(CONFIG_ASYNC_MEMSET_MODULE)
621 if (!dma_has_cap(DMA_MEMSET, device->cap_mask))
622 return false;
623 #endif
625 #if defined(CONFIG_ASYNC_XOR) || defined(CONFIG_ASYNC_XOR_MODULE)
626 if (!dma_has_cap(DMA_XOR, device->cap_mask))
627 return false;
628 #endif
630 #if defined(CONFIG_ASYNC_PQ) || defined(CONFIG_ASYNC_PQ_MODULE)
631 if (!dma_has_cap(DMA_PQ, device->cap_mask))
632 return false;
633 #endif
635 return true;
638 static int get_dma_id(struct dma_device *device)
640 int rc;
642 idr_retry:
643 if (!idr_pre_get(&dma_idr, GFP_KERNEL))
644 return -ENOMEM;
645 mutex_lock(&dma_list_mutex);
646 rc = idr_get_new(&dma_idr, NULL, &device->dev_id);
647 mutex_unlock(&dma_list_mutex);
648 if (rc == -EAGAIN)
649 goto idr_retry;
650 else if (rc != 0)
651 return rc;
653 return 0;
657 * dma_async_device_register - registers DMA devices found
658 * @device: &dma_device
660 int dma_async_device_register(struct dma_device *device)
662 int chancnt = 0, rc;
663 struct dma_chan* chan;
664 atomic_t *idr_ref;
666 if (!device)
667 return -ENODEV;
669 /* validate device routines */
670 BUG_ON(dma_has_cap(DMA_MEMCPY, device->cap_mask) &&
671 !device->device_prep_dma_memcpy);
672 BUG_ON(dma_has_cap(DMA_XOR, device->cap_mask) &&
673 !device->device_prep_dma_xor);
674 BUG_ON(dma_has_cap(DMA_XOR_VAL, device->cap_mask) &&
675 !device->device_prep_dma_xor_val);
676 BUG_ON(dma_has_cap(DMA_PQ, device->cap_mask) &&
677 !device->device_prep_dma_pq);
678 BUG_ON(dma_has_cap(DMA_PQ_VAL, device->cap_mask) &&
679 !device->device_prep_dma_pq_val);
680 BUG_ON(dma_has_cap(DMA_MEMSET, device->cap_mask) &&
681 !device->device_prep_dma_memset);
682 BUG_ON(dma_has_cap(DMA_INTERRUPT, device->cap_mask) &&
683 !device->device_prep_dma_interrupt);
684 BUG_ON(dma_has_cap(DMA_SLAVE, device->cap_mask) &&
685 !device->device_prep_slave_sg);
686 BUG_ON(dma_has_cap(DMA_SLAVE, device->cap_mask) &&
687 !device->device_terminate_all);
689 BUG_ON(!device->device_alloc_chan_resources);
690 BUG_ON(!device->device_free_chan_resources);
691 BUG_ON(!device->device_is_tx_complete);
692 BUG_ON(!device->device_issue_pending);
693 BUG_ON(!device->dev);
695 /* note: this only matters in the
696 * CONFIG_ASYNC_TX_DISABLE_CHANNEL_SWITCH=y case
698 if (device_has_all_tx_types(device))
699 dma_cap_set(DMA_ASYNC_TX, device->cap_mask);
701 idr_ref = kmalloc(sizeof(*idr_ref), GFP_KERNEL);
702 if (!idr_ref)
703 return -ENOMEM;
704 rc = get_dma_id(device);
705 if (rc != 0) {
706 kfree(idr_ref);
707 return rc;
710 atomic_set(idr_ref, 0);
712 /* represent channels in sysfs. Probably want devs too */
713 list_for_each_entry(chan, &device->channels, device_node) {
714 rc = -ENOMEM;
715 chan->local = alloc_percpu(typeof(*chan->local));
716 if (chan->local == NULL)
717 goto err_out;
718 chan->dev = kzalloc(sizeof(*chan->dev), GFP_KERNEL);
719 if (chan->dev == NULL) {
720 free_percpu(chan->local);
721 chan->local = NULL;
722 goto err_out;
725 chan->chan_id = chancnt++;
726 chan->dev->device.class = &dma_devclass;
727 chan->dev->device.parent = device->dev;
728 chan->dev->chan = chan;
729 chan->dev->idr_ref = idr_ref;
730 chan->dev->dev_id = device->dev_id;
731 atomic_inc(idr_ref);
732 dev_set_name(&chan->dev->device, "dma%dchan%d",
733 device->dev_id, chan->chan_id);
735 rc = device_register(&chan->dev->device);
736 if (rc) {
737 free_percpu(chan->local);
738 chan->local = NULL;
739 kfree(chan->dev);
740 atomic_dec(idr_ref);
741 goto err_out;
743 chan->client_count = 0;
745 device->chancnt = chancnt;
747 mutex_lock(&dma_list_mutex);
748 /* take references on public channels */
749 if (dmaengine_ref_count && !dma_has_cap(DMA_PRIVATE, device->cap_mask))
750 list_for_each_entry(chan, &device->channels, device_node) {
751 /* if clients are already waiting for channels we need
752 * to take references on their behalf
754 if (dma_chan_get(chan) == -ENODEV) {
755 /* note we can only get here for the first
756 * channel as the remaining channels are
757 * guaranteed to get a reference
759 rc = -ENODEV;
760 mutex_unlock(&dma_list_mutex);
761 goto err_out;
764 list_add_tail_rcu(&device->global_node, &dma_device_list);
765 if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
766 device->privatecnt++; /* Always private */
767 dma_channel_rebalance();
768 mutex_unlock(&dma_list_mutex);
770 return 0;
772 err_out:
773 /* if we never registered a channel just release the idr */
774 if (atomic_read(idr_ref) == 0) {
775 mutex_lock(&dma_list_mutex);
776 idr_remove(&dma_idr, device->dev_id);
777 mutex_unlock(&dma_list_mutex);
778 kfree(idr_ref);
779 return rc;
782 list_for_each_entry(chan, &device->channels, device_node) {
783 if (chan->local == NULL)
784 continue;
785 mutex_lock(&dma_list_mutex);
786 chan->dev->chan = NULL;
787 mutex_unlock(&dma_list_mutex);
788 device_unregister(&chan->dev->device);
789 free_percpu(chan->local);
791 return rc;
793 EXPORT_SYMBOL(dma_async_device_register);
796 * dma_async_device_unregister - unregister a DMA device
797 * @device: &dma_device
799 * This routine is called by dma driver exit routines, dmaengine holds module
800 * references to prevent it being called while channels are in use.
802 void dma_async_device_unregister(struct dma_device *device)
804 struct dma_chan *chan;
806 mutex_lock(&dma_list_mutex);
807 list_del_rcu(&device->global_node);
808 dma_channel_rebalance();
809 mutex_unlock(&dma_list_mutex);
811 list_for_each_entry(chan, &device->channels, device_node) {
812 WARN_ONCE(chan->client_count,
813 "%s called while %d clients hold a reference\n",
814 __func__, chan->client_count);
815 mutex_lock(&dma_list_mutex);
816 chan->dev->chan = NULL;
817 mutex_unlock(&dma_list_mutex);
818 device_unregister(&chan->dev->device);
821 EXPORT_SYMBOL(dma_async_device_unregister);
824 * dma_async_memcpy_buf_to_buf - offloaded copy between virtual addresses
825 * @chan: DMA channel to offload copy to
826 * @dest: destination address (virtual)
827 * @src: source address (virtual)
828 * @len: length
830 * Both @dest and @src must be mappable to a bus address according to the
831 * DMA mapping API rules for streaming mappings.
832 * Both @dest and @src must stay memory resident (kernel memory or locked
833 * user space pages).
835 dma_cookie_t
836 dma_async_memcpy_buf_to_buf(struct dma_chan *chan, void *dest,
837 void *src, size_t len)
839 struct dma_device *dev = chan->device;
840 struct dma_async_tx_descriptor *tx;
841 dma_addr_t dma_dest, dma_src;
842 dma_cookie_t cookie;
843 unsigned long flags;
845 dma_src = dma_map_single(dev->dev, src, len, DMA_TO_DEVICE);
846 dma_dest = dma_map_single(dev->dev, dest, len, DMA_FROM_DEVICE);
847 flags = DMA_CTRL_ACK |
848 DMA_COMPL_SRC_UNMAP_SINGLE |
849 DMA_COMPL_DEST_UNMAP_SINGLE;
850 tx = dev->device_prep_dma_memcpy(chan, dma_dest, dma_src, len, flags);
852 if (!tx) {
853 dma_unmap_single(dev->dev, dma_src, len, DMA_TO_DEVICE);
854 dma_unmap_single(dev->dev, dma_dest, len, DMA_FROM_DEVICE);
855 return -ENOMEM;
858 tx->callback = NULL;
859 cookie = tx->tx_submit(tx);
861 preempt_disable();
862 __this_cpu_add(chan->local->bytes_transferred, len);
863 __this_cpu_inc(chan->local->memcpy_count);
864 preempt_enable();
866 return cookie;
868 EXPORT_SYMBOL(dma_async_memcpy_buf_to_buf);
871 * dma_async_memcpy_buf_to_pg - offloaded copy from address to page
872 * @chan: DMA channel to offload copy to
873 * @page: destination page
874 * @offset: offset in page to copy to
875 * @kdata: source address (virtual)
876 * @len: length
878 * Both @page/@offset and @kdata must be mappable to a bus address according
879 * to the DMA mapping API rules for streaming mappings.
880 * Both @page/@offset and @kdata must stay memory resident (kernel memory or
881 * locked user space pages)
883 dma_cookie_t
884 dma_async_memcpy_buf_to_pg(struct dma_chan *chan, struct page *page,
885 unsigned int offset, void *kdata, size_t len)
887 struct dma_device *dev = chan->device;
888 struct dma_async_tx_descriptor *tx;
889 dma_addr_t dma_dest, dma_src;
890 dma_cookie_t cookie;
891 unsigned long flags;
893 dma_src = dma_map_single(dev->dev, kdata, len, DMA_TO_DEVICE);
894 dma_dest = dma_map_page(dev->dev, page, offset, len, DMA_FROM_DEVICE);
895 flags = DMA_CTRL_ACK | DMA_COMPL_SRC_UNMAP_SINGLE;
896 tx = dev->device_prep_dma_memcpy(chan, dma_dest, dma_src, len, flags);
898 if (!tx) {
899 dma_unmap_single(dev->dev, dma_src, len, DMA_TO_DEVICE);
900 dma_unmap_page(dev->dev, dma_dest, len, DMA_FROM_DEVICE);
901 return -ENOMEM;
904 tx->callback = NULL;
905 cookie = tx->tx_submit(tx);
907 preempt_disable();
908 __this_cpu_add(chan->local->bytes_transferred, len);
909 __this_cpu_inc(chan->local->memcpy_count);
910 preempt_enable();
912 return cookie;
914 EXPORT_SYMBOL(dma_async_memcpy_buf_to_pg);
917 * dma_async_memcpy_pg_to_pg - offloaded copy from page to page
918 * @chan: DMA channel to offload copy to
919 * @dest_pg: destination page
920 * @dest_off: offset in page to copy to
921 * @src_pg: source page
922 * @src_off: offset in page to copy from
923 * @len: length
925 * Both @dest_page/@dest_off and @src_page/@src_off must be mappable to a bus
926 * address according to the DMA mapping API rules for streaming mappings.
927 * Both @dest_page/@dest_off and @src_page/@src_off must stay memory resident
928 * (kernel memory or locked user space pages).
930 dma_cookie_t
931 dma_async_memcpy_pg_to_pg(struct dma_chan *chan, struct page *dest_pg,
932 unsigned int dest_off, struct page *src_pg, unsigned int src_off,
933 size_t len)
935 struct dma_device *dev = chan->device;
936 struct dma_async_tx_descriptor *tx;
937 dma_addr_t dma_dest, dma_src;
938 dma_cookie_t cookie;
939 unsigned long flags;
941 dma_src = dma_map_page(dev->dev, src_pg, src_off, len, DMA_TO_DEVICE);
942 dma_dest = dma_map_page(dev->dev, dest_pg, dest_off, len,
943 DMA_FROM_DEVICE);
944 flags = DMA_CTRL_ACK;
945 tx = dev->device_prep_dma_memcpy(chan, dma_dest, dma_src, len, flags);
947 if (!tx) {
948 dma_unmap_page(dev->dev, dma_src, len, DMA_TO_DEVICE);
949 dma_unmap_page(dev->dev, dma_dest, len, DMA_FROM_DEVICE);
950 return -ENOMEM;
953 tx->callback = NULL;
954 cookie = tx->tx_submit(tx);
956 preempt_disable();
957 __this_cpu_add(chan->local->bytes_transferred, len);
958 __this_cpu_inc(chan->local->memcpy_count);
959 preempt_enable();
961 return cookie;
963 EXPORT_SYMBOL(dma_async_memcpy_pg_to_pg);
965 void dma_async_tx_descriptor_init(struct dma_async_tx_descriptor *tx,
966 struct dma_chan *chan)
968 tx->chan = chan;
969 spin_lock_init(&tx->lock);
971 EXPORT_SYMBOL(dma_async_tx_descriptor_init);
973 /* dma_wait_for_async_tx - spin wait for a transaction to complete
974 * @tx: in-flight transaction to wait on
976 enum dma_status
977 dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx)
979 unsigned long dma_sync_wait_timeout = jiffies + msecs_to_jiffies(5000);
981 if (!tx)
982 return DMA_SUCCESS;
984 while (tx->cookie == -EBUSY) {
985 if (time_after_eq(jiffies, dma_sync_wait_timeout)) {
986 pr_err("%s timeout waiting for descriptor submission\n",
987 __func__);
988 return DMA_ERROR;
990 cpu_relax();
992 return dma_sync_wait(tx->chan, tx->cookie);
994 EXPORT_SYMBOL_GPL(dma_wait_for_async_tx);
996 /* dma_run_dependencies - helper routine for dma drivers to process
997 * (start) dependent operations on their target channel
998 * @tx: transaction with dependencies
1000 void dma_run_dependencies(struct dma_async_tx_descriptor *tx)
1002 struct dma_async_tx_descriptor *dep = tx->next;
1003 struct dma_async_tx_descriptor *dep_next;
1004 struct dma_chan *chan;
1006 if (!dep)
1007 return;
1009 /* we'll submit tx->next now, so clear the link */
1010 tx->next = NULL;
1011 chan = dep->chan;
1013 /* keep submitting up until a channel switch is detected
1014 * in that case we will be called again as a result of
1015 * processing the interrupt from async_tx_channel_switch
1017 for (; dep; dep = dep_next) {
1018 spin_lock_bh(&dep->lock);
1019 dep->parent = NULL;
1020 dep_next = dep->next;
1021 if (dep_next && dep_next->chan == chan)
1022 dep->next = NULL; /* ->next will be submitted */
1023 else
1024 dep_next = NULL; /* submit current dep and terminate */
1025 spin_unlock_bh(&dep->lock);
1027 dep->tx_submit(dep);
1030 chan->device->device_issue_pending(chan);
1032 EXPORT_SYMBOL_GPL(dma_run_dependencies);
1034 static int __init dma_bus_init(void)
1036 idr_init(&dma_idr);
1037 mutex_init(&dma_list_mutex);
1038 return class_register(&dma_devclass);
1040 arch_initcall(dma_bus_init);