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mm-only debug patch...
[mmotm.git] / drivers / mtd / onenand / onenand_base.c
blob6e250f3a4a161b9a5e8d5065154ff9758ad34826
1 /*
2 * linux/drivers/mtd/onenand/onenand_base.c
3 *
4 * Copyright (C) 2005-2007 Samsung Electronics
5 * Kyungmin Park <kyungmin.park@samsung.com>
6 *
7 * Credits:
8 * Adrian Hunter <ext-adrian.hunter@nokia.com>:
9 * auto-placement support, read-while load support, various fixes
10 * Copyright (C) Nokia Corporation, 2007
11 *
12 * Vishak G <vishak.g at samsung.com>, Rohit Hagargundgi <h.rohit at samsung.com>
13 * Flex-OneNAND support
14 * Copyright (C) Samsung Electronics, 2008
15 *
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License version 2 as
18 * published by the Free Software Foundation.
19 */
20
21 #include <linux/kernel.h>
22 #include <linux/module.h>
23 #include <linux/moduleparam.h>
24 #include <linux/init.h>
25 #include <linux/sched.h>
26 #include <linux/delay.h>
27 #include <linux/interrupt.h>
28 #include <linux/jiffies.h>
29 #include <linux/mtd/mtd.h>
30 #include <linux/mtd/onenand.h>
31 #include <linux/mtd/partitions.h>
32
33 #include <asm/io.h>
34
35 /* Default Flex-OneNAND boundary and lock respectively */
36 static int flex_bdry[MAX_DIES * 2] = { -1, 0, -1, 0 };
37
38 module_param_array(flex_bdry, int, NULL, 0400);
39 MODULE_PARM_DESC(flex_bdry, "SLC Boundary information for Flex-OneNAND"
40 "Syntax:flex_bdry=DIE_BDRY,LOCK,..."
41 "DIE_BDRY: SLC boundary of the die"
42 "LOCK: Locking information for SLC boundary"
43 " : 0->Set boundary in unlocked status"
44 " : 1->Set boundary in locked status");
45
46 /**
47 * onenand_oob_128 - oob info for Flex-Onenand with 4KB page
48 * For now, we expose only 64 out of 80 ecc bytes
49 */
50 static struct nand_ecclayout onenand_oob_128 = {
51 .eccbytes = 64,
52 .eccpos = {
53 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
54 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
55 38, 39, 40, 41, 42, 43, 44, 45, 46, 47,
56 54, 55, 56, 57, 58, 59, 60, 61, 62, 63,
57 70, 71, 72, 73, 74, 75, 76, 77, 78, 79,
58 86, 87, 88, 89, 90, 91, 92, 93, 94, 95,
59 102, 103, 104, 105
60 },
61 .oobfree = {
62 {2, 4}, {18, 4}, {34, 4}, {50, 4},
63 {66, 4}, {82, 4}, {98, 4}, {114, 4}
64 }
65 };
66
67 /**
68 * onenand_oob_64 - oob info for large (2KB) page
69 */
70 static struct nand_ecclayout onenand_oob_64 = {
71 .eccbytes = 20,
72 .eccpos = {
73 8, 9, 10, 11, 12,
74 24, 25, 26, 27, 28,
75 40, 41, 42, 43, 44,
76 56, 57, 58, 59, 60,
77 },
78 .oobfree = {
79 {2, 3}, {14, 2}, {18, 3}, {30, 2},
80 {34, 3}, {46, 2}, {50, 3}, {62, 2}
81 }
82 };
83
84 /**
85 * onenand_oob_32 - oob info for middle (1KB) page
86 */
87 static struct nand_ecclayout onenand_oob_32 = {
88 .eccbytes = 10,
89 .eccpos = {
90 8, 9, 10, 11, 12,
91 24, 25, 26, 27, 28,
92 },
93 .oobfree = { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
94 };
95
96 static const unsigned char ffchars[] = {
97 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
98 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
99 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
100 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
101 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
102 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
103 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
104 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
105 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
106 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 80 */
107 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
108 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 96 */
109 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
110 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 112 */
111 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
112 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 128 */
113 };
114
115 /**
116 * onenand_readw - [OneNAND Interface] Read OneNAND register
117 * @param addr address to read
118 *
119 * Read OneNAND register
120 */
121 static unsigned short onenand_readw(void __iomem *addr)
122 {
123 return readw(addr);
124 }
125
126 /**
127 * onenand_writew - [OneNAND Interface] Write OneNAND register with value
128 * @param value value to write
129 * @param addr address to write
130 *
131 * Write OneNAND register with value
132 */
133 static void onenand_writew(unsigned short value, void __iomem *addr)
134 {
135 writew(value, addr);
136 }
137
138 /**
139 * onenand_block_address - [DEFAULT] Get block address
140 * @param this onenand chip data structure
141 * @param block the block
142 * @return translated block address if DDP, otherwise same
143 *
144 * Setup Start Address 1 Register (F100h)
145 */
146 static int onenand_block_address(struct onenand_chip *this, int block)
147 {
148 /* Device Flash Core select, NAND Flash Block Address */
149 if (block & this->density_mask)
150 return ONENAND_DDP_CHIP1 | (block ^ this->density_mask);
151
152 return block;
153 }
154
155 /**
156 * onenand_bufferram_address - [DEFAULT] Get bufferram address
157 * @param this onenand chip data structure
158 * @param block the block
159 * @return set DBS value if DDP, otherwise 0
160 *
161 * Setup Start Address 2 Register (F101h) for DDP
162 */
163 static int onenand_bufferram_address(struct onenand_chip *this, int block)
164 {
165 /* Device BufferRAM Select */
166 if (block & this->density_mask)
167 return ONENAND_DDP_CHIP1;
168
169 return ONENAND_DDP_CHIP0;
170 }
171
172 /**
173 * onenand_page_address - [DEFAULT] Get page address
174 * @param page the page address
175 * @param sector the sector address
176 * @return combined page and sector address
177 *
178 * Setup Start Address 8 Register (F107h)
179 */
180 static int onenand_page_address(int page, int sector)
181 {
182 /* Flash Page Address, Flash Sector Address */
183 int fpa, fsa;
184
185 fpa = page & ONENAND_FPA_MASK;
186 fsa = sector & ONENAND_FSA_MASK;
187
188 return ((fpa << ONENAND_FPA_SHIFT) | fsa);
189 }
190
191 /**
192 * onenand_buffer_address - [DEFAULT] Get buffer address
193 * @param dataram1 DataRAM index
194 * @param sectors the sector address
195 * @param count the number of sectors
196 * @return the start buffer value
197 *
198 * Setup Start Buffer Register (F200h)
199 */
200 static int onenand_buffer_address(int dataram1, int sectors, int count)
201 {
202 int bsa, bsc;
203
204 /* BufferRAM Sector Address */
205 bsa = sectors & ONENAND_BSA_MASK;
206
207 if (dataram1)
208 bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */
209 else
210 bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */
211
212 /* BufferRAM Sector Count */
213 bsc = count & ONENAND_BSC_MASK;
214
215 return ((bsa << ONENAND_BSA_SHIFT) | bsc);
216 }
217
218 /**
219 * flexonenand_block- For given address return block number
220 * @param this - OneNAND device structure
221 * @param addr - Address for which block number is needed
222 */
223 static unsigned flexonenand_block(struct onenand_chip *this, loff_t addr)
224 {
225 unsigned boundary, blk, die = 0;
226
227 if (ONENAND_IS_DDP(this) && addr >= this->diesize[0]) {
228 die = 1;
229 addr -= this->diesize[0];
230 }
231
232 boundary = this->boundary[die];
233
234 blk = addr >> (this->erase_shift - 1);
235 if (blk > boundary)
236 blk = (blk + boundary + 1) >> 1;
237
238 blk += die ? this->density_mask : 0;
239 return blk;
240 }
241
242 inline unsigned onenand_block(struct onenand_chip *this, loff_t addr)
243 {
244 if (!FLEXONENAND(this))
245 return addr >> this->erase_shift;
246 return flexonenand_block(this, addr);
247 }
248
249 /**
250 * flexonenand_addr - Return address of the block
251 * @this: OneNAND device structure
252 * @block: Block number on Flex-OneNAND
253 *
254 * Return address of the block
255 */
256 static loff_t flexonenand_addr(struct onenand_chip *this, int block)
257 {
258 loff_t ofs = 0;
259 int die = 0, boundary;
260
261 if (ONENAND_IS_DDP(this) && block >= this->density_mask) {
262 block -= this->density_mask;
263 die = 1;
264 ofs = this->diesize[0];
265 }
266
267 boundary = this->boundary[die];
268 ofs += (loff_t)block << (this->erase_shift - 1);
269 if (block > (boundary + 1))
270 ofs += (loff_t)(block - boundary - 1) << (this->erase_shift - 1);
271 return ofs;
272 }
273
274 loff_t onenand_addr(struct onenand_chip *this, int block)
275 {
276 if (!FLEXONENAND(this))
277 return (loff_t)block << this->erase_shift;
278 return flexonenand_addr(this, block);
279 }
280 EXPORT_SYMBOL(onenand_addr);
281
282 /**
283 * onenand_get_density - [DEFAULT] Get OneNAND density
284 * @param dev_id OneNAND device ID
285 *
286 * Get OneNAND density from device ID
287 */
288 static inline int onenand_get_density(int dev_id)
289 {
290 int density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
291 return (density & ONENAND_DEVICE_DENSITY_MASK);
292 }
293
294 /**
295 * flexonenand_region - [Flex-OneNAND] Return erase region of addr
296 * @param mtd MTD device structure
297 * @param addr address whose erase region needs to be identified
298 */
299 int flexonenand_region(struct mtd_info *mtd, loff_t addr)
300 {
301 int i;
302
303 for (i = 0; i < mtd->numeraseregions; i++)
304 if (addr < mtd->eraseregions[i].offset)
305 break;
306 return i - 1;
307 }
308 EXPORT_SYMBOL(flexonenand_region);
309
310 /**
311 * onenand_command - [DEFAULT] Send command to OneNAND device
312 * @param mtd MTD device structure
313 * @param cmd the command to be sent
314 * @param addr offset to read from or write to
315 * @param len number of bytes to read or write
316 *
317 * Send command to OneNAND device. This function is used for middle/large page
318 * devices (1KB/2KB Bytes per page)
319 */
320 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
321 {
322 struct onenand_chip *this = mtd->priv;
323 int value, block, page;
324
325 /* Address translation */
326 switch (cmd) {
327 case ONENAND_CMD_UNLOCK:
328 case ONENAND_CMD_LOCK:
329 case ONENAND_CMD_LOCK_TIGHT:
330 case ONENAND_CMD_UNLOCK_ALL:
331 block = -1;
332 page = -1;
333 break;
334
335 case FLEXONENAND_CMD_PI_ACCESS:
336 /* addr contains die index */
337 block = addr * this->density_mask;
338 page = -1;
339 break;
340
341 case ONENAND_CMD_ERASE:
342 case ONENAND_CMD_BUFFERRAM:
343 case ONENAND_CMD_OTP_ACCESS:
344 block = onenand_block(this, addr);
345 page = -1;
346 break;
347
348 case FLEXONENAND_CMD_READ_PI:
349 cmd = ONENAND_CMD_READ;
350 block = addr * this->density_mask;
351 page = 0;
352 break;
353
354 default:
355 block = onenand_block(this, addr);
356 page = (int) (addr - onenand_addr(this, block)) >> this->page_shift;
357
358 if (ONENAND_IS_2PLANE(this)) {
359 /* Make the even block number */
360 block &= ~1;
361 /* Is it the odd plane? */
362 if (addr & this->writesize)
363 block++;
364 page >>= 1;
365 }
366 page &= this->page_mask;
367 break;
368 }
369
370 /* NOTE: The setting order of the registers is very important! */
371 if (cmd == ONENAND_CMD_BUFFERRAM) {
372 /* Select DataRAM for DDP */
373 value = onenand_bufferram_address(this, block);
374 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
375
376 if (ONENAND_IS_MLC(this) || ONENAND_IS_2PLANE(this))
377 /* It is always BufferRAM0 */
378 ONENAND_SET_BUFFERRAM0(this);
379 else
380 /* Switch to the next data buffer */
381 ONENAND_SET_NEXT_BUFFERRAM(this);
382
383 return 0;
384 }
385
386 if (block != -1) {
387 /* Write 'DFS, FBA' of Flash */
388 value = onenand_block_address(this, block);
389 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
390
391 /* Select DataRAM for DDP */
392 value = onenand_bufferram_address(this, block);
393 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
394 }
395
396 if (page != -1) {
397 /* Now we use page size operation */
398 int sectors = 0, count = 0;
399 int dataram;
400
401 switch (cmd) {
402 case FLEXONENAND_CMD_RECOVER_LSB:
403 case ONENAND_CMD_READ:
404 case ONENAND_CMD_READOOB:
405 if (ONENAND_IS_MLC(this))
406 /* It is always BufferRAM0 */
407 dataram = ONENAND_SET_BUFFERRAM0(this);
408 else
409 dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
410 break;
411
412 default:
413 if (ONENAND_IS_2PLANE(this) && cmd == ONENAND_CMD_PROG)
414 cmd = ONENAND_CMD_2X_PROG;
415 dataram = ONENAND_CURRENT_BUFFERRAM(this);
416 break;
417 }
418
419 /* Write 'FPA, FSA' of Flash */
420 value = onenand_page_address(page, sectors);
421 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
422
423 /* Write 'BSA, BSC' of DataRAM */
424 value = onenand_buffer_address(dataram, sectors, count);
425 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
426 }
427
428 /* Interrupt clear */
429 this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
430
431 /* Write command */
432 this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
433
434 return 0;
435 }
436
437 /**
438 * onenand_read_ecc - return ecc status
439 * @param this onenand chip structure
440 */
441 static inline int onenand_read_ecc(struct onenand_chip *this)
442 {
443 int ecc, i, result = 0;
444
445 if (!FLEXONENAND(this))
446 return this->read_word(this->base + ONENAND_REG_ECC_STATUS);
447
448 for (i = 0; i < 4; i++) {
449 ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS + i);
450 if (likely(!ecc))
451 continue;
452 if (ecc & FLEXONENAND_UNCORRECTABLE_ERROR)
453 return ONENAND_ECC_2BIT_ALL;
454 else
455 result = ONENAND_ECC_1BIT_ALL;
456 }
457
458 return result;
459 }
460
461 /**
462 * onenand_wait - [DEFAULT] wait until the command is done
463 * @param mtd MTD device structure
464 * @param state state to select the max. timeout value
465 *
466 * Wait for command done. This applies to all OneNAND command
467 * Read can take up to 30us, erase up to 2ms and program up to 350us
468 * according to general OneNAND specs
469 */
470 static int onenand_wait(struct mtd_info *mtd, int state)
471 {
472 struct onenand_chip * this = mtd->priv;
473 unsigned long timeout;
474 unsigned int flags = ONENAND_INT_MASTER;
475 unsigned int interrupt = 0;
476 unsigned int ctrl;
477
478 /* The 20 msec is enough */
479 timeout = jiffies + msecs_to_jiffies(20);
480 while (time_before(jiffies, timeout)) {
481 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
482
483 if (interrupt & flags)
484 break;
485
486 if (state != FL_READING)
487 cond_resched();
488 }
489 /* To get correct interrupt status in timeout case */
490 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
491
492 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
493
494 /*
495 * In the Spec. it checks the controller status first
496 * However if you get the correct information in case of
497 * power off recovery (POR) test, it should read ECC status first
498 */
499 if (interrupt & ONENAND_INT_READ) {
500 int ecc = onenand_read_ecc(this);
501 if (ecc) {
502 if (ecc & ONENAND_ECC_2BIT_ALL) {
503 printk(KERN_ERR "%s: ECC error = 0x%04x\n",
504 __func__, ecc);
505 mtd->ecc_stats.failed++;
506 return -EBADMSG;
507 } else if (ecc & ONENAND_ECC_1BIT_ALL) {
508 printk(KERN_DEBUG "%s: correctable ECC error = 0x%04x\n",
509 __func__, ecc);
510 mtd->ecc_stats.corrected++;
511 }
512 }
513 } else if (state == FL_READING) {
514 printk(KERN_ERR "%s: read timeout! ctrl=0x%04x intr=0x%04x\n",
515 __func__, ctrl, interrupt);
516 return -EIO;
517 }
518
519 /* If there's controller error, it's a real error */
520 if (ctrl & ONENAND_CTRL_ERROR) {
521 printk(KERN_ERR "%s: controller error = 0x%04x\n",
522 __func__, ctrl);
523 if (ctrl & ONENAND_CTRL_LOCK)
524 printk(KERN_ERR "%s: it's locked error.\n", __func__);
525 return -EIO;
526 }
527
528 return 0;
529 }
530
531 /*
532 * onenand_interrupt - [DEFAULT] onenand interrupt handler
533 * @param irq onenand interrupt number
534 * @param dev_id interrupt data
535 *
536 * complete the work
537 */
538 static irqreturn_t onenand_interrupt(int irq, void *data)
539 {
540 struct onenand_chip *this = data;
541
542 /* To handle shared interrupt */
543 if (!this->complete.done)
544 complete(&this->complete);
545
546 return IRQ_HANDLED;
547 }
548
549 /*
550 * onenand_interrupt_wait - [DEFAULT] wait until the command is done
551 * @param mtd MTD device structure
552 * @param state state to select the max. timeout value
553 *
554 * Wait for command done.
555 */
556 static int onenand_interrupt_wait(struct mtd_info *mtd, int state)
557 {
558 struct onenand_chip *this = mtd->priv;
559
560 wait_for_completion(&this->complete);
561
562 return onenand_wait(mtd, state);
563 }
564
565 /*
566 * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait
567 * @param mtd MTD device structure
568 * @param state state to select the max. timeout value
569 *
570 * Try interrupt based wait (It is used one-time)
571 */
572 static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state)
573 {
574 struct onenand_chip *this = mtd->priv;
575 unsigned long remain, timeout;
576
577 /* We use interrupt wait first */
578 this->wait = onenand_interrupt_wait;
579
580 timeout = msecs_to_jiffies(100);
581 remain = wait_for_completion_timeout(&this->complete, timeout);
582 if (!remain) {
583 printk(KERN_INFO "OneNAND: There's no interrupt. "
584 "We use the normal wait\n");
585
586 /* Release the irq */
587 free_irq(this->irq, this);
588
589 this->wait = onenand_wait;
590 }
591
592 return onenand_wait(mtd, state);
593 }
594
595 /*
596 * onenand_setup_wait - [OneNAND Interface] setup onenand wait method
597 * @param mtd MTD device structure
598 *
599 * There's two method to wait onenand work
600 * 1. polling - read interrupt status register
601 * 2. interrupt - use the kernel interrupt method
602 */
603 static void onenand_setup_wait(struct mtd_info *mtd)
604 {
605 struct onenand_chip *this = mtd->priv;
606 int syscfg;
607
608 init_completion(&this->complete);
609
610 if (this->irq <= 0) {
611 this->wait = onenand_wait;
612 return;
613 }
614
615 if (request_irq(this->irq, &onenand_interrupt,
616 IRQF_SHARED, "onenand", this)) {
617 /* If we can't get irq, use the normal wait */
618 this->wait = onenand_wait;
619 return;
620 }
621
622 /* Enable interrupt */
623 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
624 syscfg |= ONENAND_SYS_CFG1_IOBE;
625 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
626
627 this->wait = onenand_try_interrupt_wait;
628 }
629
630 /**
631 * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
632 * @param mtd MTD data structure
633 * @param area BufferRAM area
634 * @return offset given area
635 *
636 * Return BufferRAM offset given area
637 */
638 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
639 {
640 struct onenand_chip *this = mtd->priv;
641
642 if (ONENAND_CURRENT_BUFFERRAM(this)) {
643 /* Note: the 'this->writesize' is a real page size */
644 if (area == ONENAND_DATARAM)
645 return this->writesize;
646 if (area == ONENAND_SPARERAM)
647 return mtd->oobsize;
648 }
649
650 return 0;
651 }
652
653 /**
654 * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
655 * @param mtd MTD data structure
656 * @param area BufferRAM area
657 * @param buffer the databuffer to put/get data
658 * @param offset offset to read from or write to
659 * @param count number of bytes to read/write
660 *
661 * Read the BufferRAM area
662 */
663 static int onenand_read_bufferram(struct mtd_info *mtd, int area,
664 unsigned char *buffer, int offset, size_t count)
665 {
666 struct onenand_chip *this = mtd->priv;
667 void __iomem *bufferram;
668
669 bufferram = this->base + area;
670
671 bufferram += onenand_bufferram_offset(mtd, area);
672
673 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
674 unsigned short word;
675
676 /* Align with word(16-bit) size */
677 count--;
678
679 /* Read word and save byte */
680 word = this->read_word(bufferram + offset + count);
681 buffer[count] = (word & 0xff);
682 }
683
684 memcpy(buffer, bufferram + offset, count);
685
686 return 0;
687 }
688
689 /**
690 * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
691 * @param mtd MTD data structure
692 * @param area BufferRAM area
693 * @param buffer the databuffer to put/get data
694 * @param offset offset to read from or write to
695 * @param count number of bytes to read/write
696 *
697 * Read the BufferRAM area with Sync. Burst Mode
698 */
699 static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
700 unsigned char *buffer, int offset, size_t count)
701 {
702 struct onenand_chip *this = mtd->priv;
703 void __iomem *bufferram;
704
705 bufferram = this->base + area;
706
707 bufferram += onenand_bufferram_offset(mtd, area);
708
709 this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
710
711 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
712 unsigned short word;
713
714 /* Align with word(16-bit) size */
715 count--;
716
717 /* Read word and save byte */
718 word = this->read_word(bufferram + offset + count);
719 buffer[count] = (word & 0xff);
720 }
721
722 memcpy(buffer, bufferram + offset, count);
723
724 this->mmcontrol(mtd, 0);
725
726 return 0;
727 }
728
729 /**
730 * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
731 * @param mtd MTD data structure
732 * @param area BufferRAM area
733 * @param buffer the databuffer to put/get data
734 * @param offset offset to read from or write to
735 * @param count number of bytes to read/write
736 *
737 * Write the BufferRAM area
738 */
739 static int onenand_write_bufferram(struct mtd_info *mtd, int area,
740 const unsigned char *buffer, int offset, size_t count)
741 {
742 struct onenand_chip *this = mtd->priv;
743 void __iomem *bufferram;
744
745 bufferram = this->base + area;
746
747 bufferram += onenand_bufferram_offset(mtd, area);
748
749 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
750 unsigned short word;
751 int byte_offset;
752
753 /* Align with word(16-bit) size */
754 count--;
755
756 /* Calculate byte access offset */
757 byte_offset = offset + count;
758
759 /* Read word and save byte */
760 word = this->read_word(bufferram + byte_offset);
761 word = (word & ~0xff) | buffer[count];
762 this->write_word(word, bufferram + byte_offset);
763 }
764
765 memcpy(bufferram + offset, buffer, count);
766
767 return 0;
768 }
769
770 /**
771 * onenand_get_2x_blockpage - [GENERIC] Get blockpage at 2x program mode
772 * @param mtd MTD data structure
773 * @param addr address to check
774 * @return blockpage address
775 *
776 * Get blockpage address at 2x program mode
777 */
778 static int onenand_get_2x_blockpage(struct mtd_info *mtd, loff_t addr)
779 {
780 struct onenand_chip *this = mtd->priv;
781 int blockpage, block, page;
782
783 /* Calculate the even block number */
784 block = (int) (addr >> this->erase_shift) & ~1;
785 /* Is it the odd plane? */
786 if (addr & this->writesize)
787 block++;
788 page = (int) (addr >> (this->page_shift + 1)) & this->page_mask;
789 blockpage = (block << 7) | page;
790
791 return blockpage;
792 }
793
794 /**
795 * onenand_check_bufferram - [GENERIC] Check BufferRAM information
796 * @param mtd MTD data structure
797 * @param addr address to check
798 * @return 1 if there are valid data, otherwise 0
799 *
800 * Check bufferram if there is data we required
801 */
802 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
803 {
804 struct onenand_chip *this = mtd->priv;
805 int blockpage, found = 0;
806 unsigned int i;
807
808 if (ONENAND_IS_2PLANE(this))
809 blockpage = onenand_get_2x_blockpage(mtd, addr);
810 else
811 blockpage = (int) (addr >> this->page_shift);
812
813 /* Is there valid data? */
814 i = ONENAND_CURRENT_BUFFERRAM(this);
815 if (this->bufferram[i].blockpage == blockpage)
816 found = 1;
817 else {
818 /* Check another BufferRAM */
819 i = ONENAND_NEXT_BUFFERRAM(this);
820 if (this->bufferram[i].blockpage == blockpage) {
821 ONENAND_SET_NEXT_BUFFERRAM(this);
822 found = 1;
823 }
824 }
825
826 if (found && ONENAND_IS_DDP(this)) {
827 /* Select DataRAM for DDP */
828 int block = onenand_block(this, addr);
829 int value = onenand_bufferram_address(this, block);
830 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
831 }
832
833 return found;
834 }
835
836 /**
837 * onenand_update_bufferram - [GENERIC] Update BufferRAM information
838 * @param mtd MTD data structure
839 * @param addr address to update
840 * @param valid valid flag
841 *
842 * Update BufferRAM information
843 */
844 static void onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
845 int valid)
846 {
847 struct onenand_chip *this = mtd->priv;
848 int blockpage;
849 unsigned int i;
850
851 if (ONENAND_IS_2PLANE(this))
852 blockpage = onenand_get_2x_blockpage(mtd, addr);
853 else
854 blockpage = (int) (addr >> this->page_shift);
855
856 /* Invalidate another BufferRAM */
857 i = ONENAND_NEXT_BUFFERRAM(this);
858 if (this->bufferram[i].blockpage == blockpage)
859 this->bufferram[i].blockpage = -1;
860
861 /* Update BufferRAM */
862 i = ONENAND_CURRENT_BUFFERRAM(this);
863 if (valid)
864 this->bufferram[i].blockpage = blockpage;
865 else
866 this->bufferram[i].blockpage = -1;
867 }
868
869 /**
870 * onenand_invalidate_bufferram - [GENERIC] Invalidate BufferRAM information
871 * @param mtd MTD data structure
872 * @param addr start address to invalidate
873 * @param len length to invalidate
874 *
875 * Invalidate BufferRAM information
876 */
877 static void onenand_invalidate_bufferram(struct mtd_info *mtd, loff_t addr,
878 unsigned int len)
879 {
880 struct onenand_chip *this = mtd->priv;
881 int i;
882 loff_t end_addr = addr + len;
883
884 /* Invalidate BufferRAM */
885 for (i = 0; i < MAX_BUFFERRAM; i++) {
886 loff_t buf_addr = this->bufferram[i].blockpage << this->page_shift;
887 if (buf_addr >= addr && buf_addr < end_addr)
888 this->bufferram[i].blockpage = -1;
889 }
890 }
891
892 /**
893 * onenand_get_device - [GENERIC] Get chip for selected access
894 * @param mtd MTD device structure
895 * @param new_state the state which is requested
896 *
897 * Get the device and lock it for exclusive access
898 */
899 static int onenand_get_device(struct mtd_info *mtd, int new_state)
900 {
901 struct onenand_chip *this = mtd->priv;
902 DECLARE_WAITQUEUE(wait, current);
903
904 /*
905 * Grab the lock and see if the device is available
906 */
907 while (1) {
908 spin_lock(&this->chip_lock);
909 if (this->state == FL_READY) {
910 this->state = new_state;
911 spin_unlock(&this->chip_lock);
912 break;
913 }
914 if (new_state == FL_PM_SUSPENDED) {
915 spin_unlock(&this->chip_lock);
916 return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
917 }
918 set_current_state(TASK_UNINTERRUPTIBLE);
919 add_wait_queue(&this->wq, &wait);
920 spin_unlock(&this->chip_lock);
921 schedule();
922 remove_wait_queue(&this->wq, &wait);
923 }
924
925 return 0;
926 }
927
928 /**
929 * onenand_release_device - [GENERIC] release chip
930 * @param mtd MTD device structure
931 *
932 * Deselect, release chip lock and wake up anyone waiting on the device
933 */
934 static void onenand_release_device(struct mtd_info *mtd)
935 {
936 struct onenand_chip *this = mtd->priv;
937
938 /* Release the chip */
939 spin_lock(&this->chip_lock);
940 this->state = FL_READY;
941 wake_up(&this->wq);
942 spin_unlock(&this->chip_lock);
943 }
944
945 /**
946 * onenand_transfer_auto_oob - [Internal] oob auto-placement transfer
947 * @param mtd MTD device structure
948 * @param buf destination address
949 * @param column oob offset to read from
950 * @param thislen oob length to read
951 */
952 static int onenand_transfer_auto_oob(struct mtd_info *mtd, uint8_t *buf, int column,
953 int thislen)
954 {
955 struct onenand_chip *this = mtd->priv;
956 struct nand_oobfree *free;
957 int readcol = column;
958 int readend = column + thislen;
959 int lastgap = 0;
960 unsigned int i;
961 uint8_t *oob_buf = this->oob_buf;
962
963 free = this->ecclayout->oobfree;
964 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
965 if (readcol >= lastgap)
966 readcol += free->offset - lastgap;
967 if (readend >= lastgap)
968 readend += free->offset - lastgap;
969 lastgap = free->offset + free->length;
970 }
971 this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
972 free = this->ecclayout->oobfree;
973 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
974 int free_end = free->offset + free->length;
975 if (free->offset < readend && free_end > readcol) {
976 int st = max_t(int,free->offset,readcol);
977 int ed = min_t(int,free_end,readend);
978 int n = ed - st;
979 memcpy(buf, oob_buf + st, n);
980 buf += n;
981 } else if (column == 0)
982 break;
983 }
984 return 0;
985 }
986
987 /**
988 * onenand_recover_lsb - [Flex-OneNAND] Recover LSB page data
989 * @param mtd MTD device structure
990 * @param addr address to recover
991 * @param status return value from onenand_wait / onenand_bbt_wait
992 *
993 * MLC NAND Flash cell has paired pages - LSB page and MSB page. LSB page has
994 * lower page address and MSB page has higher page address in paired pages.
995 * If power off occurs during MSB page program, the paired LSB page data can
996 * become corrupt. LSB page recovery read is a way to read LSB page though page
997 * data are corrupted. When uncorrectable error occurs as a result of LSB page
998 * read after power up, issue LSB page recovery read.
999 */
1000 static int onenand_recover_lsb(struct mtd_info *mtd, loff_t addr, int status)
1001 {
1002 struct onenand_chip *this = mtd->priv;
1003 int i;
1004
1005 /* Recovery is only for Flex-OneNAND */
1006 if (!FLEXONENAND(this))
1007 return status;
1008
1009 /* check if we failed due to uncorrectable error */
1010 if (status != -EBADMSG && status != ONENAND_BBT_READ_ECC_ERROR)
1011 return status;
1012
1013 /* check if address lies in MLC region */
1014 i = flexonenand_region(mtd, addr);
1015 if (mtd->eraseregions[i].erasesize < (1 << this->erase_shift))
1016 return status;
1017
1018 /* We are attempting to reread, so decrement stats.failed
1019 * which was incremented by onenand_wait due to read failure
1020 */
1021 printk(KERN_INFO "%s: Attempting to recover from uncorrectable read\n",
1022 __func__);
1023 mtd->ecc_stats.failed--;
1024
1025 /* Issue the LSB page recovery command */
1026 this->command(mtd, FLEXONENAND_CMD_RECOVER_LSB, addr, this->writesize);
1027 return this->wait(mtd, FL_READING);
1028 }
1029
1030 /**
1031 * onenand_mlc_read_ops_nolock - MLC OneNAND read main and/or out-of-band
1032 * @param mtd MTD device structure
1033 * @param from offset to read from
1034 * @param ops: oob operation description structure
1035 *
1036 * MLC OneNAND / Flex-OneNAND has 4KB page size and 4KB dataram.
1037 * So, read-while-load is not present.
1038 */
1039 static int onenand_mlc_read_ops_nolock(struct mtd_info *mtd, loff_t from,
1040 struct mtd_oob_ops *ops)
1041 {
1042 struct onenand_chip *this = mtd->priv;
1043 struct mtd_ecc_stats stats;
1044 size_t len = ops->len;
1045 size_t ooblen = ops->ooblen;
1046 u_char *buf = ops->datbuf;
1047 u_char *oobbuf = ops->oobbuf;
1048 int read = 0, column, thislen;
1049 int oobread = 0, oobcolumn, thisooblen, oobsize;
1050 int ret = 0;
1051 int writesize = this->writesize;
1052
1053 DEBUG(MTD_DEBUG_LEVEL3, "%s: from = 0x%08x, len = %i\n",
1054 __func__, (unsigned int) from, (int) len);
1055
1056 if (ops->mode == MTD_OOB_AUTO)
1057 oobsize = this->ecclayout->oobavail;
1058 else
1059 oobsize = mtd->oobsize;
1060
1061 oobcolumn = from & (mtd->oobsize - 1);
1062
1063 /* Do not allow reads past end of device */
1064 if (from + len > mtd->size) {
1065 printk(KERN_ERR "%s: Attempt read beyond end of device\n",
1066 __func__);
1067 ops->retlen = 0;
1068 ops->oobretlen = 0;
1069 return -EINVAL;
1070 }
1071
1072 stats = mtd->ecc_stats;
1073
1074 while (read < len) {
1075 cond_resched();
1076
1077 thislen = min_t(int, writesize, len - read);
1078
1079 column = from & (writesize - 1);
1080 if (column + thislen > writesize)
1081 thislen = writesize - column;
1082
1083 if (!onenand_check_bufferram(mtd, from)) {
1084 this->command(mtd, ONENAND_CMD_READ, from, writesize);
1085
1086 ret = this->wait(mtd, FL_READING);
1087 if (unlikely(ret))
1088 ret = onenand_recover_lsb(mtd, from, ret);
1089 onenand_update_bufferram(mtd, from, !ret);
1090 if (ret == -EBADMSG)
1091 ret = 0;
1092 }
1093
1094 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
1095 if (oobbuf) {
1096 thisooblen = oobsize - oobcolumn;
1097 thisooblen = min_t(int, thisooblen, ooblen - oobread);
1098
1099 if (ops->mode == MTD_OOB_AUTO)
1100 onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen);
1101 else
1102 this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen);
1103 oobread += thisooblen;
1104 oobbuf += thisooblen;
1105 oobcolumn = 0;
1106 }
1107
1108 read += thislen;
1109 if (read == len)
1110 break;
1111
1112 from += thislen;
1113 buf += thislen;
1114 }
1115
1116 /*
1117 * Return success, if no ECC failures, else -EBADMSG
1118 * fs driver will take care of that, because
1119 * retlen == desired len and result == -EBADMSG
1120 */
1121 ops->retlen = read;
1122 ops->oobretlen = oobread;
1123
1124 if (ret)
1125 return ret;
1126
1127 if (mtd->ecc_stats.failed - stats.failed)
1128 return -EBADMSG;
1129
1130 return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
1131 }
1132
1133 /**
1134 * onenand_read_ops_nolock - [OneNAND Interface] OneNAND read main and/or out-of-band
1135 * @param mtd MTD device structure
1136 * @param from offset to read from
1137 * @param ops: oob operation description structure
1138 *
1139 * OneNAND read main and/or out-of-band data
1140 */
1141 static int onenand_read_ops_nolock(struct mtd_info *mtd, loff_t from,
1142 struct mtd_oob_ops *ops)
1143 {
1144 struct onenand_chip *this = mtd->priv;
1145 struct mtd_ecc_stats stats;
1146 size_t len = ops->len;
1147 size_t ooblen = ops->ooblen;
1148 u_char *buf = ops->datbuf;
1149 u_char *oobbuf = ops->oobbuf;
1150 int read = 0, column, thislen;
1151 int oobread = 0, oobcolumn, thisooblen, oobsize;
1152 int ret = 0, boundary = 0;
1153 int writesize = this->writesize;
1154
1155 DEBUG(MTD_DEBUG_LEVEL3, "%s: from = 0x%08x, len = %i\n",
1156 __func__, (unsigned int) from, (int) len);
1157
1158 if (ops->mode == MTD_OOB_AUTO)
1159 oobsize = this->ecclayout->oobavail;
1160 else
1161 oobsize = mtd->oobsize;
1162
1163 oobcolumn = from & (mtd->oobsize - 1);
1164
1165 /* Do not allow reads past end of device */
1166 if ((from + len) > mtd->size) {
1167 printk(KERN_ERR "%s: Attempt read beyond end of device\n",
1168 __func__);
1169 ops->retlen = 0;
1170 ops->oobretlen = 0;
1171 return -EINVAL;
1172 }
1173
1174 stats = mtd->ecc_stats;
1175
1176 /* Read-while-load method */
1177
1178 /* Do first load to bufferRAM */
1179 if (read < len) {
1180 if (!onenand_check_bufferram(mtd, from)) {
1181 this->command(mtd, ONENAND_CMD_READ, from, writesize);
1182 ret = this->wait(mtd, FL_READING);
1183 onenand_update_bufferram(mtd, from, !ret);
1184 if (ret == -EBADMSG)
1185 ret = 0;
1186 }
1187 }
1188
1189 thislen = min_t(int, writesize, len - read);
1190 column = from & (writesize - 1);
1191 if (column + thislen > writesize)
1192 thislen = writesize - column;
1193
1194 while (!ret) {
1195 /* If there is more to load then start next load */
1196 from += thislen;
1197 if (read + thislen < len) {
1198 this->command(mtd, ONENAND_CMD_READ, from, writesize);
1199 /*
1200 * Chip boundary handling in DDP
1201 * Now we issued chip 1 read and pointed chip 1
1202 * bufferram so we have to point chip 0 bufferram.
1203 */
1204 if (ONENAND_IS_DDP(this) &&
1205 unlikely(from == (this->chipsize >> 1))) {
1206 this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2);
1207 boundary = 1;
1208 } else
1209 boundary = 0;
1210 ONENAND_SET_PREV_BUFFERRAM(this);
1211 }
1212 /* While load is going, read from last bufferRAM */
1213 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
1214
1215 /* Read oob area if needed */
1216 if (oobbuf) {
1217 thisooblen = oobsize - oobcolumn;
1218 thisooblen = min_t(int, thisooblen, ooblen - oobread);
1219
1220 if (ops->mode == MTD_OOB_AUTO)
1221 onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen);
1222 else
1223 this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen);
1224 oobread += thisooblen;
1225 oobbuf += thisooblen;
1226 oobcolumn = 0;
1227 }
1228
1229 /* See if we are done */
1230 read += thislen;
1231 if (read == len)
1232 break;
1233 /* Set up for next read from bufferRAM */
1234 if (unlikely(boundary))
1235 this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2);
1236 ONENAND_SET_NEXT_BUFFERRAM(this);
1237 buf += thislen;
1238 thislen = min_t(int, writesize, len - read);
1239 column = 0;
1240 cond_resched();
1241 /* Now wait for load */
1242 ret = this->wait(mtd, FL_READING);
1243 onenand_update_bufferram(mtd, from, !ret);
1244 if (ret == -EBADMSG)
1245 ret = 0;
1246 }
1247
1248 /*
1249 * Return success, if no ECC failures, else -EBADMSG
1250 * fs driver will take care of that, because
1251 * retlen == desired len and result == -EBADMSG
1252 */
1253 ops->retlen = read;
1254 ops->oobretlen = oobread;
1255
1256 if (ret)
1257 return ret;
1258
1259 if (mtd->ecc_stats.failed - stats.failed)
1260 return -EBADMSG;
1261
1262 return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
1263 }
1264
1265 /**
1266 * onenand_read_oob_nolock - [MTD Interface] OneNAND read out-of-band
1267 * @param mtd MTD device structure
1268 * @param from offset to read from
1269 * @param ops: oob operation description structure
1270 *
1271 * OneNAND read out-of-band data from the spare area
1272 */
1273 static int onenand_read_oob_nolock(struct mtd_info *mtd, loff_t from,
1274 struct mtd_oob_ops *ops)
1275 {
1276 struct onenand_chip *this = mtd->priv;
1277 struct mtd_ecc_stats stats;
1278 int read = 0, thislen, column, oobsize;
1279 size_t len = ops->ooblen;
1280 mtd_oob_mode_t mode = ops->mode;
1281 u_char *buf = ops->oobbuf;
1282 int ret = 0, readcmd;
1283
1284 from += ops->ooboffs;
1285
1286 DEBUG(MTD_DEBUG_LEVEL3, "%s: from = 0x%08x, len = %i\n",
1287 __func__, (unsigned int) from, (int) len);
1288
1289 /* Initialize return length value */
1290 ops->oobretlen = 0;
1291
1292 if (mode == MTD_OOB_AUTO)
1293 oobsize = this->ecclayout->oobavail;
1294 else
1295 oobsize = mtd->oobsize;
1296
1297 column = from & (mtd->oobsize - 1);
1298
1299 if (unlikely(column >= oobsize)) {
1300 printk(KERN_ERR "%s: Attempted to start read outside oob\n",
1301 __func__);
1302 return -EINVAL;
1303 }
1304
1305 /* Do not allow reads past end of device */
1306 if (unlikely(from >= mtd->size ||
1307 column + len > ((mtd->size >> this->page_shift) -
1308 (from >> this->page_shift)) * oobsize)) {
1309 printk(KERN_ERR "%s: Attempted to read beyond end of device\n",
1310 __func__);
1311 return -EINVAL;
1312 }
1313
1314 stats = mtd->ecc_stats;
1315
1316 readcmd = ONENAND_IS_MLC(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB;
1317
1318 while (read < len) {
1319 cond_resched();
1320
1321 thislen = oobsize - column;
1322 thislen = min_t(int, thislen, len);
1323
1324 this->command(mtd, readcmd, from, mtd->oobsize);
1325
1326 onenand_update_bufferram(mtd, from, 0);
1327
1328 ret = this->wait(mtd, FL_READING);
1329 if (unlikely(ret))
1330 ret = onenand_recover_lsb(mtd, from, ret);
1331
1332 if (ret && ret != -EBADMSG) {
1333 printk(KERN_ERR "%s: read failed = 0x%x\n",
1334 __func__, ret);
1335 break;
1336 }
1337
1338 if (mode == MTD_OOB_AUTO)
1339 onenand_transfer_auto_oob(mtd, buf, column, thislen);
1340 else
1341 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
1342
1343 read += thislen;
1344
1345 if (read == len)
1346 break;
1347
1348 buf += thislen;
1349
1350 /* Read more? */
1351 if (read < len) {
1352 /* Page size */
1353 from += mtd->writesize;
1354 column = 0;
1355 }
1356 }
1357
1358 ops->oobretlen = read;
1359
1360 if (ret)
1361 return ret;
1362
1363 if (mtd->ecc_stats.failed - stats.failed)
1364 return -EBADMSG;
1365
1366 return 0;
1367 }
1368
1369 /**
1370 * onenand_read - [MTD Interface] Read data from flash
1371 * @param mtd MTD device structure
1372 * @param from offset to read from
1373 * @param len number of bytes to read
1374 * @param retlen pointer to variable to store the number of read bytes
1375 * @param buf the databuffer to put data
1376 *
1377 * Read with ecc
1378 */
1379 static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
1380 size_t *retlen, u_char *buf)
1381 {
1382 struct onenand_chip *this = mtd->priv;
1383 struct mtd_oob_ops ops = {
1384 .len = len,
1385 .ooblen = 0,
1386 .datbuf = buf,
1387 .oobbuf = NULL,
1388 };
1389 int ret;
1390
1391 onenand_get_device(mtd, FL_READING);
1392 ret = ONENAND_IS_MLC(this) ?
1393 onenand_mlc_read_ops_nolock(mtd, from, &ops) :
1394 onenand_read_ops_nolock(mtd, from, &ops);
1395 onenand_release_device(mtd);
1396
1397 *retlen = ops.retlen;
1398 return ret;
1399 }
1400
1401 /**
1402 * onenand_read_oob - [MTD Interface] Read main and/or out-of-band
1403 * @param mtd: MTD device structure
1404 * @param from: offset to read from
1405 * @param ops: oob operation description structure
1406
1407 * Read main and/or out-of-band
1408 */
1409 static int onenand_read_oob(struct mtd_info *mtd, loff_t from,
1410 struct mtd_oob_ops *ops)
1411 {
1412 struct onenand_chip *this = mtd->priv;
1413 int ret;
1414
1415 switch (ops->mode) {
1416 case MTD_OOB_PLACE:
1417 case MTD_OOB_AUTO:
1418 break;
1419 case MTD_OOB_RAW:
1420 /* Not implemented yet */
1421 default:
1422 return -EINVAL;
1423 }
1424
1425 onenand_get_device(mtd, FL_READING);
1426 if (ops->datbuf)
1427 ret = ONENAND_IS_MLC(this) ?
1428 onenand_mlc_read_ops_nolock(mtd, from, ops) :
1429 onenand_read_ops_nolock(mtd, from, ops);
1430 else
1431 ret = onenand_read_oob_nolock(mtd, from, ops);
1432 onenand_release_device(mtd);
1433
1434 return ret;
1435 }
1436
1437 /**
1438 * onenand_bbt_wait - [DEFAULT] wait until the command is done
1439 * @param mtd MTD device structure
1440 * @param state state to select the max. timeout value
1441 *
1442 * Wait for command done.
1443 */
1444 static int onenand_bbt_wait(struct mtd_info *mtd, int state)
1445 {
1446 struct onenand_chip *this = mtd->priv;
1447 unsigned long timeout;
1448 unsigned int interrupt;
1449 unsigned int ctrl;
1450
1451 /* The 20 msec is enough */
1452 timeout = jiffies + msecs_to_jiffies(20);
1453 while (time_before(jiffies, timeout)) {
1454 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1455 if (interrupt & ONENAND_INT_MASTER)
1456 break;
1457 }
1458 /* To get correct interrupt status in timeout case */
1459 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1460 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
1461
1462 if (interrupt & ONENAND_INT_READ) {
1463 int ecc = onenand_read_ecc(this);
1464 if (ecc & ONENAND_ECC_2BIT_ALL) {
1465 printk(KERN_WARNING "%s: ecc error = 0x%04x, "
1466 "controller error 0x%04x\n",
1467 __func__, ecc, ctrl);
1468 return ONENAND_BBT_READ_ECC_ERROR;
1469 }
1470 } else {
1471 printk(KERN_ERR "%s: read timeout! ctrl=0x%04x intr=0x%04x\n",
1472 __func__, ctrl, interrupt);
1473 return ONENAND_BBT_READ_FATAL_ERROR;
1474 }
1475
1476 /* Initial bad block case: 0x2400 or 0x0400 */
1477 if (ctrl & ONENAND_CTRL_ERROR) {
1478 printk(KERN_DEBUG "%s: controller error = 0x%04x\n",
1479 __func__, ctrl);
1480 return ONENAND_BBT_READ_ERROR;
1481 }
1482
1483 return 0;
1484 }
1485
1486 /**
1487 * onenand_bbt_read_oob - [MTD Interface] OneNAND read out-of-band for bbt scan
1488 * @param mtd MTD device structure
1489 * @param from offset to read from
1490 * @param ops oob operation description structure
1491 *
1492 * OneNAND read out-of-band data from the spare area for bbt scan
1493 */
1494 int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from,
1495 struct mtd_oob_ops *ops)
1496 {
1497 struct onenand_chip *this = mtd->priv;
1498 int read = 0, thislen, column;
1499 int ret = 0, readcmd;
1500 size_t len = ops->ooblen;
1501 u_char *buf = ops->oobbuf;
1502
1503 DEBUG(MTD_DEBUG_LEVEL3, "%s: from = 0x%08x, len = %zi\n",
1504 __func__, (unsigned int) from, len);
1505
1506 /* Initialize return value */
1507 ops->oobretlen = 0;
1508
1509 /* Do not allow reads past end of device */
1510 if (unlikely((from + len) > mtd->size)) {
1511 printk(KERN_ERR "%s: Attempt read beyond end of device\n",
1512 __func__);
1513 return ONENAND_BBT_READ_FATAL_ERROR;
1514 }
1515
1516 /* Grab the lock and see if the device is available */
1517 onenand_get_device(mtd, FL_READING);
1518
1519 column = from & (mtd->oobsize - 1);
1520
1521 readcmd = ONENAND_IS_MLC(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB;
1522
1523 while (read < len) {
1524 cond_resched();
1525
1526 thislen = mtd->oobsize - column;
1527 thislen = min_t(int, thislen, len);
1528
1529 this->command(mtd, readcmd, from, mtd->oobsize);
1530
1531 onenand_update_bufferram(mtd, from, 0);
1532
1533 ret = this->bbt_wait(mtd, FL_READING);
1534 if (unlikely(ret))
1535 ret = onenand_recover_lsb(mtd, from, ret);
1536
1537 if (ret)
1538 break;
1539
1540 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
1541 read += thislen;
1542 if (read == len)
1543 break;
1544
1545 buf += thislen;
1546
1547 /* Read more? */
1548 if (read < len) {
1549 /* Update Page size */
1550 from += this->writesize;
1551 column = 0;
1552 }
1553 }
1554
1555 /* Deselect and wake up anyone waiting on the device */
1556 onenand_release_device(mtd);
1557
1558 ops->oobretlen = read;
1559 return ret;
1560 }
1561
1562 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
1563 /**
1564 * onenand_verify_oob - [GENERIC] verify the oob contents after a write
1565 * @param mtd MTD device structure
1566 * @param buf the databuffer to verify
1567 * @param to offset to read from
1568 */
1569 static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to)
1570 {
1571 struct onenand_chip *this = mtd->priv;
1572 u_char *oob_buf = this->oob_buf;
1573 int status, i, readcmd;
1574
1575 readcmd = ONENAND_IS_MLC(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB;
1576
1577 this->command(mtd, readcmd, to, mtd->oobsize);
1578 onenand_update_bufferram(mtd, to, 0);
1579 status = this->wait(mtd, FL_READING);
1580 if (status)
1581 return status;
1582
1583 this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
1584 for (i = 0; i < mtd->oobsize; i++)
1585 if (buf[i] != 0xFF && buf[i] != oob_buf[i])
1586 return -EBADMSG;
1587
1588 return 0;
1589 }
1590
1591 /**
1592 * onenand_verify - [GENERIC] verify the chip contents after a write
1593 * @param mtd MTD device structure
1594 * @param buf the databuffer to verify
1595 * @param addr offset to read from
1596 * @param len number of bytes to read and compare
1597 */
1598 static int onenand_verify(struct mtd_info *mtd, const u_char *buf, loff_t addr, size_t len)
1599 {
1600 struct onenand_chip *this = mtd->priv;
1601 void __iomem *dataram;
1602 int ret = 0;
1603 int thislen, column;
1604
1605 while (len != 0) {
1606 thislen = min_t(int, this->writesize, len);
1607 column = addr & (this->writesize - 1);
1608 if (column + thislen > this->writesize)
1609 thislen = this->writesize - column;
1610
1611 this->command(mtd, ONENAND_CMD_READ, addr, this->writesize);
1612
1613 onenand_update_bufferram(mtd, addr, 0);
1614
1615 ret = this->wait(mtd, FL_READING);
1616 if (ret)
1617 return ret;
1618
1619 onenand_update_bufferram(mtd, addr, 1);
1620
1621 dataram = this->base + ONENAND_DATARAM;
1622 dataram += onenand_bufferram_offset(mtd, ONENAND_DATARAM);
1623
1624 if (memcmp(buf, dataram + column, thislen))
1625 return -EBADMSG;
1626
1627 len -= thislen;
1628 buf += thislen;
1629 addr += thislen;
1630 }
1631
1632 return 0;
1633 }
1634 #else
1635 #define onenand_verify(...) (0)
1636 #define onenand_verify_oob(...) (0)
1637 #endif
1638
1639 #define NOTALIGNED(x) ((x & (this->subpagesize - 1)) != 0)
1640
1641 static void onenand_panic_wait(struct mtd_info *mtd)
1642 {
1643 struct onenand_chip *this = mtd->priv;
1644 unsigned int interrupt;
1645 int i;
1646
1647 for (i = 0; i < 2000; i++) {
1648 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1649 if (interrupt & ONENAND_INT_MASTER)
1650 break;
1651 udelay(10);
1652 }
1653 }
1654
1655 /**
1656 * onenand_panic_write - [MTD Interface] write buffer to FLASH in a panic context
1657 * @param mtd MTD device structure
1658 * @param to offset to write to
1659 * @param len number of bytes to write
1660 * @param retlen pointer to variable to store the number of written bytes
1661 * @param buf the data to write
1662 *
1663 * Write with ECC
1664 */
1665 static int onenand_panic_write(struct mtd_info *mtd, loff_t to, size_t len,
1666 size_t *retlen, const u_char *buf)
1667 {
1668 struct onenand_chip *this = mtd->priv;
1669 int column, subpage;
1670 int written = 0;
1671 int ret = 0;
1672
1673 if (this->state == FL_PM_SUSPENDED)
1674 return -EBUSY;
1675
1676 /* Wait for any existing operation to clear */
1677 onenand_panic_wait(mtd);
1678
1679 DEBUG(MTD_DEBUG_LEVEL3, "%s: to = 0x%08x, len = %i\n",
1680 __func__, (unsigned int) to, (int) len);
1681
1682 /* Initialize retlen, in case of early exit */
1683 *retlen = 0;
1684
1685 /* Do not allow writes past end of device */
1686 if (unlikely((to + len) > mtd->size)) {
1687 printk(KERN_ERR "%s: Attempt write to past end of device\n",
1688 __func__);
1689 return -EINVAL;
1690 }
1691
1692 /* Reject writes, which are not page aligned */
1693 if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) {
1694 printk(KERN_ERR "%s: Attempt to write not page aligned data\n",
1695 __func__);
1696 return -EINVAL;
1697 }
1698
1699 column = to & (mtd->writesize - 1);
1700
1701 /* Loop until all data write */
1702 while (written < len) {
1703 int thislen = min_t(int, mtd->writesize - column, len - written);
1704 u_char *wbuf = (u_char *) buf;
1705
1706 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
1707
1708 /* Partial page write */
1709 subpage = thislen < mtd->writesize;
1710 if (subpage) {
1711 memset(this->page_buf, 0xff, mtd->writesize);
1712 memcpy(this->page_buf + column, buf, thislen);
1713 wbuf = this->page_buf;
1714 }
1715
1716 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
1717 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
1718
1719 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
1720
1721 onenand_panic_wait(mtd);
1722
1723 /* In partial page write we don't update bufferram */
1724 onenand_update_bufferram(mtd, to, !ret && !subpage);
1725 if (ONENAND_IS_2PLANE(this)) {
1726 ONENAND_SET_BUFFERRAM1(this);
1727 onenand_update_bufferram(mtd, to + this->writesize, !ret && !subpage);
1728 }
1729
1730 if (ret) {
1731 printk(KERN_ERR "%s: write failed %d\n", __func__, ret);
1732 break;
1733 }
1734
1735 written += thislen;
1736
1737 if (written == len)
1738 break;
1739
1740 column = 0;
1741 to += thislen;
1742 buf += thislen;
1743 }
1744
1745 *retlen = written;
1746 return ret;
1747 }
1748
1749 /**
1750 * onenand_fill_auto_oob - [Internal] oob auto-placement transfer
1751 * @param mtd MTD device structure
1752 * @param oob_buf oob buffer
1753 * @param buf source address
1754 * @param column oob offset to write to
1755 * @param thislen oob length to write
1756 */
1757 static int onenand_fill_auto_oob(struct mtd_info *mtd, u_char *oob_buf,
1758 const u_char *buf, int column, int thislen)
1759 {
1760 struct onenand_chip *this = mtd->priv;
1761 struct nand_oobfree *free;
1762 int writecol = column;
1763 int writeend = column + thislen;
1764 int lastgap = 0;
1765 unsigned int i;
1766
1767 free = this->ecclayout->oobfree;
1768 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1769 if (writecol >= lastgap)
1770 writecol += free->offset - lastgap;
1771 if (writeend >= lastgap)
1772 writeend += free->offset - lastgap;
1773 lastgap = free->offset + free->length;
1774 }
1775 free = this->ecclayout->oobfree;
1776 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1777 int free_end = free->offset + free->length;
1778 if (free->offset < writeend && free_end > writecol) {
1779 int st = max_t(int,free->offset,writecol);
1780 int ed = min_t(int,free_end,writeend);
1781 int n = ed - st;
1782 memcpy(oob_buf + st, buf, n);
1783 buf += n;
1784 } else if (column == 0)
1785 break;
1786 }
1787 return 0;
1788 }
1789
1790 /**
1791 * onenand_write_ops_nolock - [OneNAND Interface] write main and/or out-of-band
1792 * @param mtd MTD device structure
1793 * @param to offset to write to
1794 * @param ops oob operation description structure
1795 *
1796 * Write main and/or oob with ECC
1797 */
1798 static int onenand_write_ops_nolock(struct mtd_info *mtd, loff_t to,
1799 struct mtd_oob_ops *ops)
1800 {
1801 struct onenand_chip *this = mtd->priv;
1802 int written = 0, column, thislen = 0, subpage = 0;
1803 int prev = 0, prevlen = 0, prev_subpage = 0, first = 1;
1804 int oobwritten = 0, oobcolumn, thisooblen, oobsize;
1805 size_t len = ops->len;
1806 size_t ooblen = ops->ooblen;
1807 const u_char *buf = ops->datbuf;
1808 const u_char *oob = ops->oobbuf;
1809 u_char *oobbuf;
1810 int ret = 0;
1811
1812 DEBUG(MTD_DEBUG_LEVEL3, "%s: to = 0x%08x, len = %i\n",
1813 __func__, (unsigned int) to, (int) len);
1814
1815 /* Initialize retlen, in case of early exit */
1816 ops->retlen = 0;
1817 ops->oobretlen = 0;
1818
1819 /* Do not allow writes past end of device */
1820 if (unlikely((to + len) > mtd->size)) {
1821 printk(KERN_ERR "%s: Attempt write to past end of device\n",
1822 __func__);
1823 return -EINVAL;
1824 }
1825
1826 /* Reject writes, which are not page aligned */
1827 if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) {
1828 printk(KERN_ERR "%s: Attempt to write not page aligned data\n",
1829 __func__);
1830 return -EINVAL;
1831 }
1832
1833 /* Check zero length */
1834 if (!len)
1835 return 0;
1836
1837 if (ops->mode == MTD_OOB_AUTO)
1838 oobsize = this->ecclayout->oobavail;
1839 else
1840 oobsize = mtd->oobsize;
1841
1842 oobcolumn = to & (mtd->oobsize - 1);
1843
1844 column = to & (mtd->writesize - 1);
1845
1846 /* Loop until all data write */
1847 while (1) {
1848 if (written < len) {
1849 u_char *wbuf = (u_char *) buf;
1850
1851 thislen = min_t(int, mtd->writesize - column, len - written);
1852 thisooblen = min_t(int, oobsize - oobcolumn, ooblen - oobwritten);
1853
1854 cond_resched();
1855
1856 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
1857
1858 /* Partial page write */
1859 subpage = thislen < mtd->writesize;
1860 if (subpage) {
1861 memset(this->page_buf, 0xff, mtd->writesize);
1862 memcpy(this->page_buf + column, buf, thislen);
1863 wbuf = this->page_buf;
1864 }
1865
1866 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
1867
1868 if (oob) {
1869 oobbuf = this->oob_buf;
1870
1871 /* We send data to spare ram with oobsize
1872 * to prevent byte access */
1873 memset(oobbuf, 0xff, mtd->oobsize);
1874 if (ops->mode == MTD_OOB_AUTO)
1875 onenand_fill_auto_oob(mtd, oobbuf, oob, oobcolumn, thisooblen);
1876 else
1877 memcpy(oobbuf + oobcolumn, oob, thisooblen);
1878
1879 oobwritten += thisooblen;
1880 oob += thisooblen;
1881 oobcolumn = 0;
1882 } else
1883 oobbuf = (u_char *) ffchars;
1884
1885 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
1886 } else
1887 ONENAND_SET_NEXT_BUFFERRAM(this);
1888
1889 /*
1890 * 2 PLANE, MLC, and Flex-OneNAND do not support
1891 * write-while-program feature.
1892 */
1893 if (!ONENAND_IS_2PLANE(this) && !first) {
1894 ONENAND_SET_PREV_BUFFERRAM(this);
1895
1896 ret = this->wait(mtd, FL_WRITING);
1897
1898 /* In partial page write we don't update bufferram */
1899 onenand_update_bufferram(mtd, prev, !ret && !prev_subpage);
1900 if (ret) {
1901 written -= prevlen;
1902 printk(KERN_ERR "%s: write failed %d\n",
1903 __func__, ret);
1904 break;
1905 }
1906
1907 if (written == len) {
1908 /* Only check verify write turn on */
1909 ret = onenand_verify(mtd, buf - len, to - len, len);
1910 if (ret)
1911 printk(KERN_ERR "%s: verify failed %d\n",
1912 __func__, ret);
1913 break;
1914 }
1915
1916 ONENAND_SET_NEXT_BUFFERRAM(this);
1917 }
1918
1919 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
1920
1921 /*
1922 * 2 PLANE, MLC, and Flex-OneNAND wait here
1923 */
1924 if (ONENAND_IS_2PLANE(this)) {
1925 ret = this->wait(mtd, FL_WRITING);
1926
1927 /* In partial page write we don't update bufferram */
1928 onenand_update_bufferram(mtd, to, !ret && !subpage);
1929 if (ret) {
1930 printk(KERN_ERR "%s: write failed %d\n",
1931 __func__, ret);
1932 break;
1933 }
1934
1935 /* Only check verify write turn on */
1936 ret = onenand_verify(mtd, buf, to, thislen);
1937 if (ret) {
1938 printk(KERN_ERR "%s: verify failed %d\n",
1939 __func__, ret);
1940 break;
1941 }
1942
1943 written += thislen;
1944
1945 if (written == len)
1946 break;
1947
1948 } else
1949 written += thislen;
1950
1951 column = 0;
1952 prev_subpage = subpage;
1953 prev = to;
1954 prevlen = thislen;
1955 to += thislen;
1956 buf += thislen;
1957 first = 0;
1958 }
1959
1960 /* In error case, clear all bufferrams */
1961 if (written != len)
1962 onenand_invalidate_bufferram(mtd, 0, -1);
1963
1964 ops->retlen = written;
1965 ops->oobretlen = oobwritten;
1966
1967 return ret;
1968 }
1969
1970
1971 /**
1972 * onenand_write_oob_nolock - [Internal] OneNAND write out-of-band
1973 * @param mtd MTD device structure
1974 * @param to offset to write to
1975 * @param len number of bytes to write
1976 * @param retlen pointer to variable to store the number of written bytes
1977 * @param buf the data to write
1978 * @param mode operation mode
1979 *
1980 * OneNAND write out-of-band
1981 */
1982 static int onenand_write_oob_nolock(struct mtd_info *mtd, loff_t to,
1983 struct mtd_oob_ops *ops)
1984 {
1985 struct onenand_chip *this = mtd->priv;
1986 int column, ret = 0, oobsize;
1987 int written = 0, oobcmd;
1988 u_char *oobbuf;
1989 size_t len = ops->ooblen;
1990 const u_char *buf = ops->oobbuf;
1991 mtd_oob_mode_t mode = ops->mode;
1992
1993 to += ops->ooboffs;
1994
1995 DEBUG(MTD_DEBUG_LEVEL3, "%s: to = 0x%08x, len = %i\n",
1996 __func__, (unsigned int) to, (int) len);
1997
1998 /* Initialize retlen, in case of early exit */
1999 ops->oobretlen = 0;
2000
2001 if (mode == MTD_OOB_AUTO)
2002 oobsize = this->ecclayout->oobavail;
2003 else
2004 oobsize = mtd->oobsize;
2005
2006 column = to & (mtd->oobsize - 1);
2007
2008 if (unlikely(column >= oobsize)) {
2009 printk(KERN_ERR "%s: Attempted to start write outside oob\n",
2010 __func__);
2011 return -EINVAL;
2012 }
2013
2014 /* For compatibility with NAND: Do not allow write past end of page */
2015 if (unlikely(column + len > oobsize)) {
2016 printk(KERN_ERR "%s: Attempt to write past end of page\n",
2017 __func__);
2018 return -EINVAL;
2019 }
2020
2021 /* Do not allow reads past end of device */
2022 if (unlikely(to >= mtd->size ||
2023 column + len > ((mtd->size >> this->page_shift) -
2024 (to >> this->page_shift)) * oobsize)) {
2025 printk(KERN_ERR "%s: Attempted to write past end of device\n",
2026 __func__);
2027 return -EINVAL;
2028 }
2029
2030 oobbuf = this->oob_buf;
2031
2032 oobcmd = ONENAND_IS_MLC(this) ? ONENAND_CMD_PROG : ONENAND_CMD_PROGOOB;
2033
2034 /* Loop until all data write */
2035 while (written < len) {
2036 int thislen = min_t(int, oobsize, len - written);
2037
2038 cond_resched();
2039
2040 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
2041
2042 /* We send data to spare ram with oobsize
2043 * to prevent byte access */
2044 memset(oobbuf, 0xff, mtd->oobsize);
2045 if (mode == MTD_OOB_AUTO)
2046 onenand_fill_auto_oob(mtd, oobbuf, buf, column, thislen);
2047 else
2048 memcpy(oobbuf + column, buf, thislen);
2049 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
2050
2051 if (ONENAND_IS_MLC(this)) {
2052 /* Set main area of DataRAM to 0xff*/
2053 memset(this->page_buf, 0xff, mtd->writesize);
2054 this->write_bufferram(mtd, ONENAND_DATARAM,
2055 this->page_buf, 0, mtd->writesize);
2056 }
2057
2058 this->command(mtd, oobcmd, to, mtd->oobsize);
2059
2060 onenand_update_bufferram(mtd, to, 0);
2061 if (ONENAND_IS_2PLANE(this)) {
2062 ONENAND_SET_BUFFERRAM1(this);
2063 onenand_update_bufferram(mtd, to + this->writesize, 0);
2064 }
2065
2066 ret = this->wait(mtd, FL_WRITING);
2067 if (ret) {
2068 printk(KERN_ERR "%s: write failed %d\n", __func__, ret);
2069 break;
2070 }
2071
2072 ret = onenand_verify_oob(mtd, oobbuf, to);
2073 if (ret) {
2074 printk(KERN_ERR "%s: verify failed %d\n",
2075 __func__, ret);
2076 break;
2077 }
2078
2079 written += thislen;
2080 if (written == len)
2081 break;
2082
2083 to += mtd->writesize;
2084 buf += thislen;
2085 column = 0;
2086 }
2087
2088 ops->oobretlen = written;
2089
2090 return ret;
2091 }
2092
2093 /**
2094 * onenand_write - [MTD Interface] write buffer to FLASH
2095 * @param mtd MTD device structure
2096 * @param to offset to write to
2097 * @param len number of bytes to write
2098 * @param retlen pointer to variable to store the number of written bytes
2099 * @param buf the data to write
2100 *
2101 * Write with ECC
2102 */
2103 static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
2104 size_t *retlen, const u_char *buf)
2105 {
2106 struct mtd_oob_ops ops = {
2107 .len = len,
2108 .ooblen = 0,
2109 .datbuf = (u_char *) buf,
2110 .oobbuf = NULL,
2111 };
2112 int ret;
2113
2114 onenand_get_device(mtd, FL_WRITING);
2115 ret = onenand_write_ops_nolock(mtd, to, &ops);
2116 onenand_release_device(mtd);
2117
2118 *retlen = ops.retlen;
2119 return ret;
2120 }
2121
2122 /**
2123 * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band
2124 * @param mtd: MTD device structure
2125 * @param to: offset to write
2126 * @param ops: oob operation description structure
2127 */
2128 static int onenand_write_oob(struct mtd_info *mtd, loff_t to,
2129 struct mtd_oob_ops *ops)
2130 {
2131 int ret;
2132
2133 switch (ops->mode) {
2134 case MTD_OOB_PLACE:
2135 case MTD_OOB_AUTO:
2136 break;
2137 case MTD_OOB_RAW:
2138 /* Not implemented yet */
2139 default:
2140 return -EINVAL;
2141 }
2142
2143 onenand_get_device(mtd, FL_WRITING);
2144 if (ops->datbuf)
2145 ret = onenand_write_ops_nolock(mtd, to, ops);
2146 else
2147 ret = onenand_write_oob_nolock(mtd, to, ops);
2148 onenand_release_device(mtd);
2149
2150 return ret;
2151 }
2152
2153 /**
2154 * onenand_block_isbad_nolock - [GENERIC] Check if a block is marked bad
2155 * @param mtd MTD device structure
2156 * @param ofs offset from device start
2157 * @param allowbbt 1, if its allowed to access the bbt area
2158 *
2159 * Check, if the block is bad. Either by reading the bad block table or
2160 * calling of the scan function.
2161 */
2162 static int onenand_block_isbad_nolock(struct mtd_info *mtd, loff_t ofs, int allowbbt)
2163 {
2164 struct onenand_chip *this = mtd->priv;
2165 struct bbm_info *bbm = this->bbm;
2166
2167 /* Return info from the table */
2168 return bbm->isbad_bbt(mtd, ofs, allowbbt);
2169 }
2170
2171 /**
2172 * onenand_erase - [MTD Interface] erase block(s)
2173 * @param mtd MTD device structure
2174 * @param instr erase instruction
2175 *
2176 * Erase one ore more blocks
2177 */
2178 static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
2179 {
2180 struct onenand_chip *this = mtd->priv;
2181 unsigned int block_size;
2182 loff_t addr = instr->addr;
2183 loff_t len = instr->len;
2184 int ret = 0, i;
2185 struct mtd_erase_region_info *region = NULL;
2186 loff_t region_end = 0;
2187
2188 DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%012llx, len = %llu\n", (unsigned long long) instr->addr, (unsigned long long) instr->len);
2189
2190 /* Do not allow erase past end of device */
2191 if (unlikely((len + addr) > mtd->size)) {
2192 printk(KERN_ERR "%s: Erase past end of device\n", __func__);
2193 return -EINVAL;
2194 }
2195
2196 if (FLEXONENAND(this)) {
2197 /* Find the eraseregion of this address */
2198 i = flexonenand_region(mtd, addr);
2199 region = &mtd->eraseregions[i];
2200
2201 block_size = region->erasesize;
2202 region_end = region->offset + region->erasesize * region->numblocks;
2203
2204 /* Start address within region must align on block boundary.
2205 * Erase region's start offset is always block start address.
2206 */
2207 if (unlikely((addr - region->offset) & (block_size - 1))) {
2208 printk(KERN_ERR "%s: Unaligned address\n", __func__);
2209 return -EINVAL;
2210 }
2211 } else {
2212 block_size = 1 << this->erase_shift;
2213
2214 /* Start address must align on block boundary */
2215 if (unlikely(addr & (block_size - 1))) {
2216 printk(KERN_ERR "%s: Unaligned address\n", __func__);
2217 return -EINVAL;
2218 }
2219 }
2220
2221 /* Length must align on block boundary */
2222 if (unlikely(len & (block_size - 1))) {
2223 printk(KERN_ERR "%s: Length not block aligned\n", __func__);
2224 return -EINVAL;
2225 }
2226
2227 instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
2228
2229 /* Grab the lock and see if the device is available */
2230 onenand_get_device(mtd, FL_ERASING);
2231
2232 /* Loop through the blocks */
2233 instr->state = MTD_ERASING;
2234
2235 while (len) {
2236 cond_resched();
2237
2238 /* Check if we have a bad block, we do not erase bad blocks */
2239 if (onenand_block_isbad_nolock(mtd, addr, 0)) {
2240 printk(KERN_WARNING "%s: attempt to erase a bad block "
2241 "at addr 0x%012llx\n",
2242 __func__, (unsigned long long) addr);
2243 instr->state = MTD_ERASE_FAILED;
2244 goto erase_exit;
2245 }
2246
2247 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
2248
2249 onenand_invalidate_bufferram(mtd, addr, block_size);
2250
2251 ret = this->wait(mtd, FL_ERASING);
2252 /* Check, if it is write protected */
2253 if (ret) {
2254 printk(KERN_ERR "%s: Failed erase, block %d\n",
2255 __func__, onenand_block(this, addr));
2256 instr->state = MTD_ERASE_FAILED;
2257 instr->fail_addr = addr;
2258 goto erase_exit;
2259 }
2260
2261 len -= block_size;
2262 addr += block_size;
2263
2264 if (addr == region_end) {
2265 if (!len)
2266 break;
2267 region++;
2268
2269 block_size = region->erasesize;
2270 region_end = region->offset + region->erasesize * region->numblocks;
2271
2272 if (len & (block_size - 1)) {
2273 /* FIXME: This should be handled at MTD partitioning level. */
2274 printk(KERN_ERR "%s: Unaligned address\n",
2275 __func__);
2276 goto erase_exit;
2277 }
2278 }
2279
2280 }
2281
2282 instr->state = MTD_ERASE_DONE;
2283
2284 erase_exit:
2285
2286 ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
2287
2288 /* Deselect and wake up anyone waiting on the device */
2289 onenand_release_device(mtd);
2290
2291 /* Do call back function */
2292 if (!ret)
2293 mtd_erase_callback(instr);
2294
2295 return ret;
2296 }
2297
2298 /**
2299 * onenand_sync - [MTD Interface] sync
2300 * @param mtd MTD device structure
2301 *
2302 * Sync is actually a wait for chip ready function
2303 */
2304 static void onenand_sync(struct mtd_info *mtd)
2305 {
2306 DEBUG(MTD_DEBUG_LEVEL3, "%s: called\n", __func__);
2307
2308 /* Grab the lock and see if the device is available */
2309 onenand_get_device(mtd, FL_SYNCING);
2310
2311 /* Release it and go back */
2312 onenand_release_device(mtd);
2313 }
2314
2315 /**
2316 * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
2317 * @param mtd MTD device structure
2318 * @param ofs offset relative to mtd start
2319 *
2320 * Check whether the block is bad
2321 */
2322 static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
2323 {
2324 int ret;
2325
2326 /* Check for invalid offset */
2327 if (ofs > mtd->size)
2328 return -EINVAL;
2329
2330 onenand_get_device(mtd, FL_READING);
2331 ret = onenand_block_isbad_nolock(mtd, ofs, 0);
2332 onenand_release_device(mtd);
2333 return ret;
2334 }
2335
2336 /**
2337 * onenand_default_block_markbad - [DEFAULT] mark a block bad
2338 * @param mtd MTD device structure
2339 * @param ofs offset from device start
2340 *
2341 * This is the default implementation, which can be overridden by
2342 * a hardware specific driver.
2343 */
2344 static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
2345 {
2346 struct onenand_chip *this = mtd->priv;
2347 struct bbm_info *bbm = this->bbm;
2348 u_char buf[2] = {0, 0};
2349 struct mtd_oob_ops ops = {
2350 .mode = MTD_OOB_PLACE,
2351 .ooblen = 2,
2352 .oobbuf = buf,
2353 .ooboffs = 0,
2354 };
2355 int block;
2356
2357 /* Get block number */
2358 block = onenand_block(this, ofs);
2359 if (bbm->bbt)
2360 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
2361
2362 /* We write two bytes, so we don't have to mess with 16-bit access */
2363 ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
2364 /* FIXME : What to do when marking SLC block in partition
2365 * with MLC erasesize? For now, it is not advisable to
2366 * create partitions containing both SLC and MLC regions.
2367 */
2368 return onenand_write_oob_nolock(mtd, ofs, &ops);
2369 }
2370
2371 /**
2372 * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
2373 * @param mtd MTD device structure
2374 * @param ofs offset relative to mtd start
2375 *
2376 * Mark the block as bad
2377 */
2378 static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
2379 {
2380 struct onenand_chip *this = mtd->priv;
2381 int ret;
2382
2383 ret = onenand_block_isbad(mtd, ofs);
2384 if (ret) {
2385 /* If it was bad already, return success and do nothing */
2386 if (ret > 0)
2387 return 0;
2388 return ret;
2389 }
2390
2391 onenand_get_device(mtd, FL_WRITING);
2392 ret = this->block_markbad(mtd, ofs);
2393 onenand_release_device(mtd);
2394 return ret;
2395 }
2396
2397 /**
2398 * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s)
2399 * @param mtd MTD device structure
2400 * @param ofs offset relative to mtd start
2401 * @param len number of bytes to lock or unlock
2402 * @param cmd lock or unlock command
2403 *
2404 * Lock or unlock one or more blocks
2405 */
2406 static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd)
2407 {
2408 struct onenand_chip *this = mtd->priv;
2409 int start, end, block, value, status;
2410 int wp_status_mask;
2411
2412 start = onenand_block(this, ofs);
2413 end = onenand_block(this, ofs + len) - 1;
2414
2415 if (cmd == ONENAND_CMD_LOCK)
2416 wp_status_mask = ONENAND_WP_LS;
2417 else
2418 wp_status_mask = ONENAND_WP_US;
2419
2420 /* Continuous lock scheme */
2421 if (this->options & ONENAND_HAS_CONT_LOCK) {
2422 /* Set start block address */
2423 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
2424 /* Set end block address */
2425 this->write_word(end, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
2426 /* Write lock command */
2427 this->command(mtd, cmd, 0, 0);
2428
2429 /* There's no return value */
2430 this->wait(mtd, FL_LOCKING);
2431
2432 /* Sanity check */
2433 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
2434 & ONENAND_CTRL_ONGO)
2435 continue;
2436
2437 /* Check lock status */
2438 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
2439 if (!(status & wp_status_mask))
2440 printk(KERN_ERR "%s: wp status = 0x%x\n",
2441 __func__, status);
2442
2443 return 0;
2444 }
2445
2446 /* Block lock scheme */
2447 for (block = start; block < end + 1; block++) {
2448 /* Set block address */
2449 value = onenand_block_address(this, block);
2450 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
2451 /* Select DataRAM for DDP */
2452 value = onenand_bufferram_address(this, block);
2453 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
2454 /* Set start block address */
2455 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
2456 /* Write lock command */
2457 this->command(mtd, cmd, 0, 0);
2458
2459 /* There's no return value */
2460 this->wait(mtd, FL_LOCKING);
2461
2462 /* Sanity check */
2463 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
2464 & ONENAND_CTRL_ONGO)
2465 continue;
2466
2467 /* Check lock status */
2468 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
2469 if (!(status & wp_status_mask))
2470 printk(KERN_ERR "%s: block = %d, wp status = 0x%x\n",
2471 __func__, block, status);
2472 }
2473
2474 return 0;
2475 }
2476
2477 /**
2478 * onenand_lock - [MTD Interface] Lock block(s)
2479 * @param mtd MTD device structure
2480 * @param ofs offset relative to mtd start
2481 * @param len number of bytes to unlock
2482 *
2483 * Lock one or more blocks
2484 */
2485 static int onenand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
2486 {
2487 int ret;
2488
2489 onenand_get_device(mtd, FL_LOCKING);
2490 ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK);
2491 onenand_release_device(mtd);
2492 return ret;
2493 }
2494
2495 /**
2496 * onenand_unlock - [MTD Interface] Unlock block(s)
2497 * @param mtd MTD device structure
2498 * @param ofs offset relative to mtd start
2499 * @param len number of bytes to unlock
2500 *
2501 * Unlock one or more blocks
2502 */
2503 static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
2504 {
2505 int ret;
2506
2507 onenand_get_device(mtd, FL_LOCKING);
2508 ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
2509 onenand_release_device(mtd);
2510 return ret;
2511 }
2512
2513 /**
2514 * onenand_check_lock_status - [OneNAND Interface] Check lock status
2515 * @param this onenand chip data structure
2516 *
2517 * Check lock status
2518 */
2519 static int onenand_check_lock_status(struct onenand_chip *this)
2520 {
2521 unsigned int value, block, status;
2522 unsigned int end;
2523
2524 end = this->chipsize >> this->erase_shift;
2525 for (block = 0; block < end; block++) {
2526 /* Set block address */
2527 value = onenand_block_address(this, block);
2528 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
2529 /* Select DataRAM for DDP */
2530 value = onenand_bufferram_address(this, block);
2531 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
2532 /* Set start block address */
2533 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
2534
2535 /* Check lock status */
2536 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
2537 if (!(status & ONENAND_WP_US)) {
2538 printk(KERN_ERR "%s: block = %d, wp status = 0x%x\n",
2539 __func__, block, status);
2540 return 0;
2541 }
2542 }
2543
2544 return 1;
2545 }
2546
2547 /**
2548 * onenand_unlock_all - [OneNAND Interface] unlock all blocks
2549 * @param mtd MTD device structure
2550 *
2551 * Unlock all blocks
2552 */
2553 static void onenand_unlock_all(struct mtd_info *mtd)
2554 {
2555 struct onenand_chip *this = mtd->priv;
2556 loff_t ofs = 0;
2557 loff_t len = mtd->size;
2558
2559 if (this->options & ONENAND_HAS_UNLOCK_ALL) {
2560 /* Set start block address */
2561 this->write_word(0, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
2562 /* Write unlock command */
2563 this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0);
2564
2565 /* There's no return value */
2566 this->wait(mtd, FL_LOCKING);
2567
2568 /* Sanity check */
2569 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
2570 & ONENAND_CTRL_ONGO)
2571 continue;
2572
2573 /* Don't check lock status */
2574 if (this->options & ONENAND_SKIP_UNLOCK_CHECK)
2575 return;
2576
2577 /* Check lock status */
2578 if (onenand_check_lock_status(this))
2579 return;
2580
2581 /* Workaround for all block unlock in DDP */
2582 if (ONENAND_IS_DDP(this) && !FLEXONENAND(this)) {
2583 /* All blocks on another chip */
2584 ofs = this->chipsize >> 1;
2585 len = this->chipsize >> 1;
2586 }
2587 }
2588
2589 onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
2590 }
2591
2592 #ifdef CONFIG_MTD_ONENAND_OTP
2593
2594 /* Internal OTP operation */
2595 typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
2596 size_t *retlen, u_char *buf);
2597
2598 /**
2599 * do_otp_read - [DEFAULT] Read OTP block area
2600 * @param mtd MTD device structure
2601 * @param from The offset to read
2602 * @param len number of bytes to read
2603 * @param retlen pointer to variable to store the number of readbytes
2604 * @param buf the databuffer to put/get data
2605 *
2606 * Read OTP block area.
2607 */
2608 static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
2609 size_t *retlen, u_char *buf)
2610 {
2611 struct onenand_chip *this = mtd->priv;
2612 struct mtd_oob_ops ops = {
2613 .len = len,
2614 .ooblen = 0,
2615 .datbuf = buf,
2616 .oobbuf = NULL,
2617 };
2618 int ret;
2619
2620 /* Enter OTP access mode */
2621 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
2622 this->wait(mtd, FL_OTPING);
2623
2624 ret = ONENAND_IS_MLC(this) ?
2625 onenand_mlc_read_ops_nolock(mtd, from, &ops) :
2626 onenand_read_ops_nolock(mtd, from, &ops);
2627
2628 /* Exit OTP access mode */
2629 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
2630 this->wait(mtd, FL_RESETING);
2631
2632 return ret;
2633 }
2634
2635 /**
2636 * do_otp_write - [DEFAULT] Write OTP block area
2637 * @param mtd MTD device structure
2638 * @param to The offset to write
2639 * @param len number of bytes to write
2640 * @param retlen pointer to variable to store the number of write bytes
2641 * @param buf the databuffer to put/get data
2642 *
2643 * Write OTP block area.
2644 */
2645 static int do_otp_write(struct mtd_info *mtd, loff_t to, size_t len,
2646 size_t *retlen, u_char *buf)
2647 {
2648 struct onenand_chip *this = mtd->priv;
2649 unsigned char *pbuf = buf;
2650 int ret;
2651 struct mtd_oob_ops ops;
2652
2653 /* Force buffer page aligned */
2654 if (len < mtd->writesize) {
2655 memcpy(this->page_buf, buf, len);
2656 memset(this->page_buf + len, 0xff, mtd->writesize - len);
2657 pbuf = this->page_buf;
2658 len = mtd->writesize;
2659 }
2660
2661 /* Enter OTP access mode */
2662 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
2663 this->wait(mtd, FL_OTPING);
2664
2665 ops.len = len;
2666 ops.ooblen = 0;
2667 ops.datbuf = pbuf;
2668 ops.oobbuf = NULL;
2669 ret = onenand_write_ops_nolock(mtd, to, &ops);
2670 *retlen = ops.retlen;
2671
2672 /* Exit OTP access mode */
2673 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
2674 this->wait(mtd, FL_RESETING);
2675
2676 return ret;
2677 }
2678
2679 /**
2680 * do_otp_lock - [DEFAULT] Lock OTP block area
2681 * @param mtd MTD device structure
2682 * @param from The offset to lock
2683 * @param len number of bytes to lock
2684 * @param retlen pointer to variable to store the number of lock bytes
2685 * @param buf the databuffer to put/get data
2686 *
2687 * Lock OTP block area.
2688 */
2689 static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
2690 size_t *retlen, u_char *buf)
2691 {
2692 struct onenand_chip *this = mtd->priv;
2693 struct mtd_oob_ops ops;
2694 int ret;
2695
2696 /* Enter OTP access mode */
2697 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
2698 this->wait(mtd, FL_OTPING);
2699
2700 if (FLEXONENAND(this)) {
2701 /*
2702 * For Flex-OneNAND, we write lock mark to 1st word of sector 4 of
2703 * main area of page 49.
2704 */
2705 ops.len = mtd->writesize;
2706 ops.ooblen = 0;
2707 ops.datbuf = buf;
2708 ops.oobbuf = NULL;
2709 ret = onenand_write_ops_nolock(mtd, mtd->writesize * 49, &ops);
2710 *retlen = ops.retlen;
2711 } else {
2712 ops.mode = MTD_OOB_PLACE;
2713 ops.ooblen = len;
2714 ops.oobbuf = buf;
2715 ops.ooboffs = 0;
2716 ret = onenand_write_oob_nolock(mtd, from, &ops);
2717 *retlen = ops.oobretlen;
2718 }
2719
2720 /* Exit OTP access mode */
2721 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
2722 this->wait(mtd, FL_RESETING);
2723
2724 return ret;
2725 }
2726
2727 /**
2728 * onenand_otp_walk - [DEFAULT] Handle OTP operation
2729 * @param mtd MTD device structure
2730 * @param from The offset to read/write
2731 * @param len number of bytes to read/write
2732 * @param retlen pointer to variable to store the number of read bytes
2733 * @param buf the databuffer to put/get data
2734 * @param action do given action
2735 * @param mode specify user and factory
2736 *
2737 * Handle OTP operation.
2738 */
2739 static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
2740 size_t *retlen, u_char *buf,
2741 otp_op_t action, int mode)
2742 {
2743 struct onenand_chip *this = mtd->priv;
2744 int otp_pages;
2745 int density;
2746 int ret = 0;
2747
2748 *retlen = 0;
2749
2750 density = onenand_get_density(this->device_id);
2751 if (density < ONENAND_DEVICE_DENSITY_512Mb)
2752 otp_pages = 20;
2753 else
2754 otp_pages = 10;
2755
2756 if (mode == MTD_OTP_FACTORY) {
2757 from += mtd->writesize * otp_pages;
2758 otp_pages = 64 - otp_pages;
2759 }
2760
2761 /* Check User/Factory boundary */
2762 if (((mtd->writesize * otp_pages) - (from + len)) < 0)
2763 return 0;
2764
2765 onenand_get_device(mtd, FL_OTPING);
2766 while (len > 0 && otp_pages > 0) {
2767 if (!action) { /* OTP Info functions */
2768 struct otp_info *otpinfo;
2769
2770 len -= sizeof(struct otp_info);
2771 if (len <= 0) {
2772 ret = -ENOSPC;
2773 break;
2774 }
2775
2776 otpinfo = (struct otp_info *) buf;
2777 otpinfo->start = from;
2778 otpinfo->length = mtd->writesize;
2779 otpinfo->locked = 0;
2780
2781 from += mtd->writesize;
2782 buf += sizeof(struct otp_info);
2783 *retlen += sizeof(struct otp_info);
2784 } else {
2785 size_t tmp_retlen;
2786 int size = len;
2787
2788 ret = action(mtd, from, len, &tmp_retlen, buf);
2789
2790 buf += size;
2791 len -= size;
2792 *retlen += size;
2793
2794 if (ret)
2795 break;
2796 }
2797 otp_pages--;
2798 }
2799 onenand_release_device(mtd);
2800
2801 return ret;
2802 }
2803
2804 /**
2805 * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info
2806 * @param mtd MTD device structure
2807 * @param buf the databuffer to put/get data
2808 * @param len number of bytes to read
2809 *
2810 * Read factory OTP info.
2811 */
2812 static int onenand_get_fact_prot_info(struct mtd_info *mtd,
2813 struct otp_info *buf, size_t len)
2814 {
2815 size_t retlen;
2816 int ret;
2817
2818 ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY);
2819
2820 return ret ? : retlen;
2821 }
2822
2823 /**
2824 * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area
2825 * @param mtd MTD device structure
2826 * @param from The offset to read
2827 * @param len number of bytes to read
2828 * @param retlen pointer to variable to store the number of read bytes
2829 * @param buf the databuffer to put/get data
2830 *
2831 * Read factory OTP area.
2832 */
2833 static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
2834 size_t len, size_t *retlen, u_char *buf)
2835 {
2836 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY);
2837 }
2838
2839 /**
2840 * onenand_get_user_prot_info - [MTD Interface] Read user OTP info
2841 * @param mtd MTD device structure
2842 * @param buf the databuffer to put/get data
2843 * @param len number of bytes to read
2844 *
2845 * Read user OTP info.
2846 */
2847 static int onenand_get_user_prot_info(struct mtd_info *mtd,
2848 struct otp_info *buf, size_t len)
2849 {
2850 size_t retlen;
2851 int ret;
2852
2853 ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER);
2854
2855 return ret ? : retlen;
2856 }
2857
2858 /**
2859 * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area
2860 * @param mtd MTD device structure
2861 * @param from The offset to read
2862 * @param len number of bytes to read
2863 * @param retlen pointer to variable to store the number of read bytes
2864 * @param buf the databuffer to put/get data
2865 *
2866 * Read user OTP area.
2867 */
2868 static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
2869 size_t len, size_t *retlen, u_char *buf)
2870 {
2871 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER);
2872 }
2873
2874 /**
2875 * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area
2876 * @param mtd MTD device structure
2877 * @param from The offset to write
2878 * @param len number of bytes to write
2879 * @param retlen pointer to variable to store the number of write bytes
2880 * @param buf the databuffer to put/get data
2881 *
2882 * Write user OTP area.
2883 */
2884 static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
2885 size_t len, size_t *retlen, u_char *buf)
2886 {
2887 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER);
2888 }
2889
2890 /**
2891 * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area
2892 * @param mtd MTD device structure
2893 * @param from The offset to lock
2894 * @param len number of bytes to unlock
2895 *
2896 * Write lock mark on spare area in page 0 in OTP block
2897 */
2898 static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
2899 size_t len)
2900 {
2901 struct onenand_chip *this = mtd->priv;
2902 u_char *buf = FLEXONENAND(this) ? this->page_buf : this->oob_buf;
2903 size_t retlen;
2904 int ret;
2905
2906 memset(buf, 0xff, FLEXONENAND(this) ? this->writesize
2907 : mtd->oobsize);
2908 /*
2909 * Note: OTP lock operation
2910 * OTP block : 0xXXFC
2911 * 1st block : 0xXXF3 (If chip support)
2912 * Both : 0xXXF0 (If chip support)
2913 */
2914 if (FLEXONENAND(this))
2915 buf[FLEXONENAND_OTP_LOCK_OFFSET] = 0xFC;
2916 else
2917 buf[ONENAND_OTP_LOCK_OFFSET] = 0xFC;
2918
2919 /*
2920 * Write lock mark to 8th word of sector0 of page0 of the spare0.
2921 * We write 16 bytes spare area instead of 2 bytes.
2922 * For Flex-OneNAND, we write lock mark to 1st word of sector 4 of
2923 * main area of page 49.
2924 */
2925
2926 from = 0;
2927 len = FLEXONENAND(this) ? mtd->writesize : 16;
2928
2929 ret = onenand_otp_walk(mtd, from, len, &retlen, buf, do_otp_lock, MTD_OTP_USER);
2930
2931 return ret ? : retlen;
2932 }
2933 #endif /* CONFIG_MTD_ONENAND_OTP */
2934
2935 /**
2936 * onenand_check_features - Check and set OneNAND features
2937 * @param mtd MTD data structure
2938 *
2939 * Check and set OneNAND features
2940 * - lock scheme
2941 * - two plane
2942 */
2943 static void onenand_check_features(struct mtd_info *mtd)
2944 {
2945 struct onenand_chip *this = mtd->priv;
2946 unsigned int density, process;
2947
2948 /* Lock scheme depends on density and process */
2949 density = onenand_get_density(this->device_id);
2950 process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT;
2951
2952 /* Lock scheme */
2953 switch (density) {
2954 case ONENAND_DEVICE_DENSITY_4Gb:
2955 this->options |= ONENAND_HAS_2PLANE;
2956
2957 case ONENAND_DEVICE_DENSITY_2Gb:
2958 /* 2Gb DDP does not have 2 plane */
2959 if (!ONENAND_IS_DDP(this))
2960 this->options |= ONENAND_HAS_2PLANE;
2961 this->options |= ONENAND_HAS_UNLOCK_ALL;
2962
2963 case ONENAND_DEVICE_DENSITY_1Gb:
2964 /* A-Die has all block unlock */
2965 if (process)
2966 this->options |= ONENAND_HAS_UNLOCK_ALL;
2967 break;
2968
2969 default:
2970 /* Some OneNAND has continuous lock scheme */
2971 if (!process)
2972 this->options |= ONENAND_HAS_CONT_LOCK;
2973 break;
2974 }
2975
2976 if (ONENAND_IS_MLC(this))
2977 this->options &= ~ONENAND_HAS_2PLANE;
2978
2979 if (FLEXONENAND(this)) {
2980 this->options &= ~ONENAND_HAS_CONT_LOCK;
2981 this->options |= ONENAND_HAS_UNLOCK_ALL;
2982 }
2983
2984 if (this->options & ONENAND_HAS_CONT_LOCK)
2985 printk(KERN_DEBUG "Lock scheme is Continuous Lock\n");
2986 if (this->options & ONENAND_HAS_UNLOCK_ALL)
2987 printk(KERN_DEBUG "Chip support all block unlock\n");
2988 if (this->options & ONENAND_HAS_2PLANE)
2989 printk(KERN_DEBUG "Chip has 2 plane\n");
2990 }
2991
2992 /**
2993 * onenand_print_device_info - Print device & version ID
2994 * @param device device ID
2995 * @param version version ID
2996 *
2997 * Print device & version ID
2998 */
2999 static void onenand_print_device_info(int device, int version)
3000 {
3001 int vcc, demuxed, ddp, density, flexonenand;
3002
3003 vcc = device & ONENAND_DEVICE_VCC_MASK;
3004 demuxed = device & ONENAND_DEVICE_IS_DEMUX;
3005 ddp = device & ONENAND_DEVICE_IS_DDP;
3006 density = onenand_get_density(device);
3007 flexonenand = device & DEVICE_IS_FLEXONENAND;
3008 printk(KERN_INFO "%s%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
3009 demuxed ? "" : "Muxed ",
3010 flexonenand ? "Flex-" : "",
3011 ddp ? "(DDP)" : "",
3012 (16 << density),
3013 vcc ? "2.65/3.3" : "1.8",
3014 device);
3015 printk(KERN_INFO "OneNAND version = 0x%04x\n", version);
3016 }
3017
3018 static const struct onenand_manufacturers onenand_manuf_ids[] = {
3019 {ONENAND_MFR_SAMSUNG, "Samsung"},
3020 {ONENAND_MFR_NUMONYX, "Numonyx"},
3021 };
3022
3023 /**
3024 * onenand_check_maf - Check manufacturer ID
3025 * @param manuf manufacturer ID
3026 *
3027 * Check manufacturer ID
3028 */
3029 static int onenand_check_maf(int manuf)
3030 {
3031 int size = ARRAY_SIZE(onenand_manuf_ids);
3032 char *name;
3033 int i;
3034
3035 for (i = 0; i < size; i++)
3036 if (manuf == onenand_manuf_ids[i].id)
3037 break;
3038
3039 if (i < size)
3040 name = onenand_manuf_ids[i].name;
3041 else
3042 name = "Unknown";
3043
3044 printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
3045
3046 return (i == size);
3047 }
3048
3049 /**
3050 * flexonenand_get_boundary - Reads the SLC boundary
3051 * @param onenand_info - onenand info structure
3052 **/
3053 static int flexonenand_get_boundary(struct mtd_info *mtd)
3054 {
3055 struct onenand_chip *this = mtd->priv;
3056 unsigned die, bdry;
3057 int ret, syscfg, locked;
3058
3059 /* Disable ECC */
3060 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
3061 this->write_word((syscfg | 0x0100), this->base + ONENAND_REG_SYS_CFG1);
3062
3063 for (die = 0; die < this->dies; die++) {
3064 this->command(mtd, FLEXONENAND_CMD_PI_ACCESS, die, 0);
3065 this->wait(mtd, FL_SYNCING);
3066
3067 this->command(mtd, FLEXONENAND_CMD_READ_PI, die, 0);
3068 ret = this->wait(mtd, FL_READING);
3069
3070 bdry = this->read_word(this->base + ONENAND_DATARAM);
3071 if ((bdry >> FLEXONENAND_PI_UNLOCK_SHIFT) == 3)
3072 locked = 0;
3073 else
3074 locked = 1;
3075 this->boundary[die] = bdry & FLEXONENAND_PI_MASK;
3076
3077 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
3078 ret = this->wait(mtd, FL_RESETING);
3079
3080 printk(KERN_INFO "Die %d boundary: %d%s\n", die,
3081 this->boundary[die], locked ? "(Locked)" : "(Unlocked)");
3082 }
3083
3084 /* Enable ECC */
3085 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
3086 return 0;
3087 }
3088
3089 /**
3090 * flexonenand_get_size - Fill up fields in onenand_chip and mtd_info
3091 * boundary[], diesize[], mtd->size, mtd->erasesize
3092 * @param mtd - MTD device structure
3093 */
3094 static void flexonenand_get_size(struct mtd_info *mtd)
3095 {
3096 struct onenand_chip *this = mtd->priv;
3097 int die, i, eraseshift, density;
3098 int blksperdie, maxbdry;
3099 loff_t ofs;
3100
3101 density = onenand_get_density(this->device_id);
3102 blksperdie = ((loff_t)(16 << density) << 20) >> (this->erase_shift);
3103 blksperdie >>= ONENAND_IS_DDP(this) ? 1 : 0;
3104 maxbdry = blksperdie - 1;
3105 eraseshift = this->erase_shift - 1;
3106
3107 mtd->numeraseregions = this->dies << 1;
3108
3109 /* This fills up the device boundary */
3110 flexonenand_get_boundary(mtd);
3111 die = ofs = 0;
3112 i = -1;
3113 for (; die < this->dies; die++) {
3114 if (!die || this->boundary[die-1] != maxbdry) {
3115 i++;
3116 mtd->eraseregions[i].offset = ofs;
3117 mtd->eraseregions[i].erasesize = 1 << eraseshift;
3118 mtd->eraseregions[i].numblocks =
3119 this->boundary[die] + 1;
3120 ofs += mtd->eraseregions[i].numblocks << eraseshift;
3121 eraseshift++;
3122 } else {
3123 mtd->numeraseregions -= 1;
3124 mtd->eraseregions[i].numblocks +=
3125 this->boundary[die] + 1;
3126 ofs += (this->boundary[die] + 1) << (eraseshift - 1);
3127 }
3128 if (this->boundary[die] != maxbdry) {
3129 i++;
3130 mtd->eraseregions[i].offset = ofs;
3131 mtd->eraseregions[i].erasesize = 1 << eraseshift;
3132 mtd->eraseregions[i].numblocks = maxbdry ^
3133 this->boundary[die];
3134 ofs += mtd->eraseregions[i].numblocks << eraseshift;
3135 eraseshift--;
3136 } else
3137 mtd->numeraseregions -= 1;
3138 }
3139
3140 /* Expose MLC erase size except when all blocks are SLC */
3141 mtd->erasesize = 1 << this->erase_shift;
3142 if (mtd->numeraseregions == 1)
3143 mtd->erasesize >>= 1;
3144
3145 printk(KERN_INFO "Device has %d eraseregions\n", mtd->numeraseregions);
3146 for (i = 0; i < mtd->numeraseregions; i++)
3147 printk(KERN_INFO "[offset: 0x%08x, erasesize: 0x%05x,"
3148 " numblocks: %04u]\n",
3149 (unsigned int) mtd->eraseregions[i].offset,
3150 mtd->eraseregions[i].erasesize,
3151 mtd->eraseregions[i].numblocks);
3152
3153 for (die = 0, mtd->size = 0; die < this->dies; die++) {
3154 this->diesize[die] = (loff_t)blksperdie << this->erase_shift;
3155 this->diesize[die] -= (loff_t)(this->boundary[die] + 1)
3156 << (this->erase_shift - 1);
3157 mtd->size += this->diesize[die];
3158 }
3159 }
3160
3161 /**
3162 * flexonenand_check_blocks_erased - Check if blocks are erased
3163 * @param mtd_info - mtd info structure
3164 * @param start - first erase block to check
3165 * @param end - last erase block to check
3166 *
3167 * Converting an unerased block from MLC to SLC
3168 * causes byte values to change. Since both data and its ECC
3169 * have changed, reads on the block give uncorrectable error.
3170 * This might lead to the block being detected as bad.
3171 *
3172 * Avoid this by ensuring that the block to be converted is
3173 * erased.
3174 */
3175 static int flexonenand_check_blocks_erased(struct mtd_info *mtd, int start, int end)
3176 {
3177 struct onenand_chip *this = mtd->priv;
3178 int i, ret;
3179 int block;
3180 struct mtd_oob_ops ops = {
3181 .mode = MTD_OOB_PLACE,
3182 .ooboffs = 0,
3183 .ooblen = mtd->oobsize,
3184 .datbuf = NULL,
3185 .oobbuf = this->oob_buf,
3186 };
3187 loff_t addr;
3188
3189 printk(KERN_DEBUG "Check blocks from %d to %d\n", start, end);
3190
3191 for (block = start; block <= end; block++) {
3192 addr = flexonenand_addr(this, block);
3193 if (onenand_block_isbad_nolock(mtd, addr, 0))
3194 continue;
3195
3196 /*
3197 * Since main area write results in ECC write to spare,
3198 * it is sufficient to check only ECC bytes for change.
3199 */
3200 ret = onenand_read_oob_nolock(mtd, addr, &ops);
3201 if (ret)
3202 return ret;
3203
3204 for (i = 0; i < mtd->oobsize; i++)
3205 if (this->oob_buf[i] != 0xff)
3206 break;
3207
3208 if (i != mtd->oobsize) {
3209 printk(KERN_WARNING "%s: Block %d not erased.\n",
3210 __func__, block);
3211 return 1;
3212 }
3213 }
3214
3215 return 0;
3216 }
3217
3218 /**
3219 * flexonenand_set_boundary - Writes the SLC boundary
3220 * @param mtd - mtd info structure
3221 */
3222 int flexonenand_set_boundary(struct mtd_info *mtd, int die,
3223 int boundary, int lock)
3224 {
3225 struct onenand_chip *this = mtd->priv;
3226 int ret, density, blksperdie, old, new, thisboundary;
3227 loff_t addr;
3228
3229 /* Change only once for SDP Flex-OneNAND */
3230 if (die && (!ONENAND_IS_DDP(this)))
3231 return 0;
3232
3233 /* boundary value of -1 indicates no required change */
3234 if (boundary < 0 || boundary == this->boundary[die])
3235 return 0;
3236
3237 density = onenand_get_density(this->device_id);
3238 blksperdie = ((16 << density) << 20) >> this->erase_shift;
3239 blksperdie >>= ONENAND_IS_DDP(this) ? 1 : 0;
3240
3241 if (boundary >= blksperdie) {
3242 printk(KERN_ERR "%s: Invalid boundary value. "
3243 "Boundary not changed.\n", __func__);
3244 return -EINVAL;
3245 }
3246
3247 /* Check if converting blocks are erased */
3248 old = this->boundary[die] + (die * this->density_mask);
3249 new = boundary + (die * this->density_mask);
3250 ret = flexonenand_check_blocks_erased(mtd, min(old, new) + 1, max(old, new));
3251 if (ret) {
3252 printk(KERN_ERR "%s: Please erase blocks "
3253 "before boundary change\n", __func__);
3254 return ret;
3255 }
3256
3257 this->command(mtd, FLEXONENAND_CMD_PI_ACCESS, die, 0);
3258 this->wait(mtd, FL_SYNCING);
3259
3260 /* Check is boundary is locked */
3261 this->command(mtd, FLEXONENAND_CMD_READ_PI, die, 0);
3262 ret = this->wait(mtd, FL_READING);
3263
3264 thisboundary = this->read_word(this->base + ONENAND_DATARAM);
3265 if ((thisboundary >> FLEXONENAND_PI_UNLOCK_SHIFT) != 3) {
3266 printk(KERN_ERR "%s: boundary locked\n", __func__);
3267 ret = 1;
3268 goto out;
3269 }
3270
3271 printk(KERN_INFO "Changing die %d boundary: %d%s\n",
3272 die, boundary, lock ? "(Locked)" : "(Unlocked)");
3273
3274 addr = die ? this->diesize[0] : 0;
3275
3276 boundary &= FLEXONENAND_PI_MASK;
3277 boundary |= lock ? 0 : (3 << FLEXONENAND_PI_UNLOCK_SHIFT);
3278
3279 this->command(mtd, ONENAND_CMD_ERASE, addr, 0);
3280 ret = this->wait(mtd, FL_ERASING);
3281 if (ret) {
3282 printk(KERN_ERR "%s: flexonenand_set_boundary: "
3283 "Failed PI erase for Die %d\n", __func__, die);
3284 goto out;
3285 }
3286
3287 this->write_word(boundary, this->base + ONENAND_DATARAM);
3288 this->command(mtd, ONENAND_CMD_PROG, addr, 0);
3289 ret = this->wait(mtd, FL_WRITING);
3290 if (ret) {
3291 printk(KERN_ERR "%s: Failed PI write for Die %d\n",
3292 __func__, die);
3293 goto out;
3294 }
3295
3296 this->command(mtd, FLEXONENAND_CMD_PI_UPDATE, die, 0);
3297 ret = this->wait(mtd, FL_WRITING);
3298 out:
3299 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_REG_COMMAND);
3300 this->wait(mtd, FL_RESETING);
3301 if (!ret)
3302 /* Recalculate device size on boundary change*/
3303 flexonenand_get_size(mtd);
3304
3305 return ret;
3306 }
3307
3308 /**
3309 * onenand_probe - [OneNAND Interface] Probe the OneNAND device
3310 * @param mtd MTD device structure
3311 *
3312 * OneNAND detection method:
3313 * Compare the values from command with ones from register
3314 */
3315 static int onenand_probe(struct mtd_info *mtd)
3316 {
3317 struct onenand_chip *this = mtd->priv;
3318 int bram_maf_id, bram_dev_id, maf_id, dev_id, ver_id;
3319 int density;
3320 int syscfg;
3321
3322 /* Save system configuration 1 */
3323 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
3324 /* Clear Sync. Burst Read mode to read BootRAM */
3325 this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ & ~ONENAND_SYS_CFG1_SYNC_WRITE), this->base + ONENAND_REG_SYS_CFG1);
3326
3327 /* Send the command for reading device ID from BootRAM */
3328 this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
3329
3330 /* Read manufacturer and device IDs from BootRAM */
3331 bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
3332 bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
3333
3334 /* Reset OneNAND to read default register values */
3335 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
3336 /* Wait reset */
3337 this->wait(mtd, FL_RESETING);
3338
3339 /* Restore system configuration 1 */
3340 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
3341
3342 /* Check manufacturer ID */
3343 if (onenand_check_maf(bram_maf_id))
3344 return -ENXIO;
3345
3346 /* Read manufacturer and device IDs from Register */
3347 maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
3348 dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
3349 ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
3350 this->technology = this->read_word(this->base + ONENAND_REG_TECHNOLOGY);
3351
3352 /* Check OneNAND device */
3353 if (maf_id != bram_maf_id || dev_id != bram_dev_id)
3354 return -ENXIO;
3355
3356 /* Flash device information */
3357 onenand_print_device_info(dev_id, ver_id);
3358 this->device_id = dev_id;
3359 this->version_id = ver_id;
3360
3361 density = onenand_get_density(dev_id);
3362 if (FLEXONENAND(this)) {
3363 this->dies = ONENAND_IS_DDP(this) ? 2 : 1;
3364 /* Maximum possible erase regions */
3365 mtd->numeraseregions = this->dies << 1;
3366 mtd->eraseregions = kzalloc(sizeof(struct mtd_erase_region_info)
3367 * (this->dies << 1), GFP_KERNEL);
3368 if (!mtd->eraseregions)
3369 return -ENOMEM;
3370 }
3371
3372 /*
3373 * For Flex-OneNAND, chipsize represents maximum possible device size.
3374 * mtd->size represents the actual device size.
3375 */
3376 this->chipsize = (16 << density) << 20;
3377
3378 /* OneNAND page size & block size */
3379 /* The data buffer size is equal to page size */
3380 mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
3381 /* We use the full BufferRAM */
3382 if (ONENAND_IS_MLC(this))
3383 mtd->writesize <<= 1;
3384
3385 mtd->oobsize = mtd->writesize >> 5;
3386 /* Pages per a block are always 64 in OneNAND */
3387 mtd->erasesize = mtd->writesize << 6;
3388 /*
3389 * Flex-OneNAND SLC area has 64 pages per block.
3390 * Flex-OneNAND MLC area has 128 pages per block.
3391 * Expose MLC erase size to find erase_shift and page_mask.
3392 */
3393 if (FLEXONENAND(this))
3394 mtd->erasesize <<= 1;
3395
3396 this->erase_shift = ffs(mtd->erasesize) - 1;
3397 this->page_shift = ffs(mtd->writesize) - 1;
3398 this->page_mask = (1 << (this->erase_shift - this->page_shift)) - 1;
3399 /* Set density mask. it is used for DDP */
3400 if (ONENAND_IS_DDP(this))
3401 this->density_mask = this->chipsize >> (this->erase_shift + 1);
3402 /* It's real page size */
3403 this->writesize = mtd->writesize;
3404
3405 /* REVISIT: Multichip handling */
3406
3407 if (FLEXONENAND(this))
3408 flexonenand_get_size(mtd);
3409 else
3410 mtd->size = this->chipsize;
3411
3412 /* Check OneNAND features */
3413 onenand_check_features(mtd);
3414
3415 /*
3416 * We emulate the 4KiB page and 256KiB erase block size
3417 * But oobsize is still 64 bytes.
3418 * It is only valid if you turn on 2X program support,
3419 * Otherwise it will be ignored by compiler.
3420 */
3421 if (ONENAND_IS_2PLANE(this)) {
3422 mtd->writesize <<= 1;
3423 mtd->erasesize <<= 1;
3424 }
3425
3426 return 0;
3427 }
3428
3429 /**
3430 * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
3431 * @param mtd MTD device structure
3432 */
3433 static int onenand_suspend(struct mtd_info *mtd)
3434 {
3435 return onenand_get_device(mtd, FL_PM_SUSPENDED);
3436 }
3437
3438 /**
3439 * onenand_resume - [MTD Interface] Resume the OneNAND flash
3440 * @param mtd MTD device structure
3441 */
3442 static void onenand_resume(struct mtd_info *mtd)
3443 {
3444 struct onenand_chip *this = mtd->priv;
3445
3446 if (this->state == FL_PM_SUSPENDED)
3447 onenand_release_device(mtd);
3448 else
3449 printk(KERN_ERR "%s: resume() called for the chip which is not "
3450 "in suspended state\n", __func__);
3451 }
3452
3453 /**
3454 * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
3455 * @param mtd MTD device structure
3456 * @param maxchips Number of chips to scan for
3457 *
3458 * This fills out all the not initialized function pointers
3459 * with the defaults.
3460 * The flash ID is read and the mtd/chip structures are
3461 * filled with the appropriate values.
3462 */
3463 int onenand_scan(struct mtd_info *mtd, int maxchips)
3464 {
3465 int i, ret;
3466 struct onenand_chip *this = mtd->priv;
3467
3468 if (!this->read_word)
3469 this->read_word = onenand_readw;
3470 if (!this->write_word)
3471 this->write_word = onenand_writew;
3472
3473 if (!this->command)
3474 this->command = onenand_command;
3475 if (!this->wait)
3476 onenand_setup_wait(mtd);
3477 if (!this->bbt_wait)
3478 this->bbt_wait = onenand_bbt_wait;
3479 if (!this->unlock_all)
3480 this->unlock_all = onenand_unlock_all;
3481
3482 if (!this->read_bufferram)
3483 this->read_bufferram = onenand_read_bufferram;
3484 if (!this->write_bufferram)
3485 this->write_bufferram = onenand_write_bufferram;
3486
3487 if (!this->block_markbad)
3488 this->block_markbad = onenand_default_block_markbad;
3489 if (!this->scan_bbt)
3490 this->scan_bbt = onenand_default_bbt;
3491
3492 if (onenand_probe(mtd))
3493 return -ENXIO;
3494
3495 /* Set Sync. Burst Read after probing */
3496 if (this->mmcontrol) {
3497 printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
3498 this->read_bufferram = onenand_sync_read_bufferram;
3499 }
3500
3501 /* Allocate buffers, if necessary */
3502 if (!this->page_buf) {
3503 this->page_buf = kzalloc(mtd->writesize, GFP_KERNEL);
3504 if (!this->page_buf) {
3505 printk(KERN_ERR "%s: Can't allocate page_buf\n",
3506 __func__);
3507 return -ENOMEM;
3508 }
3509 this->options |= ONENAND_PAGEBUF_ALLOC;
3510 }
3511 if (!this->oob_buf) {
3512 this->oob_buf = kzalloc(mtd->oobsize, GFP_KERNEL);
3513 if (!this->oob_buf) {
3514 printk(KERN_ERR "%s: Can't allocate oob_buf\n",
3515 __func__);
3516 if (this->options & ONENAND_PAGEBUF_ALLOC) {
3517 this->options &= ~ONENAND_PAGEBUF_ALLOC;
3518 kfree(this->page_buf);
3519 }
3520 return -ENOMEM;
3521 }
3522 this->options |= ONENAND_OOBBUF_ALLOC;
3523 }
3524
3525 this->state = FL_READY;
3526 init_waitqueue_head(&this->wq);
3527 spin_lock_init(&this->chip_lock);
3528
3529 /*
3530 * Allow subpage writes up to oobsize.
3531 */
3532 switch (mtd->oobsize) {
3533 case 128:
3534 this->ecclayout = &onenand_oob_128;
3535 mtd->subpage_sft = 0;
3536 break;
3537 case 64:
3538 this->ecclayout = &onenand_oob_64;
3539 mtd->subpage_sft = 2;
3540 break;
3541
3542 case 32:
3543 this->ecclayout = &onenand_oob_32;
3544 mtd->subpage_sft = 1;
3545 break;
3546
3547 default:
3548 printk(KERN_WARNING "%s: No OOB scheme defined for oobsize %d\n",
3549 __func__, mtd->oobsize);
3550 mtd->subpage_sft = 0;
3551 /* To prevent kernel oops */
3552 this->ecclayout = &onenand_oob_32;
3553 break;
3554 }
3555
3556 this->subpagesize = mtd->writesize >> mtd->subpage_sft;
3557
3558 /*
3559 * The number of bytes available for a client to place data into
3560 * the out of band area
3561 */
3562 this->ecclayout->oobavail = 0;
3563 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES &&
3564 this->ecclayout->oobfree[i].length; i++)
3565 this->ecclayout->oobavail +=
3566 this->ecclayout->oobfree[i].length;
3567 mtd->oobavail = this->ecclayout->oobavail;
3568
3569 mtd->ecclayout = this->ecclayout;
3570
3571 /* Fill in remaining MTD driver data */
3572 mtd->type = MTD_NANDFLASH;
3573 mtd->flags = MTD_CAP_NANDFLASH;
3574 mtd->erase = onenand_erase;
3575 mtd->point = NULL;
3576 mtd->unpoint = NULL;
3577 mtd->read = onenand_read;
3578 mtd->write = onenand_write;
3579 mtd->read_oob = onenand_read_oob;
3580 mtd->write_oob = onenand_write_oob;
3581 mtd->panic_write = onenand_panic_write;
3582 #ifdef CONFIG_MTD_ONENAND_OTP
3583 mtd->get_fact_prot_info = onenand_get_fact_prot_info;
3584 mtd->read_fact_prot_reg = onenand_read_fact_prot_reg;
3585 mtd->get_user_prot_info = onenand_get_user_prot_info;
3586 mtd->read_user_prot_reg = onenand_read_user_prot_reg;
3587 mtd->write_user_prot_reg = onenand_write_user_prot_reg;
3588 mtd->lock_user_prot_reg = onenand_lock_user_prot_reg;
3589 #endif
3590 mtd->sync = onenand_sync;
3591 mtd->lock = onenand_lock;
3592 mtd->unlock = onenand_unlock;
3593 mtd->suspend = onenand_suspend;
3594 mtd->resume = onenand_resume;
3595 mtd->block_isbad = onenand_block_isbad;
3596 mtd->block_markbad = onenand_block_markbad;
3597 mtd->owner = THIS_MODULE;
3598
3599 /* Unlock whole block */
3600 this->unlock_all(mtd);
3601
3602 ret = this->scan_bbt(mtd);
3603 if ((!FLEXONENAND(this)) || ret)
3604 return ret;
3605
3606 /* Change Flex-OneNAND boundaries if required */
3607 for (i = 0; i < MAX_DIES; i++)
3608 flexonenand_set_boundary(mtd, i, flex_bdry[2 * i],
3609 flex_bdry[(2 * i) + 1]);
3610
3611 return 0;
3612 }
3613
3614 /**
3615 * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
3616 * @param mtd MTD device structure
3617 */
3618 void onenand_release(struct mtd_info *mtd)
3619 {
3620 struct onenand_chip *this = mtd->priv;
3621
3622 #ifdef CONFIG_MTD_PARTITIONS
3623 /* Deregister partitions */
3624 del_mtd_partitions (mtd);
3625 #endif
3626 /* Deregister the device */
3627 del_mtd_device (mtd);
3628
3629 /* Free bad block table memory, if allocated */
3630 if (this->bbm) {
3631 struct bbm_info *bbm = this->bbm;
3632 kfree(bbm->bbt);
3633 kfree(this->bbm);
3634 }
3635 /* Buffers allocated by onenand_scan */
3636 if (this->options & ONENAND_PAGEBUF_ALLOC)
3637 kfree(this->page_buf);
3638 if (this->options & ONENAND_OOBBUF_ALLOC)
3639 kfree(this->oob_buf);
3640 kfree(mtd->eraseregions);
3641 }
3642
3643 EXPORT_SYMBOL_GPL(onenand_scan);
3644 EXPORT_SYMBOL_GPL(onenand_release);
3645
3646 MODULE_LICENSE("GPL");
3647 MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
3648 MODULE_DESCRIPTION("Generic OneNAND flash driver code");
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